[RESEND,V2,6/7] clk: imx8mn: Add necessary frequency support for ARM PLL table
diff mbox series

Message ID 1566109945-11149-6-git-send-email-Anson.Huang@nxp.com
State New
Delegated to: viresh kumar
Headers show
Series
  • [RESEND,V2,1/7] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
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Commit Message

Anson Huang Aug. 18, 2019, 6:32 a.m. UTC
i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing
frequency for ARM PLL table.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Changes since V1:
         - split the patch into 2 patches, #1 fixed those missing .rate_count assignment,
           #2 add missing frequency points.
---
 drivers/clk/imx/clk-imx8mn.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Shawn Guo Aug. 19, 2019, 1:39 p.m. UTC | #1
On Sun, Aug 18, 2019 at 02:32:24AM -0400, Anson Huang wrote:
> i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing
> frequency for ARM PLL table.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Applied, thanks.

Patch
diff mbox series

diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index b5a027c..48884f9 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -42,6 +42,8 @@  enum {
 static const struct imx_pll14xx_rate_table imx8mn_pll1416x_tbl[] = {
 	PLL_1416X_RATE(1800000000U, 225, 3, 0),
 	PLL_1416X_RATE(1600000000U, 200, 3, 0),
+	PLL_1416X_RATE(1500000000U, 375, 3, 1),
+	PLL_1416X_RATE(1400000000U, 350, 3, 1),
 	PLL_1416X_RATE(1200000000U, 300, 3, 1),
 	PLL_1416X_RATE(1000000000U, 250, 3, 1),
 	PLL_1416X_RATE(800000000U,  200, 3, 1),