| Message ID | 20190820170631.26570-1-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: disable set/get_tiling ioctl on gen12+ | expand |
Quoting Daniel Vetter (2019-08-20 18:06:31) > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never > supported any of the fancy new tiling formats, which means userspace > also stopped using the magic side-channel this provides. > > This would totally break a lot of the igts, but they're already broken > for the same reasons as userspace on gen12 would be. > > Cc: Kenneth Graunke <kenneth@whitecape.org> > Cc: Jason Ekstrand <jason@jlekstrand.net> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > index ca0c2f451742..2ee96f27a294 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > @@ -313,10 +313,15 @@ int > i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, > struct drm_file *file) > { > + struct drm_i915_private *dev_priv = to_i915(dev); > struct drm_i915_gem_set_tiling *args = data; > struct drm_i915_gem_object *obj; > int err; > > + /* there is no cpu (de)tiling in the hw anymore on gen12+ */ > + if (INTEL_GEN(dev_priv) >= 12) This should be if (!NUM_FENCES(dev_priv)) if anything. You wouldn't even need the comment talking about random features, and instead focus on why not supporting the back channel is worth the maintenance cost of divergence. > + return -EOPNOTSUPP; > + > obj = i915_gem_object_lookup(file, args->handle); > if (!obj) > return -ENOENT; > @@ -402,6 +407,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data, > struct drm_i915_gem_object *obj; > int err = -ENOENT; > > + if (INTEL_GEN(dev_priv) >= 12) > + return -EOPNOTSUPP; Not required. -Chris
On Tue, Aug 20, 2019 at 8:55 PM Chris Wilson <chris@chris-wilson.co.uk> wrote: > > Quoting Daniel Vetter (2019-08-20 18:06:31) > > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never > > supported any of the fancy new tiling formats, which means userspace > > also stopped using the magic side-channel this provides. > > > > This would totally break a lot of the igts, but they're already broken > > for the same reasons as userspace on gen12 would be. > > > > Cc: Kenneth Graunke <kenneth@whitecape.org> > > Cc: Jason Ekstrand <jason@jlekstrand.net> > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > --- > > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > index ca0c2f451742..2ee96f27a294 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > @@ -313,10 +313,15 @@ int > > i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, > > struct drm_file *file) > > { > > + struct drm_i915_private *dev_priv = to_i915(dev); > > struct drm_i915_gem_set_tiling *args = data; > > struct drm_i915_gem_object *obj; > > int err; > > > > + /* there is no cpu (de)tiling in the hw anymore on gen12+ */ > > + if (INTEL_GEN(dev_priv) >= 12) > > This should be if (!NUM_FENCES(dev_priv)) if anything. You wouldn't even > need the comment talking about random features, and instead focus on why > not supporting the back channel is worth the maintenance cost of > divergence. Yeah that's much better. > > + return -EOPNOTSUPP; > > + > > obj = i915_gem_object_lookup(file, args->handle); > > if (!obj) > > return -ENOENT; > > @@ -402,6 +407,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data, > > struct drm_i915_gem_object *obj; > > int err = -ENOENT; > > > > + if (INTEL_GEN(dev_priv) >= 12) > > + return -EOPNOTSUPP; > > Not required. I figured since we have a lot of old libdrm that loved to do get_tiling this would help in catching them. That's why I put it in. Plus just some ocd, if the set is gone, kill the get one too. Otoh we might stir something up. -Daniel
Quoting Daniel Vetter (2019-08-20 20:06:19) > On Tue, Aug 20, 2019 at 8:55 PM Chris Wilson <chris@chris-wilson.co.uk> wrote: > > > > Quoting Daniel Vetter (2019-08-20 18:06:31) > > > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never > > > supported any of the fancy new tiling formats, which means userspace > > > also stopped using the magic side-channel this provides. > > > > > > This would totally break a lot of the igts, but they're already broken > > > for the same reasons as userspace on gen12 would be. > > > > > > Cc: Kenneth Graunke <kenneth@whitecape.org> > > > Cc: Jason Ekstrand <jason@jlekstrand.net> > > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > > --- > > > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 8 ++++++++ > > > 1 file changed, 8 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > index ca0c2f451742..2ee96f27a294 100644 > > > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > > > @@ -313,10 +313,15 @@ int > > > i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, > > > struct drm_file *file) > > > { > > > + struct drm_i915_private *dev_priv = to_i915(dev); > > > struct drm_i915_gem_set_tiling *args = data; > > > struct drm_i915_gem_object *obj; > > > int err; > > > > > > + /* there is no cpu (de)tiling in the hw anymore on gen12+ */ > > > + if (INTEL_GEN(dev_priv) >= 12) > > > > This should be if (!NUM_FENCES(dev_priv)) if anything. You wouldn't even > > need the comment talking about random features, and instead focus on why > > not supporting the back channel is worth the maintenance cost of > > divergence. > > Yeah that's much better. > > > > + return -EOPNOTSUPP; > > > + > > > obj = i915_gem_object_lookup(file, args->handle); > > > if (!obj) > > > return -ENOENT; > > > @@ -402,6 +407,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data, > > > struct drm_i915_gem_object *obj; > > > int err = -ENOENT; > > > > > > + if (INTEL_GEN(dev_priv) >= 12) > > > + return -EOPNOTSUPP; > > > > Not required. > > I figured since we have a lot of old libdrm that loved to do > get_tiling this would help in catching them. That's why I put it in. > Plus just some ocd, if the set is gone, kill the get one too. Otoh we > might stir something up. If we are using the num_fences as the feature test, they can query that already via I915_GETPARAM. So this is just left as reporting what the tiling mode is set on the object, which is then always none. -Chris
On Thu, 2019-08-29 at 14:18 +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: disable set/get_tiling ioctl on gen12+ (rev2) > URL : https://patchwork.freedesktop.org/series/65495/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_6750_full -> Patchwork_14110_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. And pushed to dinq, thanks for the patch. > > > > Known issues > ------------ > > Here are the changes found in Patchwork_14110_full that come from > known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_ctx_shared@exec-single-timeline-bsd: > - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110841]) > [1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html > [2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html > > * igt@gem_exec_async@concurrent-writes-bsd: > - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +4 > similar issues > [3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb3/igt@gem_exec_async@concurrent-writes-bsd.html > [4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html > > * igt@gem_softpin@noreloc-s3: > - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) > [5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl9/igt@gem_softpin@noreloc-s3.html > [6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl1/igt@gem_softpin@noreloc-s3.html > > * igt@i915_selftest@live_gtt: > - shard-glk: [PASS][7] -> [DMESG-WARN][8] ([fdo#110633 > ]) > [7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-glk1/igt@i915_selftest@live_gtt.html > [8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-glk5/igt@i915_selftest@live_gtt.html > > * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic: > - shard-skl: [PASS][9] -> [DMESG-WARN][10] > ([fdo#105541]) > [9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl4/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html > [10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl6/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html > > * igt@kms_plane_lowres@pipe-a-tiling-y: > - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103166]) > [11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html > [12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-y.html > > * igt@kms_psr2_su@frontbuffer: > - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109642] / > [fdo#111068]) > [13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb2/igt@kms_psr2_su@frontbuffer.html > [14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb7/igt@kms_psr2_su@frontbuffer.html > > * igt@kms_psr@psr2_cursor_mmap_cpu: > - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109441]) +3 > similar issues > [15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html > [16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb8/igt@kms_psr@psr2_cursor_mmap_cpu.html > > * igt@kms_vblank@pipe-a-ts-continuation-suspend: > - shard-apl: [PASS][17] -> [DMESG-WARN][18] > ([fdo#108566]) +2 similar issues > [17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-apl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > [18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > > * igt@perf_pmu@rc6: > - shard-kbl: [PASS][19] -> [SKIP][20] ([fdo#109271]) > [19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-kbl4/igt@perf_pmu@rc6.html > [20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-kbl7/igt@perf_pmu@rc6.html > > * igt@prime_busy@hang-bsd2: > - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109276]) +24 > similar issues > [21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb4/igt@prime_busy@hang-bsd2.html > [22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb3/igt@prime_busy@hang-bsd2.html > > > #### Possible fixes #### > > * igt@gem_eio@reset-stress: > - shard-skl: [FAIL][23] ([fdo#109661]) -> [PASS][24] > [23]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl5/igt@gem_eio@reset-stress.html > [24]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl10/igt@gem_eio@reset-stress.html > > * igt@gem_exec_balancer@smoke: > - shard-iclb: [SKIP][25] ([fdo#110854]) -> [PASS][26] > [25]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb8/igt@gem_exec_balancer@smoke.html > [26]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb1/igt@gem_exec_balancer@smoke.html > > * igt@gem_exec_schedule@wide-bsd: > - shard-iclb: [SKIP][27] ([fdo#111325]) -> [PASS][28] +7 > similar issues > [27]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb2/igt@gem_exec_schedule@wide-bsd.html > [28]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html > > * igt@i915_pm_rps@min-max-config-loaded: > - shard-iclb: [FAIL][29] ([fdo#111409]) -> [PASS][30] > [29]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb7/igt@i915_pm_rps@min-max-config-loaded.html > [30]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb5/igt@i915_pm_rps@min-max-config-loaded.html > > * igt@i915_suspend@sysfs-reader: > - shard-apl: [DMESG-WARN][31] ([fdo#108566]) -> > [PASS][32] +6 similar issues > [31]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-apl7/igt@i915_suspend@sysfs-reader.html > [32]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-apl4/igt@i915_suspend@sysfs-reader.html > > * igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding: > - shard-iclb: [INCOMPLETE][33] ([fdo#107713]) -> > [PASS][34] > [33]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb7/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html > [34]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb2/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html > > * igt@kms_cursor_legacy@pipe-c-single-move: > - shard-apl: [INCOMPLETE][35] ([fdo#103927]) -> > [PASS][36] +2 similar issues > [35]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-apl1/igt@kms_cursor_legacy@pipe-c-single-move.html > [36]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-apl2/igt@kms_cursor_legacy@pipe-c-single-move.html > > * igt@kms_fbcon_fbt@psr-suspend: > - shard-skl: [INCOMPLETE][37] ([fdo#104108]) -> > [PASS][38] > [37]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl10/igt@kms_fbcon_fbt@psr-suspend.html > [38]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl1/igt@kms_fbcon_fbt@psr-suspend.html > > * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt: > - shard-iclb: [FAIL][39] ([fdo#103167]) -> [PASS][40] +3 > similar issues > [39]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html > [40]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html > > * igt@kms_psr@psr2_sprite_mmap_gtt: > - shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] +3 > similar issues > [41]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html > [42]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html > > * igt@perf@blocking: > - shard-skl: [FAIL][43] ([fdo#110728]) -> [PASS][44] > [43]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl10/igt@perf@blocking.html > [44]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl7/igt@perf@blocking.html > > * igt@prime_vgem@fence-wait-bsd2: > - shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +16 > similar issues > [45]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb7/igt@prime_vgem@fence-wait-bsd2.html > [46]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html > > > #### Warnings #### > > * igt@gem_mocs_settings@mocs-reset-bsd2: > - shard-iclb: [FAIL][47] ([fdo#111330]) -> [SKIP][48] > ([fdo#109276]) +2 similar issues > [47]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html > [48]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-iclb8/igt@gem_mocs_settings@mocs-reset-bsd2.html > > * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt: > - shard-skl: [FAIL][49] ([fdo#108040]) -> [FAIL][50] > ([fdo#103167]) > [49]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6750/shard-skl7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html > [50]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/shard-skl10/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html > > > [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 > [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 > [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 > [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 > [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541 > [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 > [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040 > [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 > [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 > [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661 > [fdo#110633 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110633 > [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 > [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 > [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 > [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 > [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325 > [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330 > [fdo#111409]: https://bugs.freedesktop.org/show_bug.cgi?id=111409 > > > Participating hosts (10 -> 10) > ------------------------------ > > No changes in participating hosts > > > Build changes > ------------- > > * CI: CI-20190529 -> None > * Linux: CI_DRM_6750 -> Patchwork_14110 > > CI-20190529: 20190529 > CI_DRM_6750: ba37f74dbdc1e78e70a5a2e5f4ce8d762d06eaa7 @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_5146: 357dbe1869d88a2f08bcee4eebceff4ee9014424 @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_14110: 5281445913b8df5c789c9ec66dcfb0e0576d3881 @ > git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ > git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14110/ > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
While I'm generally a fan of this change, we've been talking on IRC a bit today and, apparently, the X server hasn't actually had a release where modifiers have been enabled by default so this is causing problems. Adam & Daniel, is there something that's preventing us from enabling it by default? This is kind-of important these days. --Jason On Tue, Aug 20, 2019 at 12:06 PM Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never > supported any of the fancy new tiling formats, which means userspace > also stopped using the magic side-channel this provides. > > This would totally break a lot of the igts, but they're already broken > for the same reasons as userspace on gen12 would be. > > Cc: Kenneth Graunke <kenneth@whitecape.org> > Cc: Jason Ekstrand <jason@jlekstrand.net> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > index ca0c2f451742..2ee96f27a294 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > @@ -313,10 +313,15 @@ int > i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, > struct drm_file *file) > { > + struct drm_i915_private *dev_priv = to_i915(dev); > struct drm_i915_gem_set_tiling *args = data; > struct drm_i915_gem_object *obj; > int err; > > + /* there is no cpu (de)tiling in the hw anymore on gen12+ */ > + if (INTEL_GEN(dev_priv) >= 12) > + return -EOPNOTSUPP; > + > obj = i915_gem_object_lookup(file, args->handle); > if (!obj) > return -ENOENT; > @@ -402,6 +407,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void > *data, > struct drm_i915_gem_object *obj; > int err = -ENOENT; > > + if (INTEL_GEN(dev_priv) >= 12) > + return -EOPNOTSUPP; > + > rcu_read_lock(); > obj = i915_gem_object_lookup_rcu(file, args->handle); > if (obj) { > -- > 2.23.0.rc1 > >
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index ca0c2f451742..2ee96f27a294 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -313,10 +313,15 @@ int i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { + struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_gem_set_tiling *args = data; struct drm_i915_gem_object *obj; int err; + /* there is no cpu (de)tiling in the hw anymore on gen12+ */ + if (INTEL_GEN(dev_priv) >= 12) + return -EOPNOTSUPP; + obj = i915_gem_object_lookup(file, args->handle); if (!obj) return -ENOENT; @@ -402,6 +407,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data, struct drm_i915_gem_object *obj; int err = -ENOENT; + if (INTEL_GEN(dev_priv) >= 12) + return -EOPNOTSUPP; + rcu_read_lock(); obj = i915_gem_object_lookup_rcu(file, args->handle); if (obj) {
The cpu (de)tiler hw is gone, this stopped being useful. Plus it never supported any of the fancy new tiling formats, which means userspace also stopped using the magic side-channel this provides. This would totally break a lot of the igts, but they're already broken for the same reasons as userspace on gen12 would be. Cc: Kenneth Graunke <kenneth@whitecape.org> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 8 ++++++++ 1 file changed, 8 insertions(+)