[21/26] target/mips: Clean up handling of CP0 register 26

Message ID	1566473750-17743-22-git-send-email-aleksandar.markovic@rt-rk.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=5qNd=WS=nongnu.org=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B4FBA205ED From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com> To: qemu-devel@nongnu.org Date: Thu, 22 Aug 2019 13:35:45 +0200 Message-Id: <1566473750-17743-22-git-send-email-aleksandar.markovic@rt-rk.com> In-Reply-To: <1566473750-17743-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1566473750-17743-1-git-send-email-aleksandar.markovic@rt-rk.com> Subject: [Qemu-devel] [PATCH 21/26] target/mips: Clean up handling of CP0 register 26 Precedence: list Cc: aurelien@aurel32.net, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org>
Series	Clean up handling of configuration register CP0 \| expand [00/26] Clean up handling of configuration register CP0 [01/26] target/mips: Clean up handling of CP0 register 0 [02/26] target/mips: Clean up handling of CP0 register 1 [03/26] target/mips: Clean up handling of CP0 register 2 [04/26] target/mips: Clean up handling of CP0 register 5 [05/26] target/mips: Clean up handling of CP0 register 6 [06/26] target/mips: Clean up handling of CP0 register 7 [07/26] target/mips: Clean up handling of CP0 register 8 [08/26] target/mips: Clean up handling of CP0 register 9 [09/26] target/mips: Clean up handling of CP0 register 10 [10/26] target/mips: Clean up handling of CP0 register 11 [11/26] target/mips: Clean up handling of CP0 register 12 [12/26] target/mips: Clean up handling of CP0 register 15 [13/26] target/mips: Clean up handling of CP0 register 16 [14/26] target/mips: Clean up handling of CP0 register 17 [15/26] target/mips: Clean up handling of CP0 register 18 [16/26] target/mips: Clean up handling of CP0 register 19 [17/26] target/mips: Clean up handling of CP0 register 20 [18/26] target/mips: Clean up handling of CP0 register 23 [19/26] target/mips: Clean up handling of CP0 register 24 [20/26] target/mips: Clean up handling of CP0 register 25 [21/26] target/mips: Clean up handling of CP0 register 26 [22/26] target/mips: Clean up handling of CP0 register 27 [23/26] target/mips: Clean up handling of CP0 register 28 [24/26] target/mips: Clean up handling of CP0 register 29 [25/26] target/mips: Clean up handling of CP0 register 30 [26/26] target/mips: Clean up handling of CP0 register 31

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1566473750-17743-22-git-send-email-aleksandar.markovic@rt-rk.com (mailing list archive)

State

New, archived

Headers

DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B4FBA205ED
From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Date: Thu, 22 Aug 2019 13:35:45 +0200
Message-Id: <1566473750-17743-22-git-send-email-aleksandar.markovic@rt-rk.com>
In-Reply-To: <1566473750-17743-1-git-send-email-aleksandar.markovic@rt-rk.com>
References: <1566473750-17743-1-git-send-email-aleksandar.markovic@rt-rk.com>
Subject: [Qemu-devel] [PATCH 21/26] target/mips: Clean up handling of CP0
 register 26
Precedence: list
Cc: aurelien@aurel32.net, amarkovic@wavecomp.com
Errors-To: 
 qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org
Sender: "Qemu-devel"
 <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org>

Series

Clean up handling of configuration register CP0 | expand

Commit Message

Aleksandar Markovic Aug. 22, 2019, 11:35 a.m. UTC

From: Aleksandar Markovic <amarkovic@wavecomp.com>

Clean up handling of CP0 register 26.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/cpu.h       | 2 +-
 target/mips/translate.c | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index c14afcd..80c896b 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -419,7 +419,7 @@  typedef struct mips_def_t mips_def_t;
 #define CP0_REG25__PERFCTL3        6
 #define CP0_REG25__PERFCNT3        7
 /* CP0 Register 26 */
-#define CP0_REG00__ERRCTL          0
+#define CP0_REG26__ERRCTL          0
 /* CP0 Register 27 */
 #define CP0_REG27__CACHERR         0
 /* CP0 Register 28 */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 55d1d95..f7e33f6 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7503,7 +7503,7 @@  static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_26:
         switch (sel) {
-        case 0:
+        case CP0_REG26__ERRCTL:
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl));
             register_name = "ErrCtl";
             break;
@@ -8264,7 +8264,7 @@  static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
        break;
     case CP0_REGISTER_26:
         switch (sel) {
-        case 0:
+        case CP0_REG26__ERRCTL:
             gen_helper_mtc0_errctl(cpu_env, arg);
             ctx->base.is_jmp = DISAS_STOP;
             register_name = "ErrCtl";
@@ -9003,7 +9003,7 @@  static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_26:
         switch (sel) {
-        case 0:
+        case CP0_REG26__ERRCTL:
             gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl));
             register_name = "ErrCtl";
             break;
@@ -9746,7 +9746,7 @@  static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         break;
     case CP0_REGISTER_26:
         switch (sel) {
-        case 0:
+        case CP0_REG26__ERRCTL:
             gen_helper_mtc0_errctl(cpu_env, arg);
             ctx->base.is_jmp = DISAS_STOP;
             register_name = "ErrCtl";

[21/26] target/mips: Clean up handling of CP0 register 26

Commit Message

Patch