diff mbox series

[v3] Do we need to posting-read after ggtt insert-page?

Message ID 20190823141409.2216-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [v3] Do we need to posting-read after ggtt insert-page? | expand

Commit Message

Chris Wilson Aug. 23, 2019, 2:14 p.m. UTC
See gem_set_tiling_vs_pwrite/vs_blit
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 26 +++++++++-----------------
 1 file changed, 9 insertions(+), 17 deletions(-)

Comments

Chris Wilson Aug. 23, 2019, 2:14 p.m. UTC | #1
Quoting Chris Wilson (2019-08-23 15:14:09)
> See gem_set_tiling_vs_pwrite/vs_blit

Yeah, I'm not having a good day.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2680b388dc33..a08cbbf16bac 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -127,6 +127,15 @@  static void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
 	 * WCB of the writes into the GGTT before it triggers the invalidate.
 	 */
 	intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
+
+	/*
+	 * Make sure the internal GAM fifo has been cleared of all GTT
+	 * writes before exiting stop_machine(). This guarantees that
+	 * any aperture accesses waiting to start in another process
+	 * cannot back up behind the GTT writes causing a hang.
+	 * The register can be any arbitrary GAM register.
+	 */
+	intel_uncore_posting_read_fw(uncore, GFX_FLSH_CNTL_GEN6);
 }
 
 static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
@@ -2271,20 +2280,6 @@  static void gen8_ggtt_clear_range(struct i915_address_space *vm,
 		gen8_set_pte(&gtt_base[i], scratch_pte);
 }
 
-static void bxt_vtd_ggtt_wa(struct i915_address_space *vm)
-{
-	struct drm_i915_private *dev_priv = vm->i915;
-
-	/*
-	 * Make sure the internal GAM fifo has been cleared of all GTT
-	 * writes before exiting stop_machine(). This guarantees that
-	 * any aperture accesses waiting to start in another process
-	 * cannot back up behind the GTT writes causing a hang.
-	 * The register can be any arbitrary GAM register.
-	 */
-	POSTING_READ(GFX_FLSH_CNTL_GEN6);
-}
-
 struct insert_page {
 	struct i915_address_space *vm;
 	dma_addr_t addr;
@@ -2297,7 +2292,6 @@  static int bxt_vtd_ggtt_insert_page__cb(void *_arg)
 	struct insert_page *arg = _arg;
 
 	gen8_ggtt_insert_page(arg->vm, arg->addr, arg->offset, arg->level, 0);
-	bxt_vtd_ggtt_wa(arg->vm);
 
 	return 0;
 }
@@ -2325,7 +2319,6 @@  static int bxt_vtd_ggtt_insert_entries__cb(void *_arg)
 	struct insert_entries *arg = _arg;
 
 	gen8_ggtt_insert_entries(arg->vm, arg->vma, arg->level, arg->flags);
-	bxt_vtd_ggtt_wa(arg->vm);
 
 	return 0;
 }
@@ -2351,7 +2344,6 @@  static int bxt_vtd_ggtt_clear_range__cb(void *_arg)
 	struct clear_range *arg = _arg;
 
 	gen8_ggtt_clear_range(arg->vm, arg->start, arg->length);
-	bxt_vtd_ggtt_wa(arg->vm);
 
 	return 0;
 }