[v8,08/10] drm/i915/display: Extract ilk_read_luts()
diff mbox series

Message ID 1566800772-18412-9-git-send-email-swati2.sharma@intel.com
State New
Headers show
Series
  • drm/i915: adding state checker for gamma lut value
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Commit Message

Swati Sharma Aug. 26, 2019, 6:26 a.m. UTC
For ilk, have hw read out to create hw blob of gamma
lut values.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 41 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_reg.h            |  3 +++
 2 files changed, 43 insertions(+), 1 deletion(-)

Comments

Shankar, Uma Aug. 28, 2019, 4:24 p.m. UTC | #1
>-----Original Message-----
>From: Sharma, Swati2
>Sent: Monday, August 26, 2019 11:56 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Nikula, Jani <jani.nikula@intel.com>; Sharma, Shashank
><shashank.sharma@intel.com>; Manna, Animesh <animesh.manna@intel.com>;
>Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; daniel.vetter@ffwll.ch;
>ville.syrjala@linux.intel.com; Shankar, Uma <uma.shankar@intel.com>; Sharma,
>Swati2 <swati2.sharma@intel.com>
>Subject: [v8][PATCH 08/10] drm/i915/display: Extract ilk_read_luts()
>
>For ilk, have hw read out to create hw blob of gamma lut values.

Same as earlier patch.

>Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_color.c | 41 +++++++++++++++++++++++++++++-
> drivers/gpu/drm/i915/i915_reg.h            |  3 +++
> 2 files changed, 43 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_color.c
>b/drivers/gpu/drm/i915/display/intel_color.c
>index 1ec2fa0..4b9b28f 100644
>--- a/drivers/gpu/drm/i915/display/intel_color.c
>+++ b/drivers/gpu/drm/i915/display/intel_color.c
>@@ -1647,6 +1647,43 @@ static void chv_read_luts(struct intel_crtc_state
>*crtc_state)
> 		crtc_state->base.gamma_lut =
>chv_read_cgm_gamma_lut(crtc_state);
> }
>
>+static struct drm_property_blob *
>+ilk_read_gamma_lut(struct intel_crtc_state *crtc_state) {

Rename this to " ilk_read_lut_10()" as per Ville's suggestion.
Also add const.

>+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>+	u32 i, val, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
>+	enum pipe pipe = crtc->pipe;
>+	struct drm_property_blob *blob;
>+	struct drm_color_lut *blob_data;
>+
>+	blob = drm_property_create_blob(&dev_priv->drm,
>+					sizeof(struct drm_color_lut) * lut_size,
>+					NULL);
>+	if (IS_ERR(blob))
>+		return NULL;
>+
>+	blob_data = blob->data;
>+
>+	for (i = 0; i < lut_size - 1; i++) {
>+		val = I915_READ(PREC_PALETTE(pipe, i));
>+
>+		blob_data[i].red =
>intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK, val), 10);
>+		blob_data[i].green =
>intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
>+		blob_data[i].blue =
>intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
>+	}
>+
>+	return blob;
>+}
>+
>+static void ilk_read_luts(struct intel_crtc_state *crtc_state) {
>+	if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
>+		crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
>+	else
>+		crtc_state->base.gamma_lut = ilk_read_gamma_lut(crtc_state); }
>+
> void intel_color_init(struct intel_crtc *crtc)  {
> 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -1696,8
>+1733,10 @@ void intel_color_init(struct intel_crtc *crtc)
> 			dev_priv->display.load_luts = bdw_load_luts;
> 		else if (INTEL_GEN(dev_priv) >= 7)
> 			dev_priv->display.load_luts = ivb_load_luts;
>-		else
>+		else {

This make unbalanced braces. Add braces for above else cases as well.

> 			dev_priv->display.load_luts = ilk_load_luts;
>+			dev_priv->display.read_luts = ilk_read_luts;
>+		}
> 	}
>
> 	drm_crtc_enable_color_mgmt(&crtc->base,
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index
>e76e779..acc9239 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7203,6 +7203,9 @@ enum {
> /* ilk/snb precision palette */
> #define _PREC_PALETTE_A           0x4b000
> #define _PREC_PALETTE_B           0x4c000
>+#define   PREC_PALETTE_RED_MASK   REG_GENMASK(29, 20)
>+#define   PREC_PALETTE_GREEN_MASK REG_GENMASK(19, 10)
>+#define   PREC_PALETTE_BLUE_MASK  REG_GENMASK(9, 0)
> #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A,
>_PREC_PALETTE_B) + (i) * 4)
>
> #define  _PREC_PIPEAGCMAX              0x4d000
>--
>1.9.1

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 1ec2fa0..4b9b28f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1647,6 +1647,43 @@  static void chv_read_luts(struct intel_crtc_state *crtc_state)
 		crtc_state->base.gamma_lut = chv_read_cgm_gamma_lut(crtc_state);
 }
 
+static struct drm_property_blob *
+ilk_read_gamma_lut(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	u32 i, val, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+	enum pipe pipe = crtc->pipe;
+	struct drm_property_blob *blob;
+	struct drm_color_lut *blob_data;
+
+	blob = drm_property_create_blob(&dev_priv->drm,
+					sizeof(struct drm_color_lut) * lut_size,
+					NULL);
+	if (IS_ERR(blob))
+		return NULL;
+
+	blob_data = blob->data;
+
+	for (i = 0; i < lut_size - 1; i++) {
+		val = I915_READ(PREC_PALETTE(pipe, i));
+
+		blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK, val), 10);
+		blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
+		blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
+	}
+
+	return blob;
+}
+
+static void ilk_read_luts(struct intel_crtc_state *crtc_state)
+{
+	if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+		crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
+	else
+		crtc_state->base.gamma_lut = ilk_read_gamma_lut(crtc_state);
+}
+
 void intel_color_init(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1696,8 +1733,10 @@  void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.load_luts = bdw_load_luts;
 		else if (INTEL_GEN(dev_priv) >= 7)
 			dev_priv->display.load_luts = ivb_load_luts;
-		else
+		else {
 			dev_priv->display.load_luts = ilk_load_luts;
+			dev_priv->display.read_luts = ilk_read_luts;
+		}
 	}
 
 	drm_crtc_enable_color_mgmt(&crtc->base,
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e76e779..acc9239 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7203,6 +7203,9 @@  enum {
 /* ilk/snb precision palette */
 #define _PREC_PALETTE_A           0x4b000
 #define _PREC_PALETTE_B           0x4c000
+#define   PREC_PALETTE_RED_MASK   REG_GENMASK(29, 20)
+#define   PREC_PALETTE_GREEN_MASK REG_GENMASK(19, 10)
+#define   PREC_PALETTE_BLUE_MASK  REG_GENMASK(9, 0)
 #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4)
 
 #define  _PREC_PIPEAGCMAX              0x4d000