[5/5] drm/i915: cpu-map based dumb buffers
diff mbox series

Message ID 20190826122102.32400-5-abdiel.janulgue@linux.intel.com
State New
Headers show
Series
  • [1/5] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core
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Commit Message

Abdiel Janulgue Aug. 26, 2019, 12:21 p.m. UTC
If there is no aperture we can't use map_gtt to map dumb buffers, so we
need a cpu-map based path to do it. We prefer map_gtt on platforms that
do have aperture.

Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 13 +++++++++++++
 drivers/gpu/drm/i915/i915_drv.c          |  2 +-
 drivers/gpu/drm/i915/i915_drv.h          |  2 +-
 3 files changed, 15 insertions(+), 2 deletions(-)

Comments

Chris Wilson Aug. 26, 2019, 12:48 p.m. UTC | #1
Quoting Abdiel Janulgue (2019-08-26 13:21:02)
> +int
> +i915_gem_mmap_dumb(struct drm_file *file,
> +                 struct drm_device *dev,
> +                 u32 handle,
> +                 u64 *offset)
> +{
> +       struct drm_i915_private *i915 = dev->dev_private;
> +       enum i915_mmap_type mmap_type = HAS_MAPPABLE_APERTURE(i915) ?
> +               I915_MMAP_TYPE_GTT : I915_MMAP_TYPE_OFFSET_WC;

Is there any reason for using GTT if we support WC? The buffer is meant
to be linear.
-Chris
Abdiel Janulgue Aug. 27, 2019, 8:31 a.m. UTC | #2
On 26/08/2019 15.48, Chris Wilson wrote:
> Quoting Abdiel Janulgue (2019-08-26 13:21:02)
>> +int
>> +i915_gem_mmap_dumb(struct drm_file *file,
>> +                 struct drm_device *dev,
>> +                 u32 handle,
>> +                 u64 *offset)
>> +{
>> +       struct drm_i915_private *i915 = dev->dev_private;
>> +       enum i915_mmap_type mmap_type = HAS_MAPPABLE_APERTURE(i915) ?
>> +               I915_MMAP_TYPE_GTT : I915_MMAP_TYPE_OFFSET_WC;
> 
> Is there any reason for using GTT if we support WC? The buffer is meant
> to be linear.
> -Chris
>

Actually there seems no reason at all. Yeah dumb BO mmaps should
probably be done via mmap_offset CPU WC mmaps.

-Abdiel

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index d0a653a9a4cc..ff35b0517e59 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -615,6 +615,19 @@  static int gem_mmap_offset(struct drm_device *dev, void *data,
 					     &args->offset);
 }
 
+int
+i915_gem_mmap_dumb(struct drm_file *file,
+		  struct drm_device *dev,
+		  u32 handle,
+		  u64 *offset)
+{
+	struct drm_i915_private *i915 = dev->dev_private;
+	enum i915_mmap_type mmap_type = HAS_MAPPABLE_APERTURE(i915) ?
+		I915_MMAP_TYPE_GTT : I915_MMAP_TYPE_OFFSET_WC;
+
+	return __assign_gem_object_mmap_data(file, handle, mmap_type, offset);
+}
+
 /**
  * i915_gem_mmap_gtt_ioctl - prepare an object for GTT mmap'ing
  * @dev: DRM device
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 68ed4499fa52..40ccadc9ef29 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2826,7 +2826,7 @@  static struct drm_driver driver = {
 	.get_scanout_position = i915_get_crtc_scanoutpos,
 
 	.dumb_create = i915_gem_dumb_create,
-	.dumb_map_offset = i915_gem_mmap_gtt,
+	.dumb_map_offset = i915_gem_mmap_dumb,
 	.ioctls = i915_ioctls,
 	.num_ioctls = ARRAY_SIZE(i915_ioctls),
 	.fops = &i915_driver_fops,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4e1d2e0fcc86..d3514184efef 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2300,7 +2300,7 @@  i915_mutex_lock_interruptible(struct drm_device *dev)
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
-int i915_gem_mmap_gtt(struct drm_file *file_priv, struct drm_device *dev,
+int i915_gem_mmap_dumb(struct drm_file *file_priv, struct drm_device *dev,
 		      u32 handle, u64 *offset);
 int i915_gem_mmap_gtt_version(void);