From patchwork Mon Aug 26 15:17:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Francis, David" X-Patchwork-Id: 11114851 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC24E174A for ; Mon, 26 Aug 2019 15:17:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C41EB20828 for ; Mon, 26 Aug 2019 15:17:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C41EB20828 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amd.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 84C9B6E160; Mon, 26 Aug 2019 15:17:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from NAM05-CO1-obe.outbound.protection.outlook.com (mail-eopbgr720051.outbound.protection.outlook.com [40.107.72.51]) by gabe.freedesktop.org (Postfix) with ESMTPS id 058F56E160 for ; Mon, 26 Aug 2019 15:17:36 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HwtAuE2ophV3Z7wA10a97gNUfWTO4bIfWo0xFBgMsieqtM+2HR/F6CheFQpSg6BRcWArfCnKigDskbbgiAuLeBW+6yG7IeZtj59BIoTCKSAGnb0IBWpcfEjLxVznvuXaCfl0ECaR+js8GIkqzPYat6PO+hFYZlMTzWoaoERPLQLxMIkWW8a3kxukL5H5YJf4IROR3WQhlk3M5KS0qMrji+1yVV7JzSKgPQ8JvkuVgDRHBh5SbPGClk8iTMpI7rXlJ+B9ElCJ2P0aLJC4nFu3HIw/BTCv8ffYJ3RLUNSXFcyZ3XnyVd4HglEoqz1rAeZUuLcOvUmWZCH2hEQP/m+S9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=C978YRaoHGcoNzrkPOW7NIP8XnezeR4rytagLslfHUE=; b=ituqnMwCuFHwjS1bA2RdDpISY1LQnducN9pGwz3ctTQra9hrmoYr1rlOlHHndSVk5i/pWQvzzTAAbq1NF8J4fiPAcW/uvlcnSHelZrASaXf66qio5y4qy0JukRQzprdGn3tWIaQG5qhWI1DfKbWG/jVjGq1NqZBpj3zGCPODJPYHi32agyvAOEd5V/Kyzx8bYsXEiAxVCnfz9uPWq7Bxa6GHztoqBNnlcP7qsQw8dutE7igfpW9xRKaCPRQohFjdKs2b8ajRj00UfvN+B9EedC+ybIKII2FRvLfIby0bWG3b6ixgArbN/GBadAsxAS2NXzuwAKVZU/cflrux6QQn6Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.freedesktop.org smtp.mailfrom=amd.com; dmarc=permerror action=none header.from=amd.com; dkim=none (message not signed); arc=none Received: from MN2PR12CA0036.namprd12.prod.outlook.com (2603:10b6:208:a8::49) by DM5PR12MB1532.namprd12.prod.outlook.com (2603:10b6:4:6::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2178.18; Mon, 26 Aug 2019 15:17:34 +0000 Received: from DM3NAM03FT045.eop-NAM03.prod.protection.outlook.com (2a01:111:f400:7e49::204) by MN2PR12CA0036.outlook.office365.com (2603:10b6:208:a8::49) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2199.15 via Frontend Transport; Mon, 26 Aug 2019 15:17:34 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV01.amd.com (165.204.84.17) by DM3NAM03FT045.mail.protection.outlook.com (10.152.82.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2178.16 via Frontend Transport; Mon, 26 Aug 2019 15:17:33 +0000 Received: from localhost.localdomain (10.180.168.240) by SATLEXCHOV01.amd.com (10.181.40.71) with Microsoft SMTP Server id 14.3.389.1; Mon, 26 Aug 2019 10:17:30 -0500 From: David Francis To: Subject: [PATCH v7 3/6] drm/dp_mst: Add MST support to DP DPCD R/W functions Date: Mon, 26 Aug 2019 11:17:25 -0400 Message-ID: <20190826151728.19567-4-David.Francis@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190826151728.19567-1-David.Francis@amd.com> References: <20190826151728.19567-1-David.Francis@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(39860400002)(346002)(376002)(136003)(396003)(2980300002)(428003)(189003)(199004)(70586007)(70206006)(2351001)(76176011)(6916009)(16586007)(26005)(8676002)(14444005)(53936002)(426003)(50466002)(186003)(48376002)(51416003)(316002)(8936002)(486006)(356004)(478600001)(5660300002)(6666004)(36756003)(86362001)(11346002)(446003)(81166006)(336012)(81156014)(50226002)(2616005)(476003)(49486002)(305945005)(2906002)(47776003)(4326008)(126002)(1076003); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1532; H:SATLEXCHOV01.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; MX:1; A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 599e37f3-a7e4-4dcc-f04a-08d72a38855c X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328); SRVR:DM5PR12MB1532; X-MS-TrafficTypeDiagnostic: DM5PR12MB1532: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-Forefront-PRVS: 01415BB535 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: 1/SFMXf8r2aKcxE14bfuqv6BP5HLqU77sqH8zMMdsahmpZgA9kKda4oJ3ut/rTHpdTbwRSHswq+CFc9YzYcyC+Hyx6/dkvonZkISG0C3ljoQYg4MZ5xMWS4q4mNQaxGW2zF6hgca2cEyZFL+xtZONgS1yj4OQFwaxTGv7cL0s96gpbx+HQy+m4vbaKBVLMKSCKglwagMyv5DVMuU7ezBoac35JKU/jrTB1incagAQukQVKqhJJbmLeHiXGZ6e2+BK+7mBXm4ekt9Pw0HAhZFV783UnO3dPozAStpuc1VBOrsJ4201JPOrPS5hrhhWgoOl8KLLx1fRcl+DP8i9GfPGawl5bFnFAxxnwpS3JbzDyOw62kMQFYYy0XVYtmV94DLsV06jn1aOyqGmCkZgeT+dT7flrO1VYplXhVIMQ6NhrA= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2019 15:17:33.9169 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 599e37f3-a7e4-4dcc-f04a-08d72a38855c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXCHOV01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1532 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=C978YRaoHGcoNzrkPOW7NIP8XnezeR4rytagLslfHUE=; b=gW0nCqscYmIWMGwTHcCqKvXGpiXVZ/VoYAal0d9+dH+sG0NJtbnG8M6Oeo031jaC2kFU6mkNIKYZ7BMz3Lnlf/9BWuEJRwnuV+5CW1kyNtzL99/QqpY/ywpBvch2rV6fwtUK3i87yAM7Kr+qxN0Ggk7c5sNgDYCzLo3xlDtGziw= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Francis Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Instead of having drm_dp_dpcd_read/write and drm_dp_mst_dpcd_read/write as entry points into the aux code, have drm_dp_dpcd_read/write handle both. This means that DRM drivers can make MST DPCD read/writes. v2: Fix spacing v3: Dump dpcd access on MST read/writes Reviewed-by: Lyude Paul Signed-off-by: David Francis --- drivers/gpu/drm/drm_dp_aux_dev.c | 12 ++---------- drivers/gpu/drm/drm_dp_helper.c | 30 ++++++++++++++++++++---------- 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_aux_dev.c b/drivers/gpu/drm/drm_dp_aux_dev.c index 0cfb386754c3..418cad4f649a 100644 --- a/drivers/gpu/drm/drm_dp_aux_dev.c +++ b/drivers/gpu/drm/drm_dp_aux_dev.c @@ -163,11 +163,7 @@ static ssize_t auxdev_read_iter(struct kiocb *iocb, struct iov_iter *to) break; } - if (aux_dev->aux->is_remote) - res = drm_dp_mst_dpcd_read(aux_dev->aux, pos, buf, - todo); - else - res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo); + res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo); if (res <= 0) break; @@ -215,11 +211,7 @@ static ssize_t auxdev_write_iter(struct kiocb *iocb, struct iov_iter *from) break; } - if (aux_dev->aux->is_remote) - res = drm_dp_mst_dpcd_write(aux_dev->aux, pos, buf, - todo); - else - res = drm_dp_dpcd_write(aux_dev->aux, pos, buf, todo); + res = drm_dp_mst_dpcd_write(aux_dev->aux, pos, buf, todo); if (res <= 0) break; diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index ffc68d305afe..2cc21eff4cf3 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -30,6 +30,7 @@ #include #include +#include #include #include @@ -251,7 +252,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, /** * drm_dp_dpcd_read() - read a series of bytes from the DPCD - * @aux: DisplayPort AUX channel + * @aux: DisplayPort AUX channel (SST or MST) * @offset: address of the (first) register to read * @buffer: buffer to store the register values * @size: number of bytes in @buffer @@ -280,13 +281,18 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, * We just have to do it before any DPCD access and hope that the * monitor doesn't power down exactly after the throw away read. */ - ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, buffer, - 1); - if (ret != 1) - goto out; + if (!aux->is_remote) { + ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, + buffer, 1); + if (ret != 1) + goto out; + } - ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, - size); + if (aux->is_remote) + ret = drm_dp_mst_dpcd_read(aux, offset, buffer, size); + else + ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, + buffer, size); out: drm_dp_dump_access(aux, DP_AUX_NATIVE_READ, offset, buffer, ret); @@ -296,7 +302,7 @@ EXPORT_SYMBOL(drm_dp_dpcd_read); /** * drm_dp_dpcd_write() - write a series of bytes to the DPCD - * @aux: DisplayPort AUX channel + * @aux: DisplayPort AUX channel (SST or MST) * @offset: address of the (first) register to write * @buffer: buffer containing the values to write * @size: number of bytes in @buffer @@ -313,8 +319,12 @@ ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, { int ret; - ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, - size); + if (aux->is_remote) + ret = drm_dp_mst_dpcd_write(aux, offset, buffer, size); + else + ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, + buffer, size); + drm_dp_dump_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, ret); return ret; }