[ARM64,v4.4,V3,37/44] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
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Message ID d41b4ecd51a3337b41c41b67c4adc704f7a766ed.1567077734.git.viresh.kumar@linaro.org
State New
Headers show
  • V4.4 backport of arm64 Spectre patches
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Commit Message

Viresh Kumar Aug. 29, 2019, 11:34 a.m. UTC
From: Marc Zyngier <marc.zyngier@arm.com>

commit 6167ec5c9145cdf493722dfd80a5d48bafc4a18a upstream.

A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.

If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.

Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[ Viresh: Picked on only arm-smccc.h changes ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
 include/linux/arm-smccc.h | 5 +++++
 1 file changed, 5 insertions(+)

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diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index da9f3916f9a9..1f02e4045a9e 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -73,6 +73,11 @@ 
 			   ARM_SMCCC_SMC_32,				\
 			   0, 1)
+			   ARM_SMCCC_SMC_32,				\
+			   0, 0x8000)
 #ifndef __ASSEMBLY__