| Message ID | 20190830195142.103564-1-swboyd@chromium.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 5e4b7e82d497580bc430576c4c9bce157dd72512 |
| Headers | show |
| Series | clk: qcom: gcc-sdm845: Use floor ops for sdcc clks | expand |
Hi, On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Some MMC cards fail to enumerate properly when inserted into an MMC slot > on sdm845 devices. This is because the clk ops for qcom clks round the > frequency up to the nearest rate instead of down to the nearest rate. > For example, the MMC driver requests a frequency of 52MHz from > clk_set_rate() but the qcom implementation for these clks rounds 52MHz > up to the next supported frequency of 100MHz. The MMC driver could be > modified to request clk rate ranges but for now we can fix this in the > clk driver by changing the rounding policy for this clk to be round down > instead of round up. Since all the MMC rates are expressed as "maximum" clock rates doing it like you are doing it now seems sane. > Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") > Reported-by: Douglas Anderson <dianders@chromium.org> > Cc: Taniya Das <tdas@codeaurora.org> > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > --- > > I suppose we need to do this for all the sdc clks in qcom driver? Seems like a good idea to me. > drivers/clk/qcom/gcc-sdm845.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Douglas Anderson <dianders@chromium.org> -Doug
Hi, On 8/31/2019 3:04 AM, Doug Anderson wrote: > Hi, > > On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd <swboyd@chromium.org> wrote: >> >> Some MMC cards fail to enumerate properly when inserted into an MMC slot >> on sdm845 devices. This is because the clk ops for qcom clks round the >> frequency up to the nearest rate instead of down to the nearest rate. >> For example, the MMC driver requests a frequency of 52MHz from >> clk_set_rate() but the qcom implementation for these clks rounds 52MHz >> up to the next supported frequency of 100MHz. The MMC driver could be >> modified to request clk rate ranges but for now we can fix this in the >> clk driver by changing the rounding policy for this clk to be round down >> instead of round up. > > Since all the MMC rates are expressed as "maximum" clock rates doing > it like you are doing it now seems sane. > > Looks like we need to update/track it for all SDCC clocks for all targets. >> Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") >> Reported-by: Douglas Anderson <dianders@chromium.org> >> Cc: Taniya Das <tdas@codeaurora.org> >> Signed-off-by: Stephen Boyd <swboyd@chromium.org> >> --- >> >> I suppose we need to do this for all the sdc clks in qcom driver? > > Seems like a good idea to me. > > >> drivers/clk/qcom/gcc-sdm845.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) > > Reviewed-by: Douglas Anderson <dianders@chromium.org> > > > -Doug >
Quoting Taniya Das (2019-09-03 08:52:12) > Hi, > > On 8/31/2019 3:04 AM, Doug Anderson wrote: > > Hi, > > > > On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd <swboyd@chromium.org> wrote: > >> > >> Some MMC cards fail to enumerate properly when inserted into an MMC slot > >> on sdm845 devices. This is because the clk ops for qcom clks round the > >> frequency up to the nearest rate instead of down to the nearest rate. > >> For example, the MMC driver requests a frequency of 52MHz from > >> clk_set_rate() but the qcom implementation for these clks rounds 52MHz > >> up to the next supported frequency of 100MHz. The MMC driver could be > >> modified to request clk rate ranges but for now we can fix this in the > >> clk driver by changing the rounding policy for this clk to be round down > >> instead of round up. > > > > Since all the MMC rates are expressed as "maximum" clock rates doing > > it like you are doing it now seems sane. > > > > > > Looks like we need to update/track it for all SDCC clocks for all targets. > Yeah. It would be great if you can send the patches. Otherwise I'll throw it on my todo list named 'forever'.
On 9/4/2019 4:17 AM, Stephen Boyd wrote: > Quoting Taniya Das (2019-09-03 08:52:12) >> Hi, >> >> On 8/31/2019 3:04 AM, Doug Anderson wrote: >>> Hi, >>> >>> On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd <swboyd@chromium.org> wrote: >>>> >>>> Some MMC cards fail to enumerate properly when inserted into an MMC slot >>>> on sdm845 devices. This is because the clk ops for qcom clks round the >>>> frequency up to the nearest rate instead of down to the nearest rate. >>>> For example, the MMC driver requests a frequency of 52MHz from >>>> clk_set_rate() but the qcom implementation for these clks rounds 52MHz >>>> up to the next supported frequency of 100MHz. The MMC driver could be >>>> modified to request clk rate ranges but for now we can fix this in the >>>> clk driver by changing the rounding policy for this clk to be round down >>>> instead of round up. >>> >>> Since all the MMC rates are expressed as "maximum" clock rates doing >>> it like you are doing it now seems sane. >>> >>> >> >> Looks like we need to update/track it for all SDCC clocks for all targets. >> > > Yeah. It would be great if you can send the patches. Otherwise I'll > throw it on my todo list named 'forever'. > Sure Stephen, would send out the patches fixing them.
Quoting Stephen Boyd (2019-08-30 12:51:42) > Some MMC cards fail to enumerate properly when inserted into an MMC slot > on sdm845 devices. This is because the clk ops for qcom clks round the > frequency up to the nearest rate instead of down to the nearest rate. > For example, the MMC driver requests a frequency of 52MHz from > clk_set_rate() but the qcom implementation for these clks rounds 52MHz > up to the next supported frequency of 100MHz. The MMC driver could be > modified to request clk rate ranges but for now we can fix this in the > clk driver by changing the rounding policy for this clk to be round down > instead of round up. > > Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") > Reported-by: Douglas Anderson <dianders@chromium.org> > Cc: Taniya Das <tdas@codeaurora.org> > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c index 7131dcf9b060..95be125c3bdd 100644 --- a/drivers/clk/qcom/gcc-sdm845.c +++ b/drivers/clk/qcom/gcc-sdm845.c @@ -685,7 +685,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { .name = "gcc_sdcc2_apps_clk_src", .parent_names = gcc_parent_names_10, .num_parents = 5, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -709,7 +709,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = { .name = "gcc_sdcc4_apps_clk_src", .parent_names = gcc_parent_names_0, .num_parents = 4, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, };
Some MMC cards fail to enumerate properly when inserted into an MMC slot on sdm845 devices. This is because the clk ops for qcom clks round the frequency up to the nearest rate instead of down to the nearest rate. For example, the MMC driver requests a frequency of 52MHz from clk_set_rate() but the qcom implementation for these clks rounds 52MHz up to the next supported frequency of 100MHz. The MMC driver could be modified to request clk rate ranges but for now we can fix this in the clk driver by changing the rounding policy for this clk to be round down instead of round up. Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") Reported-by: Douglas Anderson <dianders@chromium.org> Cc: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> --- I suppose we need to do this for all the sdc clks in qcom driver? drivers/clk/qcom/gcc-sdm845.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)