stable backports for "ath10k: restore QCA9880-AR1A (v1) detection"
diff mbox series

Message ID 8482869.vuxnZITksI@debian64
State Not Applicable
Delegated to: Kalle Valo
Headers show
  • stable backports for "ath10k: restore QCA9880-AR1A (v1) detection"
Related show

Commit Message

Christian Lamparter Sept. 7, 2019, 11:18 p.m. UTC

On Saturday, September 7, 2019 11:43:58 PM CEST Sasha Levin wrote:
> This commit has been processed because it contains a "Fixes:" tag,
> fixing commit: 1a7fecb766c8 ath10k: reset chip before reading chip_id in probe.
> The bot has tested the following trees: v5.2.13, v4.19.71, v4.14.142, v4.9.191, v4.4.191.
> v5.2.13: Failed to apply! Possible dependencies:
>     6d084ac27ab4 ("ath10k: initialise struct ath10k_bus params to zero")

The bot is right. Either add that patch or remove the "= {};" from the patch
that was sent to linux-wireless (based on "wireless-testing.git").

Alternatively, I've also added patches (as file attachments, I did this in
the hopes of fooling patchwork and the bots at least a bit... as well as
parking the patches for later). That said, I think this will go horribly
wrong because of this response. Since It has been a long time since I needed
a multi-version patch so I'm sorry for not being up-to-date with the latest
for-stable meta.

> v4.19.71: Failed to apply! Possible dependencies:
>     31324d17976e ("ath10k: support extended board data download for dual-band QCA9984")
>     [...] too much
> [...]: [...]
> NOTE: The patch will not be queued to stable trees until it is upstream.
> How should we proceed with this patch?
You could let loose your ci-bot on the attached patches and see if they would
do the trick. I'm very optimistic that this will need some more time though. 
So, "let's cross that bridge whenever we get there."


diff mbox series

From 38ac13d668f237941c8b77f16375f8f0e4de966a Mon Sep 17 00:00:00 2001
From: Christian Lamparter <>
Date: Mon, 25 Mar 2019 13:50:19 +0100
Subject: [PATCH 5.2] ath10k: restore QCA9880-AR1A (v1) detection
Cc: Kalle Valo <>

This patch restores the old behavior that read
the chip_id on the QCA988x before resetting the
chip. This needs to be done in this order since
the unsupported QCA988x AR1A chips fall off the
bus when resetted. Otherwise the next MMIO Op
after the reset causes a BUS ERROR and panic.

Cc: # 5.2
Fixes: 1a7fecb766c8 ("ath10k: reset chip before reading chip_id in probe")
Signed-off-by: Christian Lamparter <>
 drivers/net/wireless/ath/ath10k/pci.c | 36 +++++++++++++++++++--------
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -3490,7 +3490,7 @@  static int ath10k_pci_probe(struct pci_dev *pdev,
 	struct ath10k_pci *ar_pci;
 	enum ath10k_hw_rev hw_rev;
 	struct ath10k_bus_params bus_params;
-	bool pci_ps;
+	bool pci_ps, is_qca988x = false;
 	int (*pci_soft_reset)(struct ath10k *ar);
 	int (*pci_hard_reset)(struct ath10k *ar);
 	u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
@@ -3500,6 +3500,7 @@  static int ath10k_pci_probe(struct pci_dev *pdev,
 	case QCA988X_2_0_DEVICE_ID:
 		hw_rev = ATH10K_HW_QCA988X;
 		pci_ps = false;
+		is_qca988x = true;
 		pci_soft_reset = ath10k_pci_warm_reset;
 		pci_hard_reset = ath10k_pci_qca988x_chip_reset;
 		targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
@@ -3619,25 +3620,34 @@  static int ath10k_pci_probe(struct pci_dev *pdev,
 		goto err_deinit_irq;
+	bus_params.dev_type = ATH10K_DEV_TYPE_LL;
+	bus_params.link_can_suspend = true;
+	/* Read CHIP_ID before reset to catch QCA9880-AR1A v1 devices that
+	 * fall off the bus during chip_reset. These chips have the same pci
+	 * device id as the QCA9880 BR4A or 2R4E. So that's why the check.
+	 */
+	if (is_qca988x) {
+		bus_params.chip_id =
+			ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
+		if (bus_params.chip_id != 0xffffffff) {
+			if (!ath10k_pci_chip_is_supported(pdev->device,
+							  bus_params.chip_id))
+				goto err_unsupported;
+		}
+	}
 	ret = ath10k_pci_chip_reset(ar);
 	if (ret) {
 		ath10k_err(ar, "failed to reset chip: %d\n", ret);
 		goto err_free_irq;
-	bus_params.dev_type = ATH10K_DEV_TYPE_LL;
-	bus_params.link_can_suspend = true;
 	bus_params.chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
-	if (bus_params.chip_id == 0xffffffff) {
-		ath10k_err(ar, "failed to get chip id\n");
-		goto err_free_irq;
-	}
+	if (bus_params.chip_id == 0xffffffff)
+		goto err_unsupported;
-	if (!ath10k_pci_chip_is_supported(pdev->device, bus_params.chip_id)) {
-		ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n",
-			   pdev->device, bus_params.chip_id);
+	if (!ath10k_pci_chip_is_supported(pdev->device, bus_params.chip_id))
 		goto err_free_irq;
-	}
 	ret = ath10k_core_register(ar, &bus_params);
 	if (ret) {
@@ -3647,6 +3657,10 @@  static int ath10k_pci_probe(struct pci_dev *pdev,
 	return 0;
+	ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n",
+		   pdev->device, bus_params.chip_id);