diff mbox series

[06/17] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on ITS disable

Message ID 20190909134807.27978-7-maz@kernel.org (mailing list archive)
State Mainlined
Commit 363518f37a86acc515defae6d1ba91a6c7617de9
Headers show
Series [01/17] KVM: arm/arm64: vgic: Add LPI translation cache definition | expand

Commit Message

Marc Zyngier Sept. 9, 2019, 1:47 p.m. UTC 
If an ITS gets disabled, we need to make sure that further interrupts
won't hit in the cache. For that, we invalidate the translation cache
when the ITS is disabled.

Tested-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 virt/kvm/arm/vgic/vgic-its.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
index 09a179820816..05406bd92ce9 100644
--- a/virt/kvm/arm/vgic/vgic-its.c
+++ b/virt/kvm/arm/vgic/vgic-its.c
@@ -1597,6 +1597,8 @@  static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
 		goto out;
 
 	its->enabled = !!(val & GITS_CTLR_ENABLE);
+	if (!its->enabled)
+		vgic_its_invalidate_cache(kvm);
 
 	/*
 	 * Try to process any pending commands. This function bails out early