| Message ID | 20190916034111.2714-1-Amy.Shih@advantech.com.tw (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v2,1/1] hwmon: (nct7904) Fix the incorrect value of vsen_mask in nct7904_data struct. | expand |
On Mon, Sep 16, 2019 at 11:41:11AM +0800, Amy.Shih@advantech.com.tw wrote: > From: "amy.shih" <amy.shih@advantech.com.tw> > > Voltage sensors overlap with external temperature sensors. Detect > the multi-function of voltage, thermal diode and thermistor from > register VT_ADC_MD_REG to set value of vsen_mask in nct7904_data > struct. > > Signed-off-by: amy.shih <amy.shih@advantech.com.tw> > --- > Changes in v2: > - Moved the if statement to outside. > drivers/hwmon/nct7904.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c > index 95b447cfa24c..e2b3ec74491a 100644 > --- a/drivers/hwmon/nct7904.c > +++ b/drivers/hwmon/nct7904.c > @@ -921,6 +921,8 @@ static int nct7904_probe(struct i2c_client *client, > data->tcpu_mask &= ~bit; > else if (val == 0x1 || val == 0x2) > data->temp_mode |= bit; > + if (val != 0) > + data->vsen_mask &= ~(0x06 << (i * 2)); This is a slight change in semantics, since val != 0 includes 3. Should this maybe be as foillows ? if (val == 0) { data->tcpu_mask &= ~bit; else { if (val == 0x1 || val == 0x2) data->temp_mode |= bit; data->vsen_mask &= ~(0x06 << (i * 2)); } Also, please you have a look at the code further above. val = (ret & (0x03 << i)) >> (i * 2); Should that possibly be as follows ? val = (ret & (0x03 << i * 2)) >> (i * 2); ^^^^^ or, somewhat simplified, val = (ret >> i * 2) & 0x03; Thanks, Guenter
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c index 95b447cfa24c..e2b3ec74491a 100644 --- a/drivers/hwmon/nct7904.c +++ b/drivers/hwmon/nct7904.c @@ -921,6 +921,8 @@ static int nct7904_probe(struct i2c_client *client, data->tcpu_mask &= ~bit; else if (val == 0x1 || val == 0x2) data->temp_mode |= bit; + if (val != 0) + data->vsen_mask &= ~(0x06 << (i * 2)); } /* PECI */