[10/15] drm/amd/display: Use correct helpers to compute timeslots
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Message ID 97921519cf0c4f0684fa11c81693f077930662d7.1568833906.git.mikita.lipski@amd.com
State New
Headers show
Series
  • DSC MST support for AMDGPU
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Commit Message

Lipski, Mikita Sept. 18, 2019, 8:26 p.m. UTC
From: David Francis <David.Francis@amd.com>

We were using drm helpers to convert a timing into its
bandwidth, its bandwidth into pbn, and its pbn into timeslots

These helpers
-Did not take DSC timings into account
-Used the link rate and lane count of the link's aux device,
which are not the same as the link's current cap
-Did not take FEC into account (FEC reduces the PBN per timeslot)

For converting timing into PBN, use the new function
drm_dp_calc_pbn_mode_dsc that handles the DSC case

For converting PBN into time slots, amdgpu doesn't use the
'correct' atomic method (drm_dp_atomic_find_vcpi_slots), so
don't add a new helper to cover our approach. Use the same
means of calculating pbn per time slot as the DSC code.

Cc: Jerry Zuo <Jerry.Zuo@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c  | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

Patch
diff mbox series

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index b151a5a51a94..aaf3158534ab 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -188,8 +188,8 @@  bool dm_helpers_dp_mst_write_payload_allocation_table(
 	int slots = 0;
 	bool ret;
 	int clock;
-	int bpp = 0;
 	int pbn = 0;
+	int pbn_per_timeslot, bpp = 0;
 
 	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
 
@@ -233,11 +233,19 @@  bool dm_helpers_dp_mst_write_payload_allocation_table(
 
 		bpp = bpp * 3;
 
-		/* TODO need to know link rate */
-
-		pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+		if (stream->timing.flags.DSC)
+			pbn = drm_dp_calc_pbn_mode(clock,
+						   stream->timing.dsc_cfg.bits_per_pixel,
+						   true);
+		else
+#endif
+			pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 
-		slots = drm_dp_find_vcpi_slots(mst_mgr, pbn);
+		/* Convert kilobits per second / 64 (for 64 timeslots) to pbn (54/64 megabytes per second) */
+		pbn_per_timeslot = dc_link_bandwidth_kbps(
+				stream->link, dc_link_get_link_cap(stream->link)) / (8 * 1000 * 54);
+		slots = DIV_ROUND_UP(pbn, pbn_per_timeslot);
 		ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots);
 
 		if (!ret)