@@ -53,6 +53,11 @@ void free_pages(void *mem, unsigned long size)
spin_unlock(&lock);
}
+void free_pages_by_order(void *mem, unsigned long order)
+{
+ free_pages(mem, 1ul << (order + PAGE_SHIFT));
+}
+
void *alloc_page()
{
void *p;
@@ -14,5 +14,6 @@ void *alloc_page(void);
void *alloc_pages(unsigned long order);
void free_page(void *page);
void free_pages(void *mem, unsigned long size);
+void free_pages_by_order(void *mem, unsigned long order);
#endif
@@ -227,7 +227,7 @@ extra_params = -cpu qemu64,+umip
[vmx]
file = vmx.flat
-extra_params = -cpu host,+vmx -append "-exit_monitor_from_l2_test -ept_access* -vmx_smp* -vmx_vmcs_shadow_test"
+extra_params = -cpu host,+vmx -append "-exit_monitor_from_l2_test -ept_access* -vmx_smp* -vmx_vmcs_shadow_test -atomic_switch_overflow_msrs_test"
arch = x86_64
groups = vmx
@@ -8570,6 +8570,126 @@ static int invalid_msr_entry_failure(struct vmentry_failure *failure)
return VMX_TEST_VMEXIT;
}
+/*
+ * The max number of MSRs in an atomic switch MSR list is:
+ * (111B + 1) * 512 = 4096
+ *
+ * Each list entry consumes:
+ * 4-byte MSR index + 4 bytes reserved + 8-byte data = 16 bytes
+ *
+ * Allocate 128 kB to cover max_msr_list_size (i.e., 64 kB) and then some.
+ */
+static const u32 msr_list_page_order = 5;
+
+static void populate_msr_list(struct vmx_msr_entry *msr_list,
+ size_t byte_capacity, int count)
+{
+ int i;
+
+ for (i = 0; i < count; i++) {
+ msr_list[i].index = MSR_IA32_TSC;
+ msr_list[i].reserved = 0;
+ msr_list[i].value = 0x1234567890abcdef;
+ }
+
+ memset(msr_list + count, 0xff,
+ byte_capacity - count * sizeof(*msr_list));
+}
+
+static int max_msr_list_size(void)
+{
+ u32 vmx_misc = rdmsr(MSR_IA32_VMX_MISC);
+ u32 factor = ((vmx_misc & GENMASK(27, 25)) >> 25) + 1;
+
+ return factor * 512;
+}
+
+static void atomic_switch_msrs_test(int count)
+{
+ int max_allowed = max_msr_list_size();
+ int byte_capacity = 1ul << (msr_list_page_order + PAGE_SHIFT);
+ /* KVM signals VM-Abort if an exit MSR list exceeds the max size. */
+ int exit_count = MIN(count, max_allowed);
+
+ /*
+ * Check for the IA32_TSC MSR,
+ * available with the "TSC flag" and used to populate the MSR lists.
+ */
+ if (!(cpuid(1).d & (1 << 4))) {
+ report_skip(__func__);
+ return;
+ }
+
+ /* Set L2 guest. */
+ test_set_guest(v2_null_test_guest);
+
+ /* Setup atomic MSR switch lists. */
+ entry_msr_load = alloc_pages(msr_list_page_order);
+ exit_msr_load = alloc_pages(msr_list_page_order);
+ exit_msr_store = alloc_pages(msr_list_page_order);
+
+ vmcs_write(ENTER_MSR_LD_ADDR, (u64)entry_msr_load);
+ vmcs_write(EXIT_MSR_LD_ADDR, (u64)exit_msr_load);
+ vmcs_write(EXIT_MSR_ST_ADDR, (u64)exit_msr_store);
+
+ /*
+ * VM-Enter should succeed up to the max number of MSRs per list, and
+ * should not consume junk beyond the last entry.
+ */
+ populate_msr_list(entry_msr_load, byte_capacity, count);
+ populate_msr_list(exit_msr_load, byte_capacity, exit_count);
+ populate_msr_list(exit_msr_store, byte_capacity, exit_count);
+
+ vmcs_write(ENT_MSR_LD_CNT, count);
+ vmcs_write(EXI_MSR_LD_CNT, exit_count);
+ vmcs_write(EXI_MSR_ST_CNT, exit_count);
+
+ if (count <= max_allowed) {
+ /*
+ * enter_guest() verifies that VM-enter succeeds. After the
+ * test completes, the test harness (see test_run() in vmx.c)
+ * verifies that the VM-enter completes by reaching the end of
+ * v2_null_test_guest().
+ */
+ enter_guest();
+ } else {
+ u32 exit_reason;
+ u32 exit_reason_want;
+ u32 exit_qual;
+
+ enter_guest_with_invalid_guest_state();
+
+ exit_reason = vmcs_read(EXI_REASON);
+ exit_reason_want = VMX_FAIL_MSR | VMX_ENTRY_FAILURE;
+ report("exit_reason, %u, is %u.",
+ exit_reason == exit_reason_want, exit_reason,
+ exit_reason_want);
+
+ exit_qual = vmcs_read(EXI_QUALIFICATION);
+ report("exit_qual, %u, is %u.", exit_qual == max_allowed + 1,
+ exit_qual, max_allowed + 1);
+
+ /* Enter the guest (with valid counts) to set guest_finished. */
+ vmcs_write(ENT_MSR_LD_CNT, 0);
+ vmcs_write(EXI_MSR_LD_CNT, 0);
+ vmcs_write(EXI_MSR_ST_CNT, 0);
+ enter_guest();
+ }
+
+ free_pages_by_order(entry_msr_load, msr_list_page_order);
+ free_pages_by_order(exit_msr_load, msr_list_page_order);
+ free_pages_by_order(exit_msr_store, msr_list_page_order);
+}
+
+static void atomic_switch_max_msrs_test(void)
+{
+ atomic_switch_msrs_test(max_msr_list_size());
+}
+
+static void atomic_switch_overflow_msrs_test(void)
+{
+ atomic_switch_msrs_test(max_msr_list_size() + 1);
+}
#define TEST(name) { #name, .v2 = name }
@@ -8660,5 +8780,8 @@ struct vmx_test vmx_tests[] = {
TEST(ept_access_test_paddr_read_execute_ad_enabled),
TEST(ept_access_test_paddr_not_present_page_fault),
TEST(ept_access_test_force_2m_page),
+ /* Atomic MSR switch tests. */
+ TEST(atomic_switch_max_msrs_test),
+ TEST(atomic_switch_overflow_msrs_test),
{ NULL, NULL, NULL, NULL, NULL, {0} },
};