[3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent
diff mbox series

Message ID E1iBz55-0008Mj-CX@rmk-PC.armlinux.org.uk
State New
Headers show
Series
  • Fix sdhci-of-esdhc DMA coherency
Related show

Commit Message

Russell King Sept. 22, 2019, 10:27 a.m. UTC
The LX2160A esdhc controllers are setup by the driver to be DMA
coherent, but without marking them as such in DT, Linux thinks they
are not.  This can lead to random sporadic DMA errors, even to the
extent of preventing boot, such as:

mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card

These are caused by the device's descriptor fetch hitting speculatively
loaded CPU cache lines that the CPU does not see through the normal,
non-cacheable DMA coherent mapping that it uses for non-coherent
devices.

DT and the device must agree wrt whether the device is DMA coherent or
not.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Leo Li Sept. 23, 2019, 4 p.m. UTC | #1
On Sun, Sep 22, 2019 at 2:26 PM Russell King <rmk+kernel@armlinux.org.uk> wrote:
>
> The LX2160A esdhc controllers are setup by the driver to be DMA
> coherent, but without marking them as such in DT, Linux thinks they
> are not.  This can lead to random sporadic DMA errors, even to the
> extent of preventing boot, such as:
>
> mmc0: ADMA error
> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
> mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
> mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
> mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
> mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
> mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
> mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
> mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
> mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
> mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
> mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
> mmc0: sdhci: Host ctl2: 0x00000000
> mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
> mmc0: sdhci: ============================================
> mmc0: error -5 whilst initialising SD card
>
> These are caused by the device's descriptor fetch hitting speculatively
> loaded CPU cache lines that the CPU does not see through the normal,
> non-cacheable DMA coherent mapping that it uses for non-coherent
> devices.
>
> DT and the device must agree wrt whether the device is DMA coherent or
> not.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

Acked-by: Li Yang <leoyang.li@nxp.com>

> ---
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 36b153e3da47..508af23edef0 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -593,6 +593,7 @@
>                         reg = <0x0 0x2140000 0x0 0x10000>;
>                         interrupts = <0 28 0x4>; /* Level high type */
>                         clocks = <&clockgen 4 1>;
> +                       dma-coherent;
>                         voltage-ranges = <1800 1800 3300 3300>;
>                         sdhci,auto-cmd12;
>                         little-endian;
> @@ -605,6 +606,7 @@
>                         reg = <0x0 0x2150000 0x0 0x10000>;
>                         interrupts = <0 63 0x4>; /* Level high type */
>                         clocks = <&clockgen 4 1>;
> +                       dma-coherent;
>                         voltage-ranges = <1800 1800 3300 3300>;
>                         sdhci,auto-cmd12;
>                         broken-cd;
> --
> 2.7.4
>
Ulf Hansson Sept. 23, 2019, 9:26 p.m. UTC | #2
On Sun, 22 Sep 2019 at 12:29, Russell King <rmk+kernel@armlinux.org.uk> wrote:
>
> The LX2160A esdhc controllers are setup by the driver to be DMA
> coherent, but without marking them as such in DT, Linux thinks they
> are not.  This can lead to random sporadic DMA errors, even to the
> extent of preventing boot, such as:
>
> mmc0: ADMA error
> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
> mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
> mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
> mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
> mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
> mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
> mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
> mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
> mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
> mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
> mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
> mmc0: sdhci: Host ctl2: 0x00000000
> mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
> mmc0: sdhci: ============================================
> mmc0: error -5 whilst initialising SD card
>
> These are caused by the device's descriptor fetch hitting speculatively
> loaded CPU cache lines that the CPU does not see through the normal,
> non-cacheable DMA coherent mapping that it uses for non-coherent
> devices.
>
> DT and the device must agree wrt whether the device is DMA coherent or
> not.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

As I am picking up patch1 and patch2 from this series, I can also help
out and pick up this one, if that is okay by people?

Kind regards
Uffe

> ---
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 36b153e3da47..508af23edef0 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -593,6 +593,7 @@
>                         reg = <0x0 0x2140000 0x0 0x10000>;
>                         interrupts = <0 28 0x4>; /* Level high type */
>                         clocks = <&clockgen 4 1>;
> +                       dma-coherent;
>                         voltage-ranges = <1800 1800 3300 3300>;
>                         sdhci,auto-cmd12;
>                         little-endian;
> @@ -605,6 +606,7 @@
>                         reg = <0x0 0x2150000 0x0 0x10000>;
>                         interrupts = <0 63 0x4>; /* Level high type */
>                         clocks = <&clockgen 4 1>;
> +                       dma-coherent;
>                         voltage-ranges = <1800 1800 3300 3300>;
>                         sdhci,auto-cmd12;
>                         broken-cd;
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Leo Li Sept. 24, 2019, 3:41 a.m. UTC | #3
> -----Original Message-----
> From: Ulf Hansson <ulf.hansson@linaro.org>
> Sent: Monday, September 23, 2019 4:27 PM
> To: Russell King <rmk+kernel@armlinux.org.uk>
> Cc: Robin Murphy <robin.murphy@arm.com>; dann frazier
> <dann.frazier@canonical.com>; Will Deacon <will.deacon@arm.com>;
> Nicolin Chen <nicoleotsuka@gmail.com>; Y.b. Lu <yangbo.lu@nxp.com>;
> Christoph Hellwig <hch@lst.de>; Mark Rutland <mark.rutland@arm.com>;
> DTML <devicetree@vger.kernel.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Linux
> ARM <linux-arm-kernel@lists.infradead.org>
> Subject: Re: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma
> coherent
> 
> On Sun, 22 Sep 2019 at 12:29, Russell King <rmk+kernel@armlinux.org.uk>
> wrote:
> >
> > The LX2160A esdhc controllers are setup by the driver to be DMA
> > coherent, but without marking them as such in DT, Linux thinks they
> > are not.  This can lead to random sporadic DMA errors, even to the
> > extent of preventing boot, such as:
> >
> > mmc0: ADMA error
> > mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> > mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
> > mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
> > mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
> > mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
> > mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
> > mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
> > mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
> > mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
> > mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> > mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
> > mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
> > mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
> > mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
> > mmc0: sdhci: Host ctl2: 0x00000000
> > mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
> > mmc0: sdhci: ============================================
> > mmc0: error -5 whilst initialising SD card
> >
> > These are caused by the device's descriptor fetch hitting
> > speculatively loaded CPU cache lines that the CPU does not see through
> > the normal, non-cacheable DMA coherent mapping that it uses for
> > non-coherent devices.
> >
> > DT and the device must agree wrt whether the device is DMA coherent or
> > not.
> >
> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> 
> As I am picking up patch1 and patch2 from this series, I can also help out and
> pick up this one, if that is okay by people?

There is some concern recently from linux-next maintainer about this causing potential conflicts.  https://lkml.org/lkml/2019/9/15/225

Regards,
Leo
Robin Murphy Sept. 24, 2019, 6:04 p.m. UTC | #4
On 24/09/2019 04:41, Leo Li wrote:
> 
> 
>> -----Original Message-----
>> From: Ulf Hansson <ulf.hansson@linaro.org>
>> Sent: Monday, September 23, 2019 4:27 PM
>> To: Russell King <rmk+kernel@armlinux.org.uk>
>> Cc: Robin Murphy <robin.murphy@arm.com>; dann frazier
>> <dann.frazier@canonical.com>; Will Deacon <will.deacon@arm.com>;
>> Nicolin Chen <nicoleotsuka@gmail.com>; Y.b. Lu <yangbo.lu@nxp.com>;
>> Christoph Hellwig <hch@lst.de>; Mark Rutland <mark.rutland@arm.com>;
>> DTML <devicetree@vger.kernel.org>; Leo Li <leoyang.li@nxp.com>; Rob
>> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Linux
>> ARM <linux-arm-kernel@lists.infradead.org>
>> Subject: Re: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma
>> coherent
>>
>> On Sun, 22 Sep 2019 at 12:29, Russell King <rmk+kernel@armlinux.org.uk>
>> wrote:
>>>
>>> The LX2160A esdhc controllers are setup by the driver to be DMA
>>> coherent, but without marking them as such in DT, Linux thinks they
>>> are not.  This can lead to random sporadic DMA errors, even to the
>>> extent of preventing boot, such as:
>>>
>>> mmc0: ADMA error
>>> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
>>> mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
>>> mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
>>> mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
>>> mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
>>> mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
>>> mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
>>> mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
>>> mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
>>> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
>>> mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
>>> mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
>>> mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
>>> mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
>>> mmc0: sdhci: Host ctl2: 0x00000000
>>> mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
>>> mmc0: sdhci: ============================================
>>> mmc0: error -5 whilst initialising SD card
>>>
>>> These are caused by the device's descriptor fetch hitting
>>> speculatively loaded CPU cache lines that the CPU does not see through
>>> the normal, non-cacheable DMA coherent mapping that it uses for
>>> non-coherent devices.
>>>
>>> DT and the device must agree wrt whether the device is DMA coherent or
>>> not.
>>>
>>> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
>>
>> As I am picking up patch1 and patch2 from this series, I can also help out and
>> pick up this one, if that is okay by people?
> 
> There is some concern recently from linux-next maintainer about this causing potential conflicts.  https://lkml.org/lkml/2019/9/15/225

In principle, it should be fine for #2 and #3 to go via separate trees - 
#3 aligns the DT with the existing behaviour of the driver, while #2 
will make the driver behave correctly whichever state the DT is in.

Robin.
Ulf Hansson Sept. 27, 2019, 6:35 p.m. UTC | #5
On Tue, 24 Sep 2019 at 20:04, Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 24/09/2019 04:41, Leo Li wrote:
> >
> >
> >> -----Original Message-----
> >> From: Ulf Hansson <ulf.hansson@linaro.org>
> >> Sent: Monday, September 23, 2019 4:27 PM
> >> To: Russell King <rmk+kernel@armlinux.org.uk>
> >> Cc: Robin Murphy <robin.murphy@arm.com>; dann frazier
> >> <dann.frazier@canonical.com>; Will Deacon <will.deacon@arm.com>;
> >> Nicolin Chen <nicoleotsuka@gmail.com>; Y.b. Lu <yangbo.lu@nxp.com>;
> >> Christoph Hellwig <hch@lst.de>; Mark Rutland <mark.rutland@arm.com>;
> >> DTML <devicetree@vger.kernel.org>; Leo Li <leoyang.li@nxp.com>; Rob
> >> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Linux
> >> ARM <linux-arm-kernel@lists.infradead.org>
> >> Subject: Re: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma
> >> coherent
> >>
> >> On Sun, 22 Sep 2019 at 12:29, Russell King <rmk+kernel@armlinux.org.uk>
> >> wrote:
> >>>
> >>> The LX2160A esdhc controllers are setup by the driver to be DMA
> >>> coherent, but without marking them as such in DT, Linux thinks they
> >>> are not.  This can lead to random sporadic DMA errors, even to the
> >>> extent of preventing boot, such as:
> >>>
> >>> mmc0: ADMA error
> >>> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> >>> mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
> >>> mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
> >>> mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
> >>> mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
> >>> mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
> >>> mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
> >>> mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
> >>> mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
> >>> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> >>> mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
> >>> mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
> >>> mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
> >>> mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
> >>> mmc0: sdhci: Host ctl2: 0x00000000
> >>> mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
> >>> mmc0: sdhci: ============================================
> >>> mmc0: error -5 whilst initialising SD card
> >>>
> >>> These are caused by the device's descriptor fetch hitting
> >>> speculatively loaded CPU cache lines that the CPU does not see through
> >>> the normal, non-cacheable DMA coherent mapping that it uses for
> >>> non-coherent devices.
> >>>
> >>> DT and the device must agree wrt whether the device is DMA coherent or
> >>> not.
> >>>
> >>> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> >>
> >> As I am picking up patch1 and patch2 from this series, I can also help out and
> >> pick up this one, if that is okay by people?
> >
> > There is some concern recently from linux-next maintainer about this causing potential conflicts.  https://lkml.org/lkml/2019/9/15/225
>
> In principle, it should be fine for #2 and #3 to go via separate trees -
> #3 aligns the DT with the existing behaviour of the driver, while #2
> will make the driver behave correctly whichever state the DT is in.
>
> Robin.

That's right, so I am leaving this patch for arm-soc people to pick up then.

Kind regards
Uffe
Shawn Guo Oct. 7, 2019, 12:42 p.m. UTC | #6
On Sun, Sep 22, 2019 at 11:27:03AM +0100, Russell King wrote:
> The LX2160A esdhc controllers are setup by the driver to be DMA
> coherent, but without marking them as such in DT, Linux thinks they
> are not.  This can lead to random sporadic DMA errors, even to the
> extent of preventing boot, such as:
> 
> mmc0: ADMA error
> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
> mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
> mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
> mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
> mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
> mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
> mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
> mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
> mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
> mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
> mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
> mmc0: sdhci: Host ctl2: 0x00000000
> mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
> mmc0: sdhci: ============================================
> mmc0: error -5 whilst initialising SD card
> 
> These are caused by the device's descriptor fetch hitting speculatively
> loaded CPU cache lines that the CPU does not see through the normal,
> non-cacheable DMA coherent mapping that it uses for non-coherent
> devices.
> 
> DT and the device must agree wrt whether the device is DMA coherent or
> not.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

Applied, thanks.

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 36b153e3da47..508af23edef0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -593,6 +593,7 @@ 
 			reg = <0x0 0x2140000 0x0 0x10000>;
 			interrupts = <0 28 0x4>; /* Level high type */
 			clocks = <&clockgen 4 1>;
+			dma-coherent;
 			voltage-ranges = <1800 1800 3300 3300>;
 			sdhci,auto-cmd12;
 			little-endian;
@@ -605,6 +606,7 @@ 
 			reg = <0x0 0x2150000 0x0 0x10000>;
 			interrupts = <0 63 0x4>; /* Level high type */
 			clocks = <&clockgen 4 1>;
+			dma-coherent;
 			voltage-ranges = <1800 1800 3300 3300>;
 			sdhci,auto-cmd12;
 			broken-cd;