@@ -531,7 +531,7 @@ static void vc4_plane_calc_load(struct drm_plane_state *state)
vc4_state->crtc_h);
vc4_state->membus_load += vc4_state->src_w[i] *
vc4_state->src_h[i] * vscale_factor *
- fb->format->cpp[i];
+ fb->format->bpp[i] / 8;
vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w;
}
@@ -646,7 +646,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
vc4_state->offsets[i] += vc4_state->src_x /
(i ? h_subsample : 1) *
- fb->format->cpp[i];
+ fb->format->bpp[i] / 8;
}
break;
@@ -654,7 +654,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: {
u32 tile_size_shift = 12; /* T tiles are 4kb */
/* Whole-tile offsets, mostly for setting the pitch. */
- u32 tile_w_shift = fb->format->cpp[0] == 2 ? 6 : 5;
+ u32 tile_w_shift = fb->format->bpp[0] == 16 ? 6 : 5;
u32 tile_h_shift = 5; /* 16 and 32bpp are 32 pixels high */
u32 tile_w_mask = (1 << tile_w_shift) - 1;
/* The height mask on 32-bit-per-pixel tiles is 63, i.e. twice
@@ -749,7 +749,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
return -EINVAL;
}
- pix_per_tile = tile_w / fb->format->cpp[0];
+ pix_per_tile = tile_w / (fb->format->bpp[0] / 8);
tile = vc4_state->src_x / pix_per_tile;
x_off = vc4_state->src_x % pix_per_tile;
@@ -763,7 +763,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
tile_w;
vc4_state->offsets[i] += x_off /
(i ? h_subsample : 1) *
- fb->format->cpp[i];
+ fb->format->bpp[i] / 8;
}
pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);
cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp. Signed-off-by: Sandy Huang <hjc@rock-chips.com> --- drivers/gpu/drm/vc4/vc4_plane.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)