diff mbox series

libxc/x86: correct overflow avoidance check in AMD CPUID handling

Message ID c15e735a-089a-8c9e-5bb4-f2edd781819e@suse.com (mailing list archive)
State New, archived
Headers show
Series libxc/x86: correct overflow avoidance check in AMD CPUID handling | expand

Commit Message

Jan Beulich Sept. 25, 2019, 8:34 a.m. UTC 
Commit df29d03f1d ("libxc/x86: avoid certain overflows in CPUID APIC ID
adjustments" introduced a one bit too narrow mask when checking whether
multiplying by 1 (in particular in leaf 1) would result in overflow.

Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>

Comments

Andrew Cooper Sept. 25, 2019, 11:33 a.m. UTC | #1 
On 25/09/2019 09:34, Jan Beulich wrote:
> Commit df29d03f1d ("libxc/x86: avoid certain overflows in CPUID APIC ID
> adjustments" introduced a one bit too narrow mask when checking whether
> multiplying by 1 (in particular in leaf 1) would result in overflow.
>
> Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff mbox series

Patch

--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -403,7 +403,7 @@  static void amd_xc_cpuid_policy(const st
          * - incrementing ApicIdCoreSize when it's zero (which changes the
          *   meaning of bits 7:0).
          */
-        if ( (regs[2] & 0x7fu) < 0x7fu )
+        if ( (regs[2] & 0xffu) < 0x7fu )
         {
             if ( (regs[2] & 0xf000u) && (regs[2] & 0xf000u) != 0xf000u )
                 regs[2] = ((regs[2] + 0x1000u) & 0xf000u) | (regs[2] & 0xffu);