[4/5] drm/i915: Add intel_atomic_crtc_state_for_each_plane_state()
diff mbox series

Message ID 20190927131432.15978-5-ville.syrjala@linux.intel.com
State New
Headers show
Series
  • [1/5] drm/i915: Switch intel_legacy_cursor_update() to intel_ types
Related show

Commit Message

Ville Syrjälä Sept. 27, 2019, 1:14 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

drm_atomic_crtc_state_for_each_plane_state() can't be used after
we have the uapi vs. hw split. Roll our own :(

Truthfully I'd like to nuke this thing entirely, but that
requires some more work so let's live with it for now.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic.c  | 10 ++
 drivers/gpu/drm/i915/display/intel_atomic.h  |  6 ++
 drivers/gpu/drm/i915/display/intel_display.h |  9 ++
 drivers/gpu/drm/i915/intel_pm.c              | 99 ++++++++++----------
 4 files changed, 73 insertions(+), 51 deletions(-)

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index c5a552a69752..ef714b258707 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -442,3 +442,13 @@  intel_atomic_get_crtc_state(struct drm_atomic_state *state,
 
 	return to_intel_crtc_state(crtc_state);
 }
+
+const struct intel_plane_state *
+__intel_atomic_get_current_plane_state(struct intel_atomic_state *state,
+				       struct intel_plane *plane)
+{
+	if (state->base.planes[drm_plane_index(&plane->base)].state)
+		return to_intel_plane_state(state->base.planes[drm_plane_index(&plane->base)].state);
+
+	return to_intel_plane_state(plane->base.state);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h b/drivers/gpu/drm/i915/display/intel_atomic.h
index 58065d3161a3..02d626e6ebf1 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic.h
@@ -16,8 +16,10 @@  struct drm_crtc_state;
 struct drm_device;
 struct drm_i915_private;
 struct drm_property;
+struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_plane;
 
 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
 						const struct drm_connector_state *state,
@@ -46,4 +48,8 @@  int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 			       struct intel_crtc *intel_crtc,
 			       struct intel_crtc_state *crtc_state);
 
+const struct intel_plane_state *
+__intel_atomic_get_current_plane_state(struct intel_atomic_state *state,
+				       struct intel_plane *plane);
+
 #endif /* __INTEL_ATOMIC_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 4b9e18e5a263..ac374345726e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -440,6 +440,15 @@  enum phy_fia {
 	     (__i)--) \
 		for_each_if(crtc)
 
+#define intel_for_each_plane_mask(plane, dev, plane_mask) \
+	list_for_each_entry((plane), &(dev)->mode_config.plane_list, base.head) \
+		for_each_if ((plane_mask) & drm_plane_mask(&(plane)->base))
+
+#define intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state, state) \
+	intel_for_each_plane_mask((plane), (state)->base.dev, (crtc_state)->base.plane_mask) \
+		for_each_if (((plane_state) =				\
+			      __intel_atomic_get_current_plane_state((state), (plane))))
+
 void intel_link_compute_m_n(u16 bpp, int nlanes,
 			    int pixel_clock, int link_clock,
 			    struct intel_link_m_n *m_n,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bfcf03ab5245..c2861263ad42 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3084,13 +3084,13 @@  static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv,
 /* Compute new watermarks for the pipe */
 static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 {
-	struct drm_atomic_state *state = crtc_state->base.state;
-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+	const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->base.state);
 	struct intel_pipe_wm *pipe_wm;
-	struct drm_device *dev = state->dev;
-	const struct drm_i915_private *dev_priv = to_i915(dev);
-	struct drm_plane *plane;
-	const struct drm_plane_state *plane_state;
+	struct intel_plane *plane;
+	const struct intel_plane_state *plane_state;
 	const struct intel_plane_state *pristate = NULL;
 	const struct intel_plane_state *sprstate = NULL;
 	const struct intel_plane_state *curstate = NULL;
@@ -3099,15 +3099,14 @@  static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 
 	pipe_wm = &crtc_state->wm.ilk.optimal;
 
-	drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &crtc_state->base) {
-		const struct intel_plane_state *ps = to_intel_plane_state(plane_state);
-
-		if (plane->type == DRM_PLANE_TYPE_PRIMARY)
-			pristate = ps;
-		else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
-			sprstate = ps;
-		else if (plane->type == DRM_PLANE_TYPE_CURSOR)
-			curstate = ps;
+	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
+						     crtc_state, state) {
+		if (plane->id == PLANE_PRIMARY)
+			pristate = plane_state;
+		else if (plane->id == PLANE_SPRITE0)
+			sprstate = plane_state;
+		else if (plane->id == PLANE_CURSOR)
+			curstate = plane_state;
 	}
 
 	pipe_wm->pipe_enabled = crtc_state->base.active;
@@ -3129,7 +3128,7 @@  static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 		usable_level = 0;
 
 	memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
-	ilk_compute_wm_level(dev_priv, intel_crtc, 0, crtc_state,
+	ilk_compute_wm_level(dev_priv, crtc, 0, crtc_state,
 			     pristate, sprstate, curstate, &pipe_wm->wm[0]);
 
 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
@@ -3143,7 +3142,7 @@  static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	for (level = 1; level <= usable_level; level++) {
 		struct intel_wm_level *wm = &pipe_wm->wm[level];
 
-		ilk_compute_wm_level(dev_priv, intel_crtc, level, crtc_state,
+		ilk_compute_wm_level(dev_priv, crtc, level, crtc_state,
 				     pristate, sprstate, curstate, wm);
 
 		/*
@@ -4119,13 +4118,14 @@  skl_pipe_downscale_amount(const struct intel_crtc_state *crtc_state)
 	return pipe_downscale;
 }
 
-int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
+int skl_check_pipe_max_pixel_rate(struct intel_crtc *crtc,
 				  struct intel_crtc_state *crtc_state)
 {
-	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
-	struct drm_atomic_state *state = crtc_state->base.state;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->base.state);
+	struct intel_plane *plane;
+	const struct intel_plane_state *plane_state;
 	int crtc_clock, dotclk;
 	u32 pipe_max_pixel_rate;
 	uint_fixed_16_16_t pipe_downscale;
@@ -4134,12 +4134,11 @@  int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 	if (!crtc_state->base.enable)
 		return 0;
 
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) {
+	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
+						     crtc_state, state) {
 		uint_fixed_16_16_t plane_downscale;
 		uint_fixed_16_16_t fp_9_div_8 = div_fixed16(9, 8);
 		int bpp;
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
 
 		if (!intel_wm_plane_visible(crtc_state, plane_state))
 			continue;
@@ -4160,7 +4159,7 @@  int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 	pipe_downscale = mul_fixed16(pipe_downscale, max_downscale);
 
 	crtc_clock = crtc_state->base.adjusted_mode.crtc_clock;
-	dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk;
+	dotclk = state->cdclk.logical.cdclk;
 
 	if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10)
 		dotclk *= 2;
@@ -4226,29 +4225,28 @@  skl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
 				 u64 *plane_data_rate,
 				 u64 *uv_plane_data_rate)
 {
-	struct drm_atomic_state *state = crtc_state->base.state;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->base.state);
+	struct intel_plane *plane;
+	const struct intel_plane_state *plane_state;
 	u64 total_data_rate = 0;
 
 	if (WARN_ON(!state))
 		return 0;
 
 	/* Calculate and cache data rate for each plane */
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) {
-		enum plane_id plane_id = to_intel_plane(plane)->id;
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
+	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
+						     crtc_state, state) {
 		u64 rate;
 
 		/* packed/y */
 		rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
-		plane_data_rate[plane_id] = rate;
+		plane_data_rate[plane->id] = rate;
 		total_data_rate += rate;
 
 		/* uv-plane */
 		rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
-		uv_plane_data_rate[plane_id] = rate;
+		uv_plane_data_rate[plane->id] = rate;
 		total_data_rate += rate;
 	}
 
@@ -4259,30 +4257,30 @@  static u64
 icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
 				 u64 *plane_data_rate)
 {
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->base.state);
+	struct intel_plane *plane;
+	const struct intel_plane_state *plane_state;
 	u64 total_data_rate = 0;
 
 	if (WARN_ON(!crtc_state->base.state))
 		return 0;
 
 	/* Calculate and cache data rate for each plane */
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->base) {
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
-		enum plane_id plane_id = to_intel_plane(plane)->id;
+	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
+						     crtc_state, state) {
 		u64 rate;
 
 		if (!plane_state->planar_linked_plane) {
 			rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
-			plane_data_rate[plane_id] = rate;
+			plane_data_rate[plane->id] = rate;
 			total_data_rate += rate;
 		} else {
 			enum plane_id y_plane_id;
 
 			/*
 			 * The slave plane might not iterate in
-			 * drm_atomic_crtc_state_for_each_plane_state(),
+			 * intel_atomic_crtc_state_for_each_plane_state(),
 			 * and needs the master plane state which may be
 			 * NULL if we try get_new_plane_state(), so we
 			 * always calculate from the master.
@@ -4297,7 +4295,7 @@  icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
 			total_data_rate += rate;
 
 			rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
-			plane_data_rate[plane_id] = rate;
+			plane_data_rate[plane->id] = rate;
 			total_data_rate += rate;
 		}
 	}
@@ -5063,10 +5061,12 @@  static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
 
 static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
 {
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->base.state);
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
 	struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct intel_plane *plane;
+	const struct intel_plane_state *plane_state;
 	int ret;
 
 	/*
@@ -5075,11 +5075,8 @@  static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
 	 */
 	memset(pipe_wm->planes, 0, sizeof(pipe_wm->planes));
 
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state,
-						   &crtc_state->base) {
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
-
+	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
+						     crtc_state, state) {
 		if (INTEL_GEN(dev_priv) >= 11)
 			ret = icl_build_plane_wm(crtc_state, plane_state);
 		else