diff mbox series

[17/22] drm/i915: set num_fence_regs to 0 if there is no aperture

Message ID 20190927173409.31175-18-matthew.auld@intel.com (mailing list archive)
State New, archived
Headers show
Series LMEM basics | expand

Commit Message

Matthew Auld Sept. 27, 2019, 5:34 p.m. UTC 
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We can't fence anything without aperture.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Chris Wilson Sept. 27, 2019, 8:49 p.m. UTC | #1 
Quoting Matthew Auld (2019-09-27 18:34:04)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> We can't fence anything without aperture.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> index 615a9f4ef30c..e15e4e247576 100644
> --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
> @@ -828,8 +828,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
>  
>         detect_bit_6_swizzle(i915);
>  
> -       if (INTEL_GEN(i915) >= 7 &&
> -           !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
> +       if (!HAS_MAPPABLE_APERTURE(i915))

You have the actual i915_ggtt!
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 615a9f4ef30c..e15e4e247576 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -828,8 +828,10 @@  void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
 
 	detect_bit_6_swizzle(i915);
 
-	if (INTEL_GEN(i915) >= 7 &&
-	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
+	if (!HAS_MAPPABLE_APERTURE(i915))
+		num_fences = 0;
+	else if (INTEL_GEN(i915) >= 7 &&
+		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
 		num_fences = 32;
 	else if (INTEL_GEN(i915) >= 4 ||
 		 IS_I945G(i915) || IS_I945GM(i915) ||