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[2/3] drm/sun4i: dsi: fix DRQ calculation

Message ID 20191001080253.6135-3-icenowy@aosc.io (mailing list archive)
State New, archived
Headers show
Series drm/sun4i: dsi: misc timing fixes | expand

Commit Message

Icenowy Zheng Oct. 1, 2019, 8:02 a.m. UTC
According to the BSP source code, when calculating the magic DRQ value
outside burst mode, a formula of "lcd_ht - lcd_x - lcd_hbp", which is
interpreted as right margin (HFP value). However, currently the
sun6i_mipi_dsi driver code calculates it wrongly as HFP + sync length,
which lead to timing error.

Fix the DRQ calculation by change it to use HFP.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Jagan Teki Oct. 3, 2019, 4:37 a.m. UTC | #1
Hi,

On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng <icenowy@aosc.io> wrote:
>
> According to the BSP source code, when calculating the magic DRQ value
> outside burst mode, a formula of "lcd_ht - lcd_x - lcd_hbp", which is
> interpreted as right margin (HFP value). However, currently the
> sun6i_mipi_dsi driver code calculates it wrongly as HFP + sync length,
> which lead to timing error.
>
> Fix the DRQ calculation by change it to use HFP.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index c86e11631ebc..2d3e822a7739 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -436,9 +436,9 @@ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
>                              SUN6I_DSI_BURST_LINE_SYNC_POINT(SUN6I_DSI_SYNC_POINT));
>
>                 val = SUN6I_DSI_TCON_DRQ_ENABLE_MODE;
> -       } else if ((mode->hsync_end - mode->hdisplay) > 20) {
> +       } else if ((mode->hsync_start - mode->hdisplay) > 20) {
>                 /* Maaaaaagic */
> -               u16 drq = (mode->hsync_end - mode->hdisplay) - 20;
> +               u16 drq = (mode->hsync_start - mode->hdisplay) - 20;

I have similar patch in the ML, which required commit details
commented by Chen-Yu [1]. So, I'm trying to send it accordingly, let
me know if you have issues.

[1] https://patchwork.freedesktop.org/patch/305920/
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Patch

diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index c86e11631ebc..2d3e822a7739 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -436,9 +436,9 @@  static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
 			     SUN6I_DSI_BURST_LINE_SYNC_POINT(SUN6I_DSI_SYNC_POINT));
 
 		val = SUN6I_DSI_TCON_DRQ_ENABLE_MODE;
-	} else if ((mode->hsync_end - mode->hdisplay) > 20) {
+	} else if ((mode->hsync_start - mode->hdisplay) > 20) {
 		/* Maaaaaagic */
-		u16 drq = (mode->hsync_end - mode->hdisplay) - 20;
+		u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
 
 		drq *= mipi_dsi_pixel_format_to_bpp(device->format);
 		drq /= 32;