From patchwork Wed Oct 2 15:19:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin GAIGNARD X-Patchwork-Id: 11171319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C512916B1 for ; Wed, 2 Oct 2019 15:19:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A2D4121848 for ; Wed, 2 Oct 2019 15:19:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="qvqzLCPt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728488AbfJBPT0 (ORCPT ); Wed, 2 Oct 2019 11:19:26 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:13402 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726852AbfJBPTZ (ORCPT ); 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Wed, 2 Oct 2019 15:19:10 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 43A8D2D3771; Wed, 2 Oct 2019 17:19:10 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 2 Oct 2019 17:19:10 +0200 Received: from localhost (10.201.20.122) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 2 Oct 2019 17:19:09 +0200 From: Benjamin Gaignard To: , , , CC: , , , , , Benjamin Gaignard Subject: [PATCH] dt-bindings: hwlock: Convert stm32 hwspinlock bindings to json-schema Date: Wed, 2 Oct 2019 17:19:07 +0200 Message-ID: <20191002151907.15986-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-Originating-IP: [10.201.20.122] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-02_07:2019-10-01,2019-10-02 signatures=0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Convert the STM32 hwspinlock binding to DT schema format using json-schema Signed-off-by: Benjamin Gaignard --- .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ----------- .../bindings/hwlock/st,stm32-hwspinlock.yaml | 48 ++++++++++++++++++++++ 2 files changed, 48 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt deleted file mode 100644 index adf4f000ea3d..000000000000 --- a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt +++ /dev/null @@ -1,23 +0,0 @@ -STM32 Hardware Spinlock Device Binding -------------------------------------- - -Required properties : -- compatible : should be "st,stm32-hwspinlock". -- reg : the register address of hwspinlock. -- #hwlock-cells : hwlock users only use the hwlock id to represent a specific - hwlock, so the number of cells should be <1> here. -- clock-names : Must contain "hsem". -- clocks : Must contain a phandle entry for the clock in clock-names, see the - common clock bindings. - -Please look at the generic hwlock binding for usage information for consumers, -"Documentation/devicetree/bindings/hwlock/hwlock.txt" - -Example of hwlock provider: - hwspinlock@4c000000 { - compatible = "st,stm32-hwspinlock"; - #hwlock-cells = <1>; - reg = <0x4c000000 0x400>; - clocks = <&rcc HSEM>; - clock-names = "hsem"; - }; diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml new file mode 100644 index 000000000000..64e169702515 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Hardware Spinlock bindings + +maintainers: + - Benjamin Gaignard + - Fabien Dessenne + +properties: + "#hwlock-cells": true + + compatible: + const: st,stm32-hwspinlock + + reg: + maxItems: 1 + + clocks: + items: + - description: Module Clock + + clock-names: + items: + - const: hsem + +required: + - "#hwlock-cells" + - compatible + - reg + - clocks + - clock-names + +examples: + - | + #include + hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hsem"; + }; + +...