From patchwork Wed Oct 2 17:44:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11171727 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 49F4976 for ; Wed, 2 Oct 2019 17:44:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 28F3F222C2 for ; Wed, 2 Oct 2019 17:44:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570038255; bh=MZYQ5QLRxsH5Lm/zp4Xs3ZdRx+OF3lS8A4Qr/ENHFmY=; h=From:To:Subject:Date:List-ID:From; b=Kt59beuHgYZ3uIfSRk4rcoDwaXvT4kUqkBYlVKmYEOBDn6sRjvU7JV/J8x/k6iNuF dDaMMj9n7dOJde/z2cvqhNdxJN2xChvUV8lG20NdIp09WVWQbRRxnVD/Crs3ftm8iM Uyf59BhactJBuP3ClblEcVxCNXddwV7FvtXDHKhM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728213AbfJBRoO (ORCPT ); Wed, 2 Oct 2019 13:44:14 -0400 Received: from mail.kernel.org ([198.145.29.99]:42476 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726076AbfJBRoO (ORCPT ); Wed, 2 Oct 2019 13:44:14 -0400 Received: from localhost.localdomain (unknown [194.230.155.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DA15221D81; Wed, 2 Oct 2019 17:44:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570038253; bh=MZYQ5QLRxsH5Lm/zp4Xs3ZdRx+OF3lS8A4Qr/ENHFmY=; h=From:To:Subject:Date:From; b=B6EQLsiyV2WDt8tyVi5J3ORL9Qfx9JZa0Vniop0dnsfyqz4zo0SEzy7rAOTqu3E+h vEGELl6rkQy2Vb5oNtHGMWmp213uVAdOmqAed0SL/6IUulw+ufw8irmG3PKg5dq/rw 9ltiv4qOVeqc9733aEdZuhclwmwyTNJNUQwOf3sY= From: Krzysztof Kozlowski To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Lukasz Luba , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dt-bindings: memory-controllers: exynos5422-dmc: Correct example syntax and memory region Date: Wed, 2 Oct 2019 19:44:01 +0200 Message-Id: <20191002174401.17590-1-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org After adding the interrupt properties to Exynos5422 DMC bindings example, the mapped memory region must be big enough to access performance counters registers. Fix also syntax errors (semicolons) and adjust indentation. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Lukasz Luba --- Rebased on top of my for-next branch as exynos5422-dmc.txt bindings were applied by me. --- .../bindings/memory-controllers/exynos5422-dmc.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt index e2434cac4858..02e4a1f862f1 100644 --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt @@ -55,7 +55,7 @@ Example: dmc: memory-controller@10c20000 { compatible = "samsung,exynos5422-dmc"; - reg = <0x10c20000 0x100>, <0x10c30000 0x100>, + reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>; clocks = <&clock CLK_FOUT_SPLL>, <&clock CLK_MOUT_SCLK_SPLL>, <&clock CLK_FF_DOUT_SPLL2>, @@ -63,7 +63,7 @@ Example: <&clock CLK_MOUT_BPLL>, <&clock CLK_SCLK_BPLL>, <&clock CLK_MOUT_MX_MSPLL_CCORE>, - <&clock CLK_MOUT_MCLK_CDREX>, + <&clock CLK_MOUT_MCLK_CDREX>; clock-names = "fout_spll", "mout_sclk_spll", "ff_dout_spll2", @@ -71,10 +71,10 @@ Example: "mout_bpll", "sclk_bpll", "mout_mx_mspll_ccore", - "mout_mclk_cdrex", + "mout_mclk_cdrex"; operating-points-v2 = <&dmc_opp_table>; devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>, - <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>; + <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>; device-handle = <&samsung_K3QF2F20DB>; vdd-supply = <&buck1_reg>; samsung,syscon-clk = <&clock>;