| Message ID | 20191003192444.10113-15-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | LMEM basics | expand |
Quoting Matthew Auld (2019-10-03 20:24:36) > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > The following patches in the series will use it to avoid certain > operations when aperture is not available in HW. > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2c5cb2feda27..7824a31ee448 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2119,6 +2119,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > #define OVERLAY_NEEDS_PHYSICAL(dev_priv) \ > (INTEL_INFO(dev_priv)->display.overlay_needs_physical) > > +#define HAS_MAPPABLE_APERTURE(dev_priv) (dev_priv->ggtt.mappable_end > 0) I'm just not liking tying this to i915 and not ggtt. :| Also (dev_priv) -Chris
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2c5cb2feda27..7824a31ee448 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2119,6 +2119,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define OVERLAY_NEEDS_PHYSICAL(dev_priv) \ (INTEL_INFO(dev_priv)->display.overlay_needs_physical) +#define HAS_MAPPABLE_APERTURE(dev_priv) (dev_priv->ggtt.mappable_end > 0) + /* Early gen2 have a totally busted CS tlb and require pinned batches. */ #define HAS_BROKEN_CS_TLB(dev_priv) (IS_I830(dev_priv) || IS_I845G(dev_priv))