Message ID | 20191007102332.12196-18-geert+renesas@glider.be (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | arm64: dts: renesas: Initial support for R-Car M3-W+ | expand |
Hi Geert, Thanks for the series. One question below. On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote: > Add initial support for the Renesas Salvator-X 2nd version development > board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. > > The memory map is as follows: > - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff > 0x000480000000 -> 0x004ffffffff > - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff > > Based on a patch in the BSP by Takeshi Kihara > <takeshi.kihara.df@renesas.com>. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm64/boot/dts/renesas/Makefile | 1 + > .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++ > 2 files changed, 32 insertions(+) > create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts It is common practice in Renesas BSP to specify the SiP memory split by suffixing the DTB names with '-{2,4}x{2,4}g' [1]. Has this ever been discussed on ML? Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to coexist in harmony, if the latter pops up at any point. [1] (rcar-3.9.6) ls -1 arch/arm64/boot/dts/renesas/*dtb | grep 'g.dtb' arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-4x2g.dtb arch/arm64/boot/dts/renesas/r8a7795-salvator-xs-2x2g.dtb arch/arm64/boot/dts/renesas/r8a7795-salvator-xs-4x2g.dtb arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dtb
Hi Eugeniu, On Mon, Oct 14, 2019 at 7:57 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote: > On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote: > > Add initial support for the Renesas Salvator-X 2nd version development > > board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. > > > > The memory map is as follows: > > - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff > > 0x000480000000 -> 0x004ffffffff > > - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff > > > > Based on a patch in the BSP by Takeshi Kihara > > <takeshi.kihara.df@renesas.com>. > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > --- > > arch/arm64/boot/dts/renesas/Makefile | 1 + > > .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++ > > 2 files changed, 32 insertions(+) > > create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts > > It is common practice in Renesas BSP to specify the SiP memory > split by suffixing the DTB names with '-{2,4}x{2,4}g' [1]. > > Has this ever been discussed on ML? > > Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and > M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to > coexist in harmony, if the latter pops up at any point. With mainline U-Boot, the memory configuration is passed from ATF through U-Boot to Linux, see e.g. "ARM: renesas: Configure DRAM size from ATF DT fragment" [1], so there's no longer a need to maintain multiple DTS files. [1] https://gitlab.denx.de/u-boot/u-boot/commit/175f5027345c7feaa41e8f4201778814bf72fe37 Gr{oetje,eeting}s, Geert
Hi Geert, On Wed, Oct 16, 2019 at 10:54:12AM +0200, Geert Uytterhoeven wrote: > Hi Eugeniu, > > On Mon, Oct 14, 2019 at 7:57 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote: > > On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote: > > > Add initial support for the Renesas Salvator-X 2nd version development > > > board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. > > > > > > The memory map is as follows: > > > - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff > > > 0x000480000000 -> 0x004ffffffff > > > - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff > > > > > > Based on a patch in the BSP by Takeshi Kihara > > > <takeshi.kihara.df@renesas.com>. > > > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > > --- > > > arch/arm64/boot/dts/renesas/Makefile | 1 + > > > .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++ > > > 2 files changed, 32 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts > > > > It is common practice in Renesas BSP to specify the SiP memory > > split by suffixing the DTB names with '-{2,4}x{2,4}g' [1]. > > > > Has this ever been discussed on ML? > > > > Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and > > M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to > > coexist in harmony, if the latter pops up at any point. > > With mainline U-Boot, the memory configuration is passed from ATF > through U-Boot to Linux, see e.g. "ARM: renesas: Configure DRAM size > from ATF DT fragment" [1], so there's no longer a need to maintain > multiple DTS files. With CONFIG_ARCH_FIXUP_FDT_MEMORY being disabled on most, if not all, R-Car3 targets in u-boot master [2], it's unlikely we'll get any DRAM information passed via DT from U-Boot to Linux. I notice that Marek (CC) has just submitted a patch to re-enable [3] the U-Boot feature. Does this mean the community is fine with the idea that adjusting the Linux DT memory entries (e.g. for debugging and other purposes) will become a NOOP and will require users to reflash their bootloaders? > [1] https://gitlab.denx.de/u-boot/u-boot/commit/175f5027345c7feaa41e8f4201778814bf72fe37 [2] u-boot (6891152a4596) git grep FIXUP_FDT -- configs/r8a779* configs/r8a7795_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a7795_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a77965_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a77965_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a7796_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a7796_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a77970_eagle_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a77990_ebisu_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set configs/r8a77995_draak_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set [3] https://patchwork.ozlabs.org/patch/1177387/ ("ARM: rmobile: Enable CONFIG_ARCH_FIXUP_FDT_MEMORY on Gen3")
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 3a6a0fb5b482a2dc..e0a829c139ee133f 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb +dtb-$(CONFIG_ARCH_R8A77961) += r8a77961-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb-kf.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts new file mode 100644 index 0000000000000000..4abd78ac1cd597d9 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W+ + * + * Copyright (C) 2018 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a77961.dtsi" +#include "salvator-xs.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board based on r8a77961"; + compatible = "renesas,salvator-xs", "renesas,r8a77961"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@400000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x1 0x00000000>; + }; +};
Add initial support for the Renesas Salvator-X 2nd version development board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. The memory map is as follows: - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff 0x000480000000 -> 0x004ffffffff - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff Based on a patch in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts