diff mbox series

[PATCHv3,7/8] media: cedrus: h264: Support multiple slices per frame

Message ID 20191010131152.68984-8-hverkuil-cisco@xs4all.nl (mailing list archive)
State New, archived
Headers show
Series media: cedrus: h264: Support multi-slice frames | expand

Commit Message

Hans Verkuil Oct. 10, 2019, 1:11 p.m. UTC
From: Jernej Skrabec <jernej.skrabec@siol.net>

With recent changes, support for decoding multi-slice frames can be
easily added now.

Signal VPU if current slice is first in frame or not and add information
about first macroblock coordinates.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
---
 drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

Comments

Jernej Škrabec Oct. 11, 2019, 9:11 a.m. UTC | #1
Dne četrtek, 10. oktober 2019 ob 15:11:51 CEST je Hans Verkuil napisal(a):
> From: Jernej Skrabec <jernej.skrabec@siol.net>
> 
> With recent changes, support for decoding multi-slice frames can be
> easily added now.
> 
> Signal VPU if current slice is first in frame or not and add information
> about first macroblock coordinates.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
> ---
>  drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c index
> d6a782703c9b..3ffb5494cff6 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> @@ -301,6 +301,8 @@ static void cedrus_set_params(struct cedrus_ctx *ctx,
>  	dma_addr_t src_buf_addr;
>  	u32 offset = slice->header_bit_size;
>  	u32 len = (slice->size * 8) - offset;
> +	unsigned int pic_width_in_mbs;
> +	bool mbaff_pic;
>  	u32 reg;
> 
>  	cedrus_write(dev, VE_H264_VLD_LEN, len);
> @@ -370,12 +372,20 @@ static void cedrus_set_params(struct cedrus_ctx *ctx,
>  		reg |= VE_H264_SPS_DIRECT_8X8_INFERENCE;
>  	cedrus_write(dev, VE_H264_SPS, reg);
> 
> +	mbaff_pic = !(slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) &&
> +		    (sps->flags & 
V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD);
> +	pic_width_in_mbs = sps->pic_width_in_mbs_minus1 + 1;
> +
>  	// slice parameters
>  	reg = 0;
> +	reg |= ((slice->first_mb_in_slice % pic_width_in_mbs) & 0xff) << 24;
> +	reg |= (((slice->first_mb_in_slice / pic_width_in_mbs) *
> +		 (mbaff_pic + 1)) & 0xff) << 16;
>  	reg |= decode->nal_ref_idc ? BIT(12) : 0;
>  	reg |= (slice->slice_type & 0xf) << 8;
>  	reg |= slice->cabac_init_idc & 0x3;
> -	reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC;
> +	if (run->first_slice)

Now that first_slice (ctx->fh.m2m_ctx->new_frame) flag depends on 
subsystem_flags, I think patch 7 and 8 should be merged, otherwise this patch 
won't work on it's own.

Best regards,
Jernej

> +		reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC;
>  	if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)
>  		reg |= VE_H264_SHS_FIELD_PIC;
>  	if (slice->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)
diff mbox series

Patch

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
index d6a782703c9b..3ffb5494cff6 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
@@ -301,6 +301,8 @@  static void cedrus_set_params(struct cedrus_ctx *ctx,
 	dma_addr_t src_buf_addr;
 	u32 offset = slice->header_bit_size;
 	u32 len = (slice->size * 8) - offset;
+	unsigned int pic_width_in_mbs;
+	bool mbaff_pic;
 	u32 reg;
 
 	cedrus_write(dev, VE_H264_VLD_LEN, len);
@@ -370,12 +372,20 @@  static void cedrus_set_params(struct cedrus_ctx *ctx,
 		reg |= VE_H264_SPS_DIRECT_8X8_INFERENCE;
 	cedrus_write(dev, VE_H264_SPS, reg);
 
+	mbaff_pic = !(slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) &&
+		    (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD);
+	pic_width_in_mbs = sps->pic_width_in_mbs_minus1 + 1;
+
 	// slice parameters
 	reg = 0;
+	reg |= ((slice->first_mb_in_slice % pic_width_in_mbs) & 0xff) << 24;
+	reg |= (((slice->first_mb_in_slice / pic_width_in_mbs) *
+		 (mbaff_pic + 1)) & 0xff) << 16;
 	reg |= decode->nal_ref_idc ? BIT(12) : 0;
 	reg |= (slice->slice_type & 0xf) << 8;
 	reg |= slice->cabac_init_idc & 0x3;
-	reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC;
+	if (run->first_slice)
+		reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC;
 	if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)
 		reg |= VE_H264_SHS_FIELD_PIC;
 	if (slice->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)