[v3] thermal: qoriq: add thermal monitor unit version 2 support
diff mbox series

Message ID 20191011020534.334-1-andy.tang@nxp.com
State New
Delegated to: Eduardo Valentin
Headers show
Series
  • [v3] thermal: qoriq: add thermal monitor unit version 2 support
Related show

Commit Message

Andy Tang Oct. 11, 2019, 2:05 a.m. UTC
Thermal Monitor Unit v2 is introduced on new Layscape SoC.
Compared to v1, TMUv2 has a little different register layout
and digital output is fairly linear.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
---
v3:
	- rebase to v5.4-rc1

 drivers/thermal/qoriq_thermal.c | 120 ++++++++++++++++++++++++++------
 1 file changed, 97 insertions(+), 23 deletions(-)

Comments

Daniel Lezcano Oct. 11, 2019, 2:32 p.m. UTC | #1
On 11/10/2019 04:05, Yuantian Tang wrote:
> Thermal Monitor Unit v2 is introduced on new Layscape SoC.
> Compared to v1, TMUv2 has a little different register layout
> and digital output is fairly linear.
> 
> Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>

Hi Yuantian,

I've applied the patch to the 'testing' branch [1]. If everything is
fine, it should be applied to thermal/next branch by Eduardo/Rui.

Thanks

  -- Daniel

[1]
https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git/log/?h=testing
Andy Tang Oct. 14, 2019, 1:10 a.m. UTC | #2
Thanks Daniel for your help..

BR,
Andy

> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@linaro.org>
> Sent: 2019年10月11日 22:32
> To: Andy Tang <andy.tang@nxp.com>; edubezval@gmail.com;
> rui.zhang@intel.com; Anson Huang <anson.huang@nxp.com>
> Cc: Leo Li <leoyang.li@nxp.com>; linux-pm@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH v3] thermal: qoriq: add thermal monitor unit
> version 2 support
> 
> Caution: EXT Email
> 
> On 11/10/2019 04:05, Yuantian Tang wrote:
> > Thermal Monitor Unit v2 is introduced on new Layscape SoC.
> > Compared to v1, TMUv2 has a little different register layout and
> > digital output is fairly linear.
> >
> > Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
> > Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
> 
> Hi Yuantian,
> 
> I've applied the patch to the 'testing' branch [1]. If everything is fine, it should
> be applied to thermal/next branch by Eduardo/Rui.
> 
> Thanks
> 
>   -- Daniel
> 
> [1]
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker
> nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fthermal%2Flinux.git%2Fl
> og%2F%3Fh%3Dtesting&amp;data=02%7C01%7Candy.tang%40nxp.com%7C
> 15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C0%7C637064011402158027&amp;sdata=4Pm7DCVf9pSzUL%
> 2BkQg05TMrwF3WiohIduOei2Siq3BM%3D&amp;reserved=0
> 
> 
> --
> 
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2F&amp;data=02%7C01%7Candy.tang%40nxp.com%7C15745a8a
> 41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0
> %7C0%7C637064011402168025&amp;sdata=5PVEzeRIm%2FwHppVoUOvjK9
> KI977FBJrXOjOHMSVmIbQ%3D&amp;reserved=0> Linaro.org │ Open source
> software for ARM SoCs
> 
> Follow Linaro:
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> facebook.com%2Fpages%2FLinaro&amp;data=02%7C01%7Candy.tang%40nx
> p.com%7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92c
> d99c5c301635%7C0%7C0%7C637064011402168025&amp;sdata=x%2B29Kv
> hFHCnFz%2BHgUXl5GkqUJSG6Kr8bcXaxZ%2BmRUns%3D&amp;reserved=0>
> Facebook |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitte
> r.com%2F%23!%2Flinaroorg&amp;data=02%7C01%7Candy.tang%40nxp.com
> %7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5
> c301635%7C0%7C0%7C637064011402168025&amp;sdata=pNceHPcgd3r7nl
> dAGyoKlX0B5QsZqATn0iHZDMKJ%2FvY%3D&amp;reserved=0> Twitter |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2Flinaro-blog%2F&amp;data=02%7C01%7Candy.tang%40nxp.co
> m%7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99
> c5c301635%7C0%7C0%7C637064011402168025&amp;sdata=AVdkzJ7tEAeH
> 1olG6VKfVv9fngCwVxn5S76LrSUDwrg%3D&amp;reserved=0> Blog
Andy Tang Oct. 25, 2019, 8:55 a.m. UTC | #3
Hi,

> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@linaro.org>
> Sent: 2019年10月11日 22:32
> To: Andy Tang <andy.tang@nxp.com>; edubezval@gmail.com;
> rui.zhang@intel.com; Anson Huang <anson.huang@nxp.com>
> Cc: Leo Li <leoyang.li@nxp.com>; linux-pm@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH v3] thermal: qoriq: add thermal monitor unit
> version 2 support
> 
> Caution: EXT Email
> 
> On 11/10/2019 04:05, Yuantian Tang wrote:
> > Thermal Monitor Unit v2 is introduced on new Layscape SoC.
> > Compared to v1, TMUv2 has a little different register layout and
> > digital output is fairly linear.
> >
> > Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
> > Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
> 
> Hi Yuantian,
> 
> I've applied the patch to the 'testing' branch [1]. If everything is fine, it should
> be applied to thermal/next branch by Eduardo/Rui.
I have not seen the patch applied.
May I know if this patch has been applied?

BR,
Andy

> 
> Thanks
> 
>   -- Daniel
> 
> [1]
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker
> nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fthermal%2Flinux.git%2Fl
> og%2F%3Fh%3Dtesting&amp;data=02%7C01%7Candy.tang%40nxp.com%7C
> 15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C0%7C637064011402158027&amp;sdata=4Pm7DCVf9pSzUL%
> 2BkQg05TMrwF3WiohIduOei2Siq3BM%3D&amp;reserved=0
> 
> 
> --
> 
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2F&amp;data=02%7C01%7Candy.tang%40nxp.com%7C15745a8a
> 41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0
> %7C0%7C637064011402168025&amp;sdata=5PVEzeRIm%2FwHppVoUOvjK9
> KI977FBJrXOjOHMSVmIbQ%3D&amp;reserved=0> Linaro.org │ Open source
> software for ARM SoCs
> 
> Follow Linaro:
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> facebook.com%2Fpages%2FLinaro&amp;data=02%7C01%7Candy.tang%40nx
> p.com%7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92c
> d99c5c301635%7C0%7C0%7C637064011402168025&amp;sdata=x%2B29Kv
> hFHCnFz%2BHgUXl5GkqUJSG6Kr8bcXaxZ%2BmRUns%3D&amp;reserved=0>
> Facebook |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitte
> r.com%2F%23!%2Flinaroorg&amp;data=02%7C01%7Candy.tang%40nxp.com
> %7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99c5
> c301635%7C0%7C0%7C637064011402168025&amp;sdata=pNceHPcgd3r7nl
> dAGyoKlX0B5QsZqATn0iHZDMKJ%2FvY%3D&amp;reserved=0> Twitter |
> <https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> linaro.org%2Flinaro-blog%2F&amp;data=02%7C01%7Candy.tang%40nxp.co
> m%7C15745a8a41334cfdee1108d74e57d25b%7C686ea1d3bc2b4c6fa92cd99
> c5c301635%7C0%7C0%7C637064011402168025&amp;sdata=AVdkzJ7tEAeH
> 1olG6VKfVv9fngCwVxn5S76LrSUDwrg%3D&amp;reserved=0> Blog
Daniel Lezcano Oct. 28, 2019, 9:05 a.m. UTC | #4
Hi Andy,

On 25/10/2019 10:55, Andy Tang wrote:
> Hi,
> 
>> -----Original Message-----
>> From: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Sent: 2019年10月11日 22:32
>> To: Andy Tang <andy.tang@nxp.com>; edubezval@gmail.com;
>> rui.zhang@intel.com; Anson Huang <anson.huang@nxp.com>
>> Cc: Leo Li <leoyang.li@nxp.com>; linux-pm@vger.kernel.org;
>> linux-kernel@vger.kernel.org
>> Subject: [EXT] Re: [PATCH v3] thermal: qoriq: add thermal monitor unit
>> version 2 support
>>
>> Caution: EXT Email
>>
>> On 11/10/2019 04:05, Yuantian Tang wrote:
>>> Thermal Monitor Unit v2 is introduced on new Layscape SoC.
>>> Compared to v1, TMUv2 has a little different register layout and
>>> digital output is fairly linear.
>>>
>>> Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
>>> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
>>
>> Hi Yuantian,
>>
>> I've applied the patch to the 'testing' branch [1]. If everything is fine, it should
>> be applied to thermal/next branch by Eduardo/Rui.
> I have not seen the patch applied.
> May I know if this patch has been applied?

The patch is in linux-next thermal's branch [1].

Eduardo should merge this branch in thermal/next [2] for the pull request.

  -- Daniel

[1]
https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git/commit/?h=thermal/linux-next&id=04910e267b2da9723f4b675b71e81359894a7b1f

[2]
https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git/log/?h=thermal/next

Patch
diff mbox series

diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index 39542c670301..45e9fcb172cc 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -13,7 +13,16 @@ 
 
 #include "thermal_core.h"
 
-#define SITES_MAX	16
+#define SITES_MAX		16
+#define TMR_DISABLE		0x0
+#define TMR_ME			0x80000000
+#define TMR_ALPF		0x0c000000
+#define TMR_ALPF_V2		0x03000000
+#define TMTMIR_DEFAULT	0x0000000f
+#define TIER_DISABLE	0x0
+#define TEUMR0_V2		0x51009c00
+#define TMU_VER1		0x1
+#define TMU_VER2		0x2
 
 /*
  * QorIQ TMU Registers
@@ -24,17 +33,12 @@  struct qoriq_tmu_site_regs {
 	u8 res0[0x8];
 };
 
-struct qoriq_tmu_regs {
+struct qoriq_tmu_regs_v1 {
 	u32 tmr;		/* Mode Register */
-#define TMR_DISABLE	0x0
-#define TMR_ME		0x80000000
-#define TMR_ALPF	0x0c000000
 	u32 tsr;		/* Status Register */
 	u32 tmtmir;		/* Temperature measurement interval Register */
-#define TMTMIR_DEFAULT	0x0000000f
 	u8 res0[0x14];
 	u32 tier;		/* Interrupt Enable Register */
-#define TIER_DISABLE	0x0
 	u32 tidr;		/* Interrupt Detect Register */
 	u32 tiscr;		/* Interrupt Site Capture Register */
 	u32 ticscr;		/* Interrupt Critical Site Capture Register */
@@ -54,10 +58,50 @@  struct qoriq_tmu_regs {
 	u32 ipbrr0;		/* IP Block Revision Register 0 */
 	u32 ipbrr1;		/* IP Block Revision Register 1 */
 	u8 res6[0x310];
-	u32 ttr0cr;		/* Temperature Range 0 Control Register */
-	u32 ttr1cr;		/* Temperature Range 1 Control Register */
-	u32 ttr2cr;		/* Temperature Range 2 Control Register */
-	u32 ttr3cr;		/* Temperature Range 3 Control Register */
+	u32 ttrcr[4];		/* Temperature Range Control Register */
+};
+
+struct qoriq_tmu_regs_v2 {
+	u32 tmr;		/* Mode Register */
+	u32 tsr;		/* Status Register */
+	u32 tmsr;		/* monitor site register */
+	u32 tmtmir;		/* Temperature measurement interval Register */
+	u8 res0[0x10];
+	u32 tier;		/* Interrupt Enable Register */
+	u32 tidr;		/* Interrupt Detect Register */
+	u8 res1[0x8];
+	u32 tiiscr;		/* interrupt immediate site capture register */
+	u32 tiascr;		/* interrupt average site capture register */
+	u32 ticscr;		/* Interrupt Critical Site Capture Register */
+	u32 res2;
+	u32 tmhtcr;		/* monitor high temperature capture register */
+	u32 tmltcr;		/* monitor low temperature capture register */
+	u32 tmrtrcr;	/* monitor rising temperature rate capture register */
+	u32 tmftrcr;	/* monitor falling temperature rate capture register */
+	u32 tmhtitr;	/* High Temperature Immediate Threshold */
+	u32 tmhtatr;	/* High Temperature Average Threshold */
+	u32 tmhtactr;	/* High Temperature Average Crit Threshold */
+	u32 res3;
+	u32 tmltitr;	/* monitor low temperature immediate threshold */
+	u32 tmltatr;	/* monitor low temperature average threshold register */
+	u32 tmltactr;	/* monitor low temperature average critical threshold */
+	u32 res4;
+	u32 tmrtrctr;	/* monitor rising temperature rate critical threshold */
+	u32 tmftrctr;	/* monitor falling temperature rate critical threshold*/
+	u8 res5[0x8];
+	u32 ttcfgr;	/* Temperature Configuration Register */
+	u32 tscfgr;	/* Sensor Configuration Register */
+	u8 res6[0x78];
+	struct qoriq_tmu_site_regs site[SITES_MAX];
+	u8 res7[0x9f8];
+	u32 ipbrr0;		/* IP Block Revision Register 0 */
+	u32 ipbrr1;		/* IP Block Revision Register 1 */
+	u8 res8[0x300];
+	u32 teumr0;
+	u32 teumr1;
+	u32 teumr2;
+	u32 res9;
+	u32 ttrcr[4];	/* Temperature Range Control Register */
 };
 
 struct qoriq_tmu_data;
@@ -72,7 +116,9 @@  struct qoriq_sensor {
 };
 
 struct qoriq_tmu_data {
-	struct qoriq_tmu_regs __iomem *regs;
+	int ver;
+	struct qoriq_tmu_regs_v1 __iomem *regs;
+	struct qoriq_tmu_regs_v2 __iomem *regs_v2;
 	struct clk *clk;
 	bool little_endian;
 	struct qoriq_sensor	*sensor[SITES_MAX];
@@ -132,12 +178,23 @@  static int qoriq_tmu_register_tmu_zone(struct platform_device *pdev)
 				return PTR_ERR(qdata->sensor[id]->tzd);
 		}
 
-		sites |= 0x1 << (15 - id);
+		if (qdata->ver == TMU_VER1)
+			sites |= 0x1 << (15 - id);
+		else
+			sites |= 0x1 << id;
 	}
 
 	/* Enable monitoring */
-	if (sites != 0)
-		tmu_write(qdata, sites | TMR_ME | TMR_ALPF, &qdata->regs->tmr);
+	if (sites != 0) {
+		if (qdata->ver == TMU_VER1) {
+			tmu_write(qdata, sites | TMR_ME | TMR_ALPF,
+					&qdata->regs->tmr);
+		} else {
+			tmu_write(qdata, sites, &qdata->regs_v2->tmsr);
+			tmu_write(qdata, TMR_ME | TMR_ALPF_V2,
+					&qdata->regs_v2->tmr);
+		}
+	}
 
 	return 0;
 }
@@ -150,16 +207,21 @@  static int qoriq_tmu_calibration(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
 
-	if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
-		dev_err(&pdev->dev, "missing calibration range.\n");
-		return -ENODEV;
+	len = of_property_count_u32_elems(np, "fsl,tmu-range");
+	if (len < 0 || len > 4) {
+		dev_err(&pdev->dev, "invalid range data.\n");
+		return len;
+	}
+
+	val = of_property_read_u32_array(np, "fsl,tmu-range", range, len);
+	if (val != 0) {
+		dev_err(&pdev->dev, "failed to read range data.\n");
+		return val;
 	}
 
 	/* Init temperature range registers */
-	tmu_write(data, range[0], &data->regs->ttr0cr);
-	tmu_write(data, range[1], &data->regs->ttr1cr);
-	tmu_write(data, range[2], &data->regs->ttr2cr);
-	tmu_write(data, range[3], &data->regs->ttr3cr);
+	for (i = 0; i < len; i++)
+		tmu_write(data, range[i], &data->regs->ttrcr[i]);
 
 	calibration = of_get_property(np, "fsl,tmu-calibration", &len);
 	if (calibration == NULL || len % 8) {
@@ -183,7 +245,12 @@  static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 	tmu_write(data, TIER_DISABLE, &data->regs->tier);
 
 	/* Set update_interval */
-	tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
+	if (data->ver == TMU_VER1) {
+		tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
+	} else {
+		tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
+		tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
+	}
 
 	/* Disable monitoring */
 	tmu_write(data, TMR_DISABLE, &data->regs->tmr);
@@ -192,6 +259,7 @@  static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 static int qoriq_tmu_probe(struct platform_device *pdev)
 {
 	int ret;
+	u32 ver;
 	struct qoriq_tmu_data *data;
 	struct device_node *np = pdev->dev.of_node;
 
@@ -220,6 +288,12 @@  static int qoriq_tmu_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	/* version register offset at: 0xbf8 on both v1 and v2 */
+	ver = tmu_read(data, &data->regs->ipbrr0);
+	data->ver = (ver >> 8) & 0xff;
+	if (data->ver == TMU_VER2)
+		data->regs_v2 = (void __iomem *)data->regs;
+
 	qoriq_tmu_init_device(data);	/* TMU initialization */
 
 	ret = qoriq_tmu_calibration(pdev);	/* TMU calibration */