[v2] drm/i915/execlists: Assert tasklet is locked for process_csb()
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Message ID 20191014093706.26325-1-chris@chris-wilson.co.uk
State New
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Series
  • [v2] drm/i915/execlists: Assert tasklet is locked for process_csb()
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Commit Message

Chris Wilson Oct. 14, 2019, 9:37 a.m. UTC
We rely on only the tasklet being allowed to call into process_csb(), so
assert that is locked when we do. As the tasklet uses a simple bitlock,
there is no strong lockdep checking so we must make do with a plain
assertion that the tasklet is running and assume that we are the
tasklet!

v2: Fixup intel_gt_sanitize() to prepare each engine for the reset so
that the locks are marked as held during the reset

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c | 11 ++++++++---
 drivers/gpu/drm/i915/gt/intel_lrc.c   |  1 +
 drivers/gpu/drm/i915/i915_gem.h       |  5 +++++
 3 files changed, 14 insertions(+), 3 deletions(-)

Comments

Tvrtko Ursulin Oct. 14, 2019, 9:43 a.m. UTC | #1
On 14/10/2019 10:37, Chris Wilson wrote:
> We rely on only the tasklet being allowed to call into process_csb(), so
> assert that is locked when we do. As the tasklet uses a simple bitlock,
> there is no strong lockdep checking so we must make do with a plain
> assertion that the tasklet is running and assume that we are the
> tasklet!
> 
> v2: Fixup intel_gt_sanitize() to prepare each engine for the reset so
> that the locks are marked as held during the reset
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_gt_pm.c | 11 ++++++++---
>   drivers/gpu/drm/i915/gt/intel_lrc.c   |  1 +
>   drivers/gpu/drm/i915/i915_gem.h       |  5 +++++
>   3 files changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index 87e34e0b6427..bfc611f48ed6 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -136,11 +136,16 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
>   
>   	intel_uc_sanitize(&gt->uc);
>   
> -	if (!reset_engines(gt) && !force)
> -		return;
> +	for_each_engine(engine, gt->i915, id)
> +		engine->reset.prepare(engine);
> +
> +	if (reset_engines(gt) || force) {
> +		for_each_engine(engine, gt->i915, id)
> +			__intel_engine_reset(engine, false);
> +	}
>   
>   	for_each_engine(engine, gt->i915, id)
> -		__intel_engine_reset(engine, false);
> +		engine->reset.finish(engine);
>   }
>   
>   void intel_gt_pm_disable(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 16b878d35814..fc4be76b3070 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1843,6 +1843,7 @@ static void process_csb(struct intel_engine_cs *engine)
>   	u8 head, tail;
>   
>   	GEM_BUG_ON(USES_GUC_SUBMISSION(engine->i915));
> +	GEM_BUG_ON(!tasklet_is_locked(&execlists->tasklet));
>   
>   	/*
>   	 * Note that csb_write, csb_status may be either in HWSP or mmio.
> diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
> index db20d2b0842b..f6f9675848b8 100644
> --- a/drivers/gpu/drm/i915/i915_gem.h
> +++ b/drivers/gpu/drm/i915/i915_gem.h
> @@ -86,6 +86,11 @@ static inline void tasklet_lock(struct tasklet_struct *t)
>   		cpu_relax();
>   }
>   
> +static inline bool tasklet_is_locked(const struct tasklet_struct *t)
> +{
> +	return test_bit(TASKLET_STATE_RUN, &t->state);
> +}
> +
>   static inline void __tasklet_disable_sync_once(struct tasklet_struct *t)
>   {
>   	if (!atomic_fetch_inc(&t->count))
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 87e34e0b6427..bfc611f48ed6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -136,11 +136,16 @@  void intel_gt_sanitize(struct intel_gt *gt, bool force)
 
 	intel_uc_sanitize(&gt->uc);
 
-	if (!reset_engines(gt) && !force)
-		return;
+	for_each_engine(engine, gt->i915, id)
+		engine->reset.prepare(engine);
+
+	if (reset_engines(gt) || force) {
+		for_each_engine(engine, gt->i915, id)
+			__intel_engine_reset(engine, false);
+	}
 
 	for_each_engine(engine, gt->i915, id)
-		__intel_engine_reset(engine, false);
+		engine->reset.finish(engine);
 }
 
 void intel_gt_pm_disable(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 16b878d35814..fc4be76b3070 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1843,6 +1843,7 @@  static void process_csb(struct intel_engine_cs *engine)
 	u8 head, tail;
 
 	GEM_BUG_ON(USES_GUC_SUBMISSION(engine->i915));
+	GEM_BUG_ON(!tasklet_is_locked(&execlists->tasklet));
 
 	/*
 	 * Note that csb_write, csb_status may be either in HWSP or mmio.
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index db20d2b0842b..f6f9675848b8 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -86,6 +86,11 @@  static inline void tasklet_lock(struct tasklet_struct *t)
 		cpu_relax();
 }
 
+static inline bool tasklet_is_locked(const struct tasklet_struct *t)
+{
+	return test_bit(TASKLET_STATE_RUN, &t->state);
+}
+
 static inline void __tasklet_disable_sync_once(struct tasklet_struct *t)
 {
 	if (!atomic_fetch_inc(&t->count))