[05/25] crypto: omap - switch to skcipher API
diff mbox series

Message ID 20191014121910.7264-6-ard.biesheuvel@linaro.org
State New
Headers show
Series
  • Untitled series #187159
Related show

Commit Message

Ard Biesheuvel Oct. 14, 2019, 12:18 p.m. UTC
Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
dated 20 august 2015 introduced the new skcipher API which is supposed to
replace both blkcipher and ablkcipher. While all consumers of the API have
been converted long ago, some producers of the ablkcipher remain, forcing
us to keep the ablkcipher support routines alive, along with the matching
code to expose [a]blkciphers via the skcipher API.

So switch this driver to the skcipher API, allowing us to finally drop the
blkcipher code in the near future.

Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 drivers/crypto/omap-aes.c | 208 +++++++++---------
 drivers/crypto/omap-aes.h |   4 +-
 drivers/crypto/omap-des.c | 232 +++++++++-----------
 3 files changed, 206 insertions(+), 238 deletions(-)

Comments

Tony Lindgren Oct. 15, 2019, 5:28 p.m. UTC | #1
* Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> dated 20 august 2015 introduced the new skcipher API which is supposed to
> replace both blkcipher and ablkcipher. While all consumers of the API have
> been converted long ago, some producers of the ablkcipher remain, forcing
> us to keep the ablkcipher support routines alive, along with the matching
> code to expose [a]blkciphers via the skcipher API.
> 
> So switch this driver to the skcipher API, allowing us to finally drop the
> blkcipher code in the near future.

Adding Tero to loop as I think he was the last one to update this code.

Regards,

Tony

> Cc: Tony Lindgren <tony@atomide.com>
> Cc: linux-omap@vger.kernel.org
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  drivers/crypto/omap-aes.c | 208 +++++++++---------
>  drivers/crypto/omap-aes.h |   4 +-
>  drivers/crypto/omap-des.c | 232 +++++++++-----------
>  3 files changed, 206 insertions(+), 238 deletions(-)
> 
> diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
> index 2f53fbb74100..329fddbe8a39 100644
> --- a/drivers/crypto/omap-aes.c
> +++ b/drivers/crypto/omap-aes.c
> @@ -142,8 +142,8 @@ int omap_aes_write_ctrl(struct omap_aes_dev *dd)
>  			__le32_to_cpu(dd->ctx->key[i]));
>  	}
>  
> -	if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->info)
> -		omap_aes_write_n(dd, AES_REG_IV(dd, 0), dd->req->info, 4);
> +	if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->iv)
> +		omap_aes_write_n(dd, AES_REG_IV(dd, 0), (void *)dd->req->iv, 4);
>  
>  	if ((dd->flags & (FLAGS_GCM)) && dd->aead_req->iv) {
>  		rctx = aead_request_ctx(dd->aead_req);
> @@ -382,11 +382,11 @@ int omap_aes_crypt_dma_start(struct omap_aes_dev *dd)
>  
>  static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
>  {
> -	struct ablkcipher_request *req = dd->req;
> +	struct skcipher_request *req = dd->req;
>  
>  	pr_debug("err: %d\n", err);
>  
> -	crypto_finalize_ablkcipher_request(dd->engine, req, err);
> +	crypto_finalize_skcipher_request(dd->engine, req, err);
>  
>  	pm_runtime_mark_last_busy(dd->dev);
>  	pm_runtime_put_autosuspend(dd->dev);
> @@ -403,10 +403,10 @@ int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
>  }
>  
>  static int omap_aes_handle_queue(struct omap_aes_dev *dd,
> -				 struct ablkcipher_request *req)
> +				 struct skcipher_request *req)
>  {
>  	if (req)
> -		return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
> +		return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
>  
>  	return 0;
>  }
> @@ -414,10 +414,10 @@ static int omap_aes_handle_queue(struct omap_aes_dev *dd,
>  static int omap_aes_prepare_req(struct crypto_engine *engine,
>  				void *areq)
>  {
> -	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
> -	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
> -			crypto_ablkcipher_reqtfm(req));
> -	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
> +	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
> +	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
> +			crypto_skcipher_reqtfm(req));
> +	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
>  	struct omap_aes_dev *dd = rctx->dd;
>  	int ret;
>  	u16 flags;
> @@ -427,8 +427,8 @@ static int omap_aes_prepare_req(struct crypto_engine *engine,
>  
>  	/* assign new request to device */
>  	dd->req = req;
> -	dd->total = req->nbytes;
> -	dd->total_save = req->nbytes;
> +	dd->total = req->cryptlen;
> +	dd->total_save = req->cryptlen;
>  	dd->in_sg = req->src;
>  	dd->out_sg = req->dst;
>  	dd->orig_out = req->dst;
> @@ -469,8 +469,8 @@ static int omap_aes_prepare_req(struct crypto_engine *engine,
>  static int omap_aes_crypt_req(struct crypto_engine *engine,
>  			      void *areq)
>  {
> -	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
> -	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
> +	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
> +	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
>  	struct omap_aes_dev *dd = rctx->dd;
>  
>  	if (!dd)
> @@ -505,26 +505,26 @@ static void omap_aes_done_task(unsigned long data)
>  	pr_debug("exit\n");
>  }
>  
> -static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
> +static int omap_aes_crypt(struct skcipher_request *req, unsigned long mode)
>  {
> -	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
> -			crypto_ablkcipher_reqtfm(req));
> -	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
> +	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
> +			crypto_skcipher_reqtfm(req));
> +	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
>  	struct omap_aes_dev *dd;
>  	int ret;
>  
> -	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
> +	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
>  		  !!(mode & FLAGS_ENCRYPT),
>  		  !!(mode & FLAGS_CBC));
>  
> -	if (req->nbytes < aes_fallback_sz) {
> +	if (req->cryptlen < aes_fallback_sz) {
>  		SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
>  
>  		skcipher_request_set_sync_tfm(subreq, ctx->fallback);
>  		skcipher_request_set_callback(subreq, req->base.flags, NULL,
>  					      NULL);
>  		skcipher_request_set_crypt(subreq, req->src, req->dst,
> -					   req->nbytes, req->info);
> +					   req->cryptlen, req->iv);
>  
>  		if (mode & FLAGS_ENCRYPT)
>  			ret = crypto_skcipher_encrypt(subreq);
> @@ -545,10 +545,10 @@ static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
>  
>  /* ********************** ALG API ************************************ */
>  
> -static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
> +static int omap_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
>  			   unsigned int keylen)
>  {
> -	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
> +	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
>  	int ret;
>  
>  	if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
> @@ -571,32 +571,32 @@ static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
>  	return 0;
>  }
>  
> -static int omap_aes_ecb_encrypt(struct ablkcipher_request *req)
> +static int omap_aes_ecb_encrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, FLAGS_ENCRYPT);
>  }
>  
> -static int omap_aes_ecb_decrypt(struct ablkcipher_request *req)
> +static int omap_aes_ecb_decrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, 0);
>  }
>  
> -static int omap_aes_cbc_encrypt(struct ablkcipher_request *req)
> +static int omap_aes_cbc_encrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
>  }
>  
> -static int omap_aes_cbc_decrypt(struct ablkcipher_request *req)
> +static int omap_aes_cbc_decrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, FLAGS_CBC);
>  }
>  
> -static int omap_aes_ctr_encrypt(struct ablkcipher_request *req)
> +static int omap_aes_ctr_encrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CTR);
>  }
>  
> -static int omap_aes_ctr_decrypt(struct ablkcipher_request *req)
> +static int omap_aes_ctr_decrypt(struct skcipher_request *req)
>  {
>  	return omap_aes_crypt(req, FLAGS_CTR);
>  }
> @@ -606,10 +606,10 @@ static int omap_aes_prepare_req(struct crypto_engine *engine,
>  static int omap_aes_crypt_req(struct crypto_engine *engine,
>  			      void *req);
>  
> -static int omap_aes_cra_init(struct crypto_tfm *tfm)
> +static int omap_aes_init_tfm(struct crypto_skcipher *tfm)
>  {
> -	const char *name = crypto_tfm_alg_name(tfm);
> -	struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
> +	const char *name = crypto_tfm_alg_name(&tfm->base);
> +	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
>  	struct crypto_sync_skcipher *blk;
>  
>  	blk = crypto_alloc_sync_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK);
> @@ -618,7 +618,7 @@ static int omap_aes_cra_init(struct crypto_tfm *tfm)
>  
>  	ctx->fallback = blk;
>  
> -	tfm->crt_ablkcipher.reqsize = sizeof(struct omap_aes_reqctx);
> +	crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx));
>  
>  	ctx->enginectx.op.prepare_request = omap_aes_prepare_req;
>  	ctx->enginectx.op.unprepare_request = NULL;
> @@ -657,9 +657,9 @@ static int omap_aes_gcm_cra_init(struct crypto_aead *tfm)
>  	return 0;
>  }
>  
> -static void omap_aes_cra_exit(struct crypto_tfm *tfm)
> +static void omap_aes_exit_tfm(struct crypto_skcipher *tfm)
>  {
> -	struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
> +	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
>  
>  	if (ctx->fallback)
>  		crypto_free_sync_skcipher(ctx->fallback);
> @@ -671,7 +671,10 @@ static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm)
>  {
>  	struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm);
>  
> -	omap_aes_cra_exit(crypto_aead_tfm(tfm));
> +	if (ctx->fallback)
> +		crypto_free_sync_skcipher(ctx->fallback);
> +
> +	ctx->fallback = NULL;
>  
>  	if (ctx->ctr)
>  		crypto_free_skcipher(ctx->ctr);
> @@ -679,78 +682,68 @@ static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm)
>  
>  /* ********************** ALGS ************************************ */
>  
> -static struct crypto_alg algs_ecb_cbc[] = {
> +static struct skcipher_alg algs_ecb_cbc[] = {
>  {
> -	.cra_name		= "ecb(aes)",
> -	.cra_driver_name	= "ecb-aes-omap",
> -	.cra_priority		= 300,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> -				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
> -	.cra_blocksize		= AES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_aes_cra_init,
> -	.cra_exit		= omap_aes_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= AES_MIN_KEY_SIZE,
> -		.max_keysize	= AES_MAX_KEY_SIZE,
> -		.setkey		= omap_aes_setkey,
> -		.encrypt	= omap_aes_ecb_encrypt,
> -		.decrypt	= omap_aes_ecb_decrypt,
> -	}
> +	.base.cra_name		= "ecb(aes)",
> +	.base.cra_driver_name	= "ecb-aes-omap",
> +	.base.cra_priority	= 300,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
> +				  CRYPTO_ALG_ASYNC |
> +				  CRYPTO_ALG_NEED_FALLBACK,
> +	.base.cra_blocksize	= AES_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= AES_MIN_KEY_SIZE,
> +	.max_keysize		= AES_MAX_KEY_SIZE,
> +	.setkey			= omap_aes_setkey,
> +	.encrypt		= omap_aes_ecb_encrypt,
> +	.decrypt		= omap_aes_ecb_decrypt,
> +	.init			= omap_aes_init_tfm,
> +	.exit			= omap_aes_exit_tfm,
>  },
>  {
> -	.cra_name		= "cbc(aes)",
> -	.cra_driver_name	= "cbc-aes-omap",
> -	.cra_priority		= 300,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> -				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
> -	.cra_blocksize		= AES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_aes_cra_init,
> -	.cra_exit		= omap_aes_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= AES_MIN_KEY_SIZE,
> -		.max_keysize	= AES_MAX_KEY_SIZE,
> -		.ivsize		= AES_BLOCK_SIZE,
> -		.setkey		= omap_aes_setkey,
> -		.encrypt	= omap_aes_cbc_encrypt,
> -		.decrypt	= omap_aes_cbc_decrypt,
> -	}
> +	.base.cra_name		= "cbc(aes)",
> +	.base.cra_driver_name	= "cbc-aes-omap",
> +	.base.cra_priority	= 300,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
> +				  CRYPTO_ALG_ASYNC |
> +				  CRYPTO_ALG_NEED_FALLBACK,
> +	.base.cra_blocksize	= AES_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= AES_MIN_KEY_SIZE,
> +	.max_keysize		= AES_MAX_KEY_SIZE,
> +	.setkey			= omap_aes_setkey,
> +	.encrypt		= omap_aes_cbc_encrypt,
> +	.decrypt		= omap_aes_cbc_decrypt,
> +	.init			= omap_aes_init_tfm,
> +	.exit			= omap_aes_exit_tfm,
>  }
>  };
>  
> -static struct crypto_alg algs_ctr[] = {
> +static struct skcipher_alg algs_ctr[] = {
>  {
> -	.cra_name		= "ctr(aes)",
> -	.cra_driver_name	= "ctr-aes-omap",
> -	.cra_priority		= 300,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> -				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
> -	.cra_blocksize		= AES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_aes_cra_init,
> -	.cra_exit		= omap_aes_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= AES_MIN_KEY_SIZE,
> -		.max_keysize	= AES_MAX_KEY_SIZE,
> -		.ivsize		= AES_BLOCK_SIZE,
> -		.setkey		= omap_aes_setkey,
> -		.encrypt	= omap_aes_ctr_encrypt,
> -		.decrypt	= omap_aes_ctr_decrypt,
> -	}
> -} ,
> +	.base.cra_name		= "ctr(aes)",
> +	.base.cra_driver_name	= "ctr-aes-omap",
> +	.base.cra_priority	= 300,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
> +				  CRYPTO_ALG_ASYNC |
> +				  CRYPTO_ALG_NEED_FALLBACK,
> +	.base.cra_blocksize	= AES_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= AES_MIN_KEY_SIZE,
> +	.max_keysize		= AES_MAX_KEY_SIZE,
> +	.ivsize			= AES_BLOCK_SIZE,
> +	.setkey			= omap_aes_setkey,
> +	.encrypt		= omap_aes_ctr_encrypt,
> +	.decrypt		= omap_aes_ctr_decrypt,
> +	.init			= omap_aes_init_tfm,
> +	.exit			= omap_aes_exit_tfm,
> +}
>  };
>  
>  static struct omap_aes_algs_info omap_aes_algs_info_ecb_cbc[] = {
> @@ -1121,7 +1114,7 @@ static int omap_aes_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
>  	struct omap_aes_dev *dd;
> -	struct crypto_alg *algp;
> +	struct skcipher_alg *algp;
>  	struct aead_alg *aalg;
>  	struct resource res;
>  	int err = -ENOMEM, i, j, irq = -1;
> @@ -1215,9 +1208,9 @@ static int omap_aes_probe(struct platform_device *pdev)
>  			for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
>  				algp = &dd->pdata->algs_info[i].algs_list[j];
>  
> -				pr_debug("reg alg: %s\n", algp->cra_name);
> +				pr_debug("reg alg: %s\n", algp->base.cra_name);
>  
> -				err = crypto_register_alg(algp);
> +				err = crypto_register_skcipher(algp);
>  				if (err)
>  					goto err_algs;
>  
> @@ -1230,9 +1223,8 @@ static int omap_aes_probe(struct platform_device *pdev)
>  	    !dd->pdata->aead_algs_info->registered) {
>  		for (i = 0; i < dd->pdata->aead_algs_info->size; i++) {
>  			aalg = &dd->pdata->aead_algs_info->algs_list[i];
> -			algp = &aalg->base;
>  
> -			pr_debug("reg alg: %s\n", algp->cra_name);
> +			pr_debug("reg alg: %s\n", aalg->base.cra_name);
>  
>  			err = crypto_register_aead(aalg);
>  			if (err)
> @@ -1257,7 +1249,7 @@ static int omap_aes_probe(struct platform_device *pdev)
>  err_algs:
>  	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
>  		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
> -			crypto_unregister_alg(
> +			crypto_unregister_skcipher(
>  					&dd->pdata->algs_info[i].algs_list[j]);
>  
>  err_engine:
> @@ -1290,7 +1282,7 @@ static int omap_aes_remove(struct platform_device *pdev)
>  
>  	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
>  		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
> -			crypto_unregister_alg(
> +			crypto_unregister_skcipher(
>  					&dd->pdata->algs_info[i].algs_list[j]);
>  
>  	for (i = dd->pdata->aead_algs_info->size - 1; i >= 0; i--) {
> diff --git a/drivers/crypto/omap-aes.h b/drivers/crypto/omap-aes.h
> index 2d4b1f87a1c9..2d3575231e31 100644
> --- a/drivers/crypto/omap-aes.h
> +++ b/drivers/crypto/omap-aes.h
> @@ -112,7 +112,7 @@ struct omap_aes_reqctx {
>  #define OMAP_AES_CACHE_SIZE	0
>  
>  struct omap_aes_algs_info {
> -	struct crypto_alg	*algs_list;
> +	struct skcipher_alg	*algs_list;
>  	unsigned int		size;
>  	unsigned int		registered;
>  };
> @@ -162,7 +162,7 @@ struct omap_aes_dev {
>  	struct aead_queue	aead_queue;
>  	spinlock_t		lock;
>  
> -	struct ablkcipher_request	*req;
> +	struct skcipher_request		*req;
>  	struct aead_request		*aead_req;
>  	struct crypto_engine		*engine;
>  
> diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
> index b19d7e5d55ec..4c4dbc2b377e 100644
> --- a/drivers/crypto/omap-des.c
> +++ b/drivers/crypto/omap-des.c
> @@ -34,6 +34,7 @@
>  #include <linux/interrupt.h>
>  #include <crypto/scatterwalk.h>
>  #include <crypto/internal/des.h>
> +#include <crypto/internal/skcipher.h>
>  #include <crypto/algapi.h>
>  #include <crypto/engine.h>
>  
> @@ -98,7 +99,7 @@ struct omap_des_reqctx {
>  #define OMAP_DES_CACHE_SIZE	0
>  
>  struct omap_des_algs_info {
> -	struct crypto_alg	*algs_list;
> +	struct skcipher_alg	*algs_list;
>  	unsigned int		size;
>  	unsigned int		registered;
>  };
> @@ -139,7 +140,7 @@ struct omap_des_dev {
>  
>  	struct tasklet_struct	done_task;
>  
> -	struct ablkcipher_request	*req;
> +	struct skcipher_request	*req;
>  	struct crypto_engine		*engine;
>  	/*
>  	 * total is used by PIO mode for book keeping so introduce
> @@ -261,8 +262,8 @@ static int omap_des_write_ctrl(struct omap_des_dev *dd)
>  			       __le32_to_cpu(dd->ctx->key[i]));
>  	}
>  
> -	if ((dd->flags & FLAGS_CBC) && dd->req->info)
> -		omap_des_write_n(dd, DES_REG_IV(dd, 0), dd->req->info, 2);
> +	if ((dd->flags & FLAGS_CBC) && dd->req->iv)
> +		omap_des_write_n(dd, DES_REG_IV(dd, 0), (void *)dd->req->iv, 2);
>  
>  	if (dd->flags & FLAGS_CBC)
>  		val |= DES_REG_CTRL_CBC;
> @@ -456,8 +457,8 @@ static int omap_des_crypt_dma(struct crypto_tfm *tfm,
>  
>  static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
>  {
> -	struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
> -					crypto_ablkcipher_reqtfm(dd->req));
> +	struct crypto_tfm *tfm = crypto_skcipher_tfm(
> +					crypto_skcipher_reqtfm(dd->req));
>  	int err;
>  
>  	pr_debug("total: %d\n", dd->total);
> @@ -491,11 +492,11 @@ static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
>  
>  static void omap_des_finish_req(struct omap_des_dev *dd, int err)
>  {
> -	struct ablkcipher_request *req = dd->req;
> +	struct skcipher_request *req = dd->req;
>  
>  	pr_debug("err: %d\n", err);
>  
> -	crypto_finalize_ablkcipher_request(dd->engine, req, err);
> +	crypto_finalize_skcipher_request(dd->engine, req, err);
>  
>  	pm_runtime_mark_last_busy(dd->dev);
>  	pm_runtime_put_autosuspend(dd->dev);
> @@ -514,10 +515,10 @@ static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
>  }
>  
>  static int omap_des_handle_queue(struct omap_des_dev *dd,
> -				 struct ablkcipher_request *req)
> +				 struct skcipher_request *req)
>  {
>  	if (req)
> -		return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
> +		return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
>  
>  	return 0;
>  }
> @@ -525,9 +526,9 @@ static int omap_des_handle_queue(struct omap_des_dev *dd,
>  static int omap_des_prepare_req(struct crypto_engine *engine,
>  				void *areq)
>  {
> -	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
> -	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
> -			crypto_ablkcipher_reqtfm(req));
> +	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
> +			crypto_skcipher_reqtfm(req));
>  	struct omap_des_dev *dd = omap_des_find_dev(ctx);
>  	struct omap_des_reqctx *rctx;
>  	int ret;
> @@ -538,8 +539,8 @@ static int omap_des_prepare_req(struct crypto_engine *engine,
>  
>  	/* assign new request to device */
>  	dd->req = req;
> -	dd->total = req->nbytes;
> -	dd->total_save = req->nbytes;
> +	dd->total = req->cryptlen;
> +	dd->total_save = req->cryptlen;
>  	dd->in_sg = req->src;
>  	dd->out_sg = req->dst;
>  	dd->orig_out = req->dst;
> @@ -568,8 +569,8 @@ static int omap_des_prepare_req(struct crypto_engine *engine,
>  	if (dd->out_sg_len < 0)
>  		return dd->out_sg_len;
>  
> -	rctx = ablkcipher_request_ctx(req);
> -	ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
> +	rctx = skcipher_request_ctx(req);
> +	ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
>  	rctx->mode &= FLAGS_MODE_MASK;
>  	dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
>  
> @@ -582,9 +583,9 @@ static int omap_des_prepare_req(struct crypto_engine *engine,
>  static int omap_des_crypt_req(struct crypto_engine *engine,
>  			      void *areq)
>  {
> -	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
> -	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
> -			crypto_ablkcipher_reqtfm(req));
> +	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
> +			crypto_skcipher_reqtfm(req));
>  	struct omap_des_dev *dd = omap_des_find_dev(ctx);
>  
>  	if (!dd)
> @@ -619,18 +620,18 @@ static void omap_des_done_task(unsigned long data)
>  	pr_debug("exit\n");
>  }
>  
> -static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
> +static int omap_des_crypt(struct skcipher_request *req, unsigned long mode)
>  {
> -	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
> -			crypto_ablkcipher_reqtfm(req));
> -	struct omap_des_reqctx *rctx = ablkcipher_request_ctx(req);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
> +			crypto_skcipher_reqtfm(req));
> +	struct omap_des_reqctx *rctx = skcipher_request_ctx(req);
>  	struct omap_des_dev *dd;
>  
> -	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
> +	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
>  		 !!(mode & FLAGS_ENCRYPT),
>  		 !!(mode & FLAGS_CBC));
>  
> -	if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
> +	if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE)) {
>  		pr_err("request size is not exact amount of DES blocks\n");
>  		return -EINVAL;
>  	}
> @@ -646,15 +647,15 @@ static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
>  
>  /* ********************** ALG API ************************************ */
>  
> -static int omap_des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
> +static int omap_des_setkey(struct crypto_skcipher *cipher, const u8 *key,
>  			   unsigned int keylen)
>  {
> -	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
>  	int err;
>  
>  	pr_debug("enter, keylen: %d\n", keylen);
>  
> -	err = verify_ablkcipher_des_key(cipher, key);
> +	err = verify_skcipher_des_key(cipher, key);
>  	if (err)
>  		return err;
>  
> @@ -664,15 +665,15 @@ static int omap_des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
>  	return 0;
>  }
>  
> -static int omap_des3_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
> +static int omap_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
>  			    unsigned int keylen)
>  {
> -	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
>  	int err;
>  
>  	pr_debug("enter, keylen: %d\n", keylen);
>  
> -	err = verify_ablkcipher_des3_key(cipher, key);
> +	err = verify_skcipher_des3_key(cipher, key);
>  	if (err)
>  		return err;
>  
> @@ -682,22 +683,22 @@ static int omap_des3_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
>  	return 0;
>  }
>  
> -static int omap_des_ecb_encrypt(struct ablkcipher_request *req)
> +static int omap_des_ecb_encrypt(struct skcipher_request *req)
>  {
>  	return omap_des_crypt(req, FLAGS_ENCRYPT);
>  }
>  
> -static int omap_des_ecb_decrypt(struct ablkcipher_request *req)
> +static int omap_des_ecb_decrypt(struct skcipher_request *req)
>  {
>  	return omap_des_crypt(req, 0);
>  }
>  
> -static int omap_des_cbc_encrypt(struct ablkcipher_request *req)
> +static int omap_des_cbc_encrypt(struct skcipher_request *req)
>  {
>  	return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
>  }
>  
> -static int omap_des_cbc_decrypt(struct ablkcipher_request *req)
> +static int omap_des_cbc_decrypt(struct skcipher_request *req)
>  {
>  	return omap_des_crypt(req, FLAGS_CBC);
>  }
> @@ -707,13 +708,13 @@ static int omap_des_prepare_req(struct crypto_engine *engine,
>  static int omap_des_crypt_req(struct crypto_engine *engine,
>  			      void *areq);
>  
> -static int omap_des_cra_init(struct crypto_tfm *tfm)
> +static int omap_des_init_tfm(struct crypto_skcipher *tfm)
>  {
> -	struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
> +	struct omap_des_ctx *ctx = crypto_skcipher_ctx(tfm);
>  
>  	pr_debug("enter\n");
>  
> -	tfm->crt_ablkcipher.reqsize = sizeof(struct omap_des_reqctx);
> +	crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_des_reqctx));
>  
>  	ctx->enginectx.op.prepare_request = omap_des_prepare_req;
>  	ctx->enginectx.op.unprepare_request = NULL;
> @@ -722,103 +723,78 @@ static int omap_des_cra_init(struct crypto_tfm *tfm)
>  	return 0;
>  }
>  
> -static void omap_des_cra_exit(struct crypto_tfm *tfm)
> -{
> -	pr_debug("enter\n");
> -}
> -
>  /* ********************** ALGS ************************************ */
>  
> -static struct crypto_alg algs_ecb_cbc[] = {
> +static struct skcipher_alg algs_ecb_cbc[] = {
>  {
> -	.cra_name		= "ecb(des)",
> -	.cra_driver_name	= "ecb-des-omap",
> -	.cra_priority		= 100,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> +	.base.cra_name		= "ecb(des)",
> +	.base.cra_driver_name	= "ecb-des-omap",
> +	.base.cra_priority	= 100,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
>  				  CRYPTO_ALG_ASYNC,
> -	.cra_blocksize		= DES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_des_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_des_cra_init,
> -	.cra_exit		= omap_des_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= DES_KEY_SIZE,
> -		.max_keysize	= DES_KEY_SIZE,
> -		.setkey		= omap_des_setkey,
> -		.encrypt	= omap_des_ecb_encrypt,
> -		.decrypt	= omap_des_ecb_decrypt,
> -	}
> +	.base.cra_blocksize	= DES_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= DES_KEY_SIZE,
> +	.max_keysize		= DES_KEY_SIZE,
> +	.setkey			= omap_des_setkey,
> +	.encrypt		= omap_des_ecb_encrypt,
> +	.decrypt		= omap_des_ecb_decrypt,
> +	.init			= omap_des_init_tfm,
>  },
>  {
> -	.cra_name		= "cbc(des)",
> -	.cra_driver_name	= "cbc-des-omap",
> -	.cra_priority		= 100,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> +	.base.cra_name		= "cbc(des)",
> +	.base.cra_driver_name	= "cbc-des-omap",
> +	.base.cra_priority	= 100,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
>  				  CRYPTO_ALG_ASYNC,
> -	.cra_blocksize		= DES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_des_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_des_cra_init,
> -	.cra_exit		= omap_des_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= DES_KEY_SIZE,
> -		.max_keysize	= DES_KEY_SIZE,
> -		.ivsize		= DES_BLOCK_SIZE,
> -		.setkey		= omap_des_setkey,
> -		.encrypt	= omap_des_cbc_encrypt,
> -		.decrypt	= omap_des_cbc_decrypt,
> -	}
> +	.base.cra_blocksize	= DES_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= DES_KEY_SIZE,
> +	.max_keysize		= DES_KEY_SIZE,
> +	.ivsize			= DES_BLOCK_SIZE,
> +	.setkey			= omap_des_setkey,
> +	.encrypt		= omap_des_cbc_encrypt,
> +	.decrypt		= omap_des_cbc_decrypt,
> +	.init			= omap_des_init_tfm,
>  },
>  {
> -	.cra_name		= "ecb(des3_ede)",
> -	.cra_driver_name	= "ecb-des3-omap",
> -	.cra_priority		= 100,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> +	.base.cra_name		= "ecb(des3_ede)",
> +	.base.cra_driver_name	= "ecb-des3-omap",
> +	.base.cra_priority	= 100,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
>  				  CRYPTO_ALG_ASYNC,
> -	.cra_blocksize		= DES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_des_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_des_cra_init,
> -	.cra_exit		= omap_des_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= 3*DES_KEY_SIZE,
> -		.max_keysize	= 3*DES_KEY_SIZE,
> -		.setkey		= omap_des3_setkey,
> -		.encrypt	= omap_des_ecb_encrypt,
> -		.decrypt	= omap_des_ecb_decrypt,
> -	}
> +	.base.cra_blocksize	= DES3_EDE_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= DES3_EDE_KEY_SIZE,
> +	.max_keysize		= DES3_EDE_KEY_SIZE,
> +	.setkey			= omap_des3_setkey,
> +	.encrypt		= omap_des_ecb_encrypt,
> +	.decrypt		= omap_des_ecb_decrypt,
> +	.init			= omap_des_init_tfm,
>  },
>  {
> -	.cra_name		= "cbc(des3_ede)",
> -	.cra_driver_name	= "cbc-des3-omap",
> -	.cra_priority		= 100,
> -	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
> -				  CRYPTO_ALG_KERN_DRIVER_ONLY |
> +	.base.cra_name		= "cbc(des3_ede)",
> +	.base.cra_driver_name	= "cbc-des3-omap",
> +	.base.cra_priority	= 100,
> +	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
>  				  CRYPTO_ALG_ASYNC,
> -	.cra_blocksize		= DES_BLOCK_SIZE,
> -	.cra_ctxsize		= sizeof(struct omap_des_ctx),
> -	.cra_alignmask		= 0,
> -	.cra_type		= &crypto_ablkcipher_type,
> -	.cra_module		= THIS_MODULE,
> -	.cra_init		= omap_des_cra_init,
> -	.cra_exit		= omap_des_cra_exit,
> -	.cra_u.ablkcipher = {
> -		.min_keysize	= 3*DES_KEY_SIZE,
> -		.max_keysize	= 3*DES_KEY_SIZE,
> -		.ivsize		= DES_BLOCK_SIZE,
> -		.setkey		= omap_des3_setkey,
> -		.encrypt	= omap_des_cbc_encrypt,
> -		.decrypt	= omap_des_cbc_decrypt,
> -	}
> +	.base.cra_blocksize	= DES3_EDE_BLOCK_SIZE,
> +	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
> +	.base.cra_module	= THIS_MODULE,
> +
> +	.min_keysize		= DES3_EDE_KEY_SIZE,
> +	.max_keysize		= DES3_EDE_KEY_SIZE,
> +	.ivsize			= DES3_EDE_BLOCK_SIZE,
> +	.setkey			= omap_des3_setkey,
> +	.encrypt		= omap_des_cbc_encrypt,
> +	.decrypt		= omap_des_cbc_decrypt,
> +	.init			= omap_des_init_tfm,
>  }
>  };
>  
> @@ -976,7 +952,7 @@ static int omap_des_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
>  	struct omap_des_dev *dd;
> -	struct crypto_alg *algp;
> +	struct skcipher_alg *algp;
>  	struct resource *res;
>  	int err = -ENOMEM, i, j, irq = -1;
>  	u32 reg;
> @@ -1071,9 +1047,9 @@ static int omap_des_probe(struct platform_device *pdev)
>  		for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
>  			algp = &dd->pdata->algs_info[i].algs_list[j];
>  
> -			pr_debug("reg alg: %s\n", algp->cra_name);
> +			pr_debug("reg alg: %s\n", algp->base.cra_name);
>  
> -			err = crypto_register_alg(algp);
> +			err = crypto_register_skcipher(algp);
>  			if (err)
>  				goto err_algs;
>  
> @@ -1086,7 +1062,7 @@ static int omap_des_probe(struct platform_device *pdev)
>  err_algs:
>  	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
>  		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
> -			crypto_unregister_alg(
> +			crypto_unregister_skcipher(
>  					&dd->pdata->algs_info[i].algs_list[j]);
>  
>  err_engine:
> @@ -1119,7 +1095,7 @@ static int omap_des_remove(struct platform_device *pdev)
>  
>  	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
>  		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
> -			crypto_unregister_alg(
> +			crypto_unregister_skcipher(
>  					&dd->pdata->algs_info[i].algs_list[j]);
>  
>  	tasklet_kill(&dd->done_task);
> -- 
> 2.20.1
>
Tero Kristo Oct. 17, 2019, 10:25 a.m. UTC | #2
On 15/10/2019 20:28, Tony Lindgren wrote:
> * Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
>> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
>> dated 20 august 2015 introduced the new skcipher API which is supposed to
>> replace both blkcipher and ablkcipher. While all consumers of the API have
>> been converted long ago, some producers of the ablkcipher remain, forcing
>> us to keep the ablkcipher support routines alive, along with the matching
>> code to expose [a]blkciphers via the skcipher API.
>>
>> So switch this driver to the skcipher API, allowing us to finally drop the
>> blkcipher code in the near future.
> 
> Adding Tero to loop as I think he was the last one to update this code.

With this patch, I am seeing the SW fallback fail with the following 
crash. Any ideas why this happens? This on top of 5.4-rc2, I did not 
pick any other crypto patches from the lists, but have couple of local 
fixes to get AES working properly with latest changes to testmgr. Am I 
missing something?

-Tero


[   11.458071] 8<--- cut here --- 

[   11.461205] Unable to handle kernel NULL pointer dereference at 
virtual addre
ss 00000000 

[   11.469352] pgd = e8df20f8 

[   11.472083] [00000000] *pgd=00000000 

[   11.475691] Internal error: Oops: 5 [#1] SMP ARM 

[   11.480325] Modules linked in: syscopyarea cfbimgblt sysfillrect 
sysimgblt fb
_sys_fops cfbcopyarea sha512_arm(+) dwc3 ecb udc_core usb_common evdev 
aes_arm a
es_generic snd_soc_simple_card snd_soc_simple_card_utils 
encoder_tpd12s015 leds_
gpio led_class aes_arm_bs gpio_fan crypto_simd omapdss connector_hdmi 
omapdss_ba
se cpufreq_dt cryptd drm omap_wdt watchdog drm_panel_orientation_quirks 
cec omap
_aes_driver(+) omap_sham(+) phy_omap_usb2 dwc3_omap omap_mailbox 
rtc_omap blueto
oth ecdh_generic ecc libaes snd_soc_davinci_mcasp snd_soc_ti_edma 
snd_soc_ti_sdm
a bq27xxx_battery_hdq bq27xxx_battery snd_soc_tlv320aic3x extcon_palmas 
rtc_palm
as palmas_pwrbutton snd_soc_core snd_pcm_dmaengine omap_rng snd_pcm 
rng_core snd
_timer omap_hdq snd at24 soundcore tmp102 wire cn rtc_ds1307 hwmon 
omap_des cryp
to_engine omap_crypto autofs4 

[   11.552884] CPU: 0 PID: 979 Comm: cryptomgr_test Not tainted 
5.4.0-rc2-00014-
g6f57ec1e433d-dirty #334 

[   11.562138] Hardware name: Generic DRA74X (Flattened Device Tree) 

[   11.568259] PC is at __crypto_xor+0x20/0xa0
[   11.572454] LR is at 0x10 

[   11.575080] pc : [<c0494a10>]    lr : [<00000010>]    psr: 20010113 

[   11.581369] sp : eb5f9a3c  ip : 676e6953  fp : eb5f9cec 

[   11.586611] r10: c0e05148  r9 : eb4a4e80  r8 : 00000010 

[   11.591853] r7 : 00000003  r6 : eb2e6000  r5 : fffffffc  r4 : 
eb2e6000
[   11.598403] r3 : 00000010  r2 : 00000000  r1 : eb2e6000  r0 : 
eb2e6000
[   11.604955] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM 
Segment none
[   11.612115] Control: 10c5387d  Table: abd0806a  DAC: 00000051 

[   11.617883] Process cryptomgr_test (pid: 979, stack limit = 
0x99cee04c)
[   11.624521] Stack: (0xeb5f9a3c to 0xeb5fa000) 

[   11.628891] 9a20: 

     00000010 

[   11.637101] 9a40: eb2e6000 eb2e6000 00000003 c04a45f8 edc12858 
eb2e6000 edc12
858 eb2e6000 

[   11.645310] 9a60: eb057020 00000000 00000010 eb057020 00000000 
00000010 00000
000 00000000 

[   11.653519] 9a80: 00000000 00000000 00000000 00000000 00000010 
00000000 00000
010 00000010 

[   11.661729] 9aa0: 00000000 09865966 eb5f9b00 eb22c400 c0e05148 
00000003 00000
400 00000000 

[   11.669938] 9ac0: 00000400 bf18c4c0 00000000 00000000 00000000 
00000000 00000
0b3 00000000 

[   11.678147] 9ae0: 00000000 00000001 00000001 00000001 00000000 
00000000 00000
000 09865966
[   11.686356] 9b00: 00000010 00000000 eb057020 eb057020 eb379800 
eb379940 00000
000 00000000 

[   11.694566] 9b20: eb4a4e80 00000400 0000084c 00000000 00000002 
00000001 00000
000 00000001 

[   11.702774] 9b40: 00000000 c016e38c 00000129 00000000 00000000 
00000001 00000
001 00000001 

[   11.710983] 9b60: eb379940 a8a2cc6a 00000002 09865966 c0a04b3c 
efd86300 eb245
7c0 efd862c0 

[   11.719193] 9b80: eb245900 a8d4a57d 00000002 00000000 eb5f9cf4 
c016ef74 00000
000 efd86300 

[   11.727402] 9ba0: 00000000 00000001 00000000 00000001 00000000 
c016e38c eb379
80c 09865966 

[   11.735611] 9bc0: efd86300 efd86300 eb21f240 efd862c0 eb21f380 
00000000 eb5f9
d20 eb2e6010 

[   11.743819] 9be0: c0e05148 eb2e6000 00000010 c04dfdd4 00000000 
00000001 c08fb
4b8 00000000 

[   11.752028] 9c00: 00000020 00000020 eb2e6000 eb057000 c0e05148 
eb0570c0 00000
001 c049e5f8 

[   11.760237] 9c20: eb057000 00000000 00000000 00000010 00000000 
c0a2eca8 00000
010 efd862c0 

[   11.768446] 9c40: 2eff5000 eb21f1c0 eb245740 c0e0554c eb5f9c94 
ebe5c040 efd86
2c0 ebe5c000 

[   11.776656] 9c60: eb4a4e40 ebf65c80 c0a30694 00000000 00000000 
09865966 c0a2e
c9c 00000010
[   11.784865] 9c80: c0a2ec9c eb057000 c0e05148 c0a2eca8 00000000 
00000010 eb5f9
cac c049e6fc 

[   11.793073] 9ca0: eb5f9cac 00000000 00000000 00000009 00000000 
00000000 eb5f9
d28 00000000 

[   11.801282] 9cc0: bf18f880 09865966 00000000 09865966 eb22c400 
eb057000 eb22c
400 c0a498f8 

[   11.809492] 9ce0: 00000000 eb5f9d28 c0a2ec9c c049f850 00000010 
eb5f9d20 00000
001 7fffffff 

[   11.817702] 9d00: 00000001 00000000 eb07e200 eb5f9e64 c0b7dc78 
eb20ccc0 00000
000 00000000 

[   11.825910] 9d20: c0b80cf4 00000010 00000000 00000000 eb5f9d30 
eb5f9d30 00000
000 00000001 

[   11.834119] 9d40: c0e05148 09865966 eb49e004 00000000 00000001 
00000001 00000
cc0 eb057168 

[   11.842328] 9d60: eb20cd00 eb07e280 00000001 c02963a4 00000000 
0000000a 00000
000 00000000 

[   11.850536] 9d80: ffffffff 00000000 00000000 ffffffff 00000000 
eb1f2800 00000
dc0 00000c30 

[   11.858746] 9da0: c0e763bc edc172e0 c0a2d3dc c015d2a4 00000cc0 
09865966 ec800
180 eb5f9e64 

[   11.866954] 9dc0: c0b685b2 eb5f9e44 ffffffff c0b685b2 00000002 
eb5f9df4 c0aab
698 c08f6464 

[   11.875163] 9de0: ffffff0f ffff0a00 14a0619b eb5f9e64 bf18f8a8 
ffffff0f ffff0
a00 09865966
[   11.883373] 9e00: c0eac400 c0e05148 c0a498f8 eb07e200 eb07e200 
00000001 eb22c
400 09865966 

[   11.891582] 9e20: c0a2d74c c0a2ec9c c0a498f8 c0a2f620 eb07e200 
00000001 eb22c
400 eb057000 

[   11.899790] 9e40: c0a2d74c c049fef0 c0a2ec9c eb22c400 eb057000 
eb057180 00000
000 00000000 

[   11.907998] 9e60: eb057168 eb200030 eb07e280 c049d63c eb057000 
09865966 eb07e
200 eb20ccc0 

[   11.916208] 9e80: eb22c400 eb07e200 eb057000 c0a2d74c eb20cd00 
eb07e280 c0a2d
3dc c04a1eb8 

[   11.924418] 9ea0: eb057000 00000000 c04a1e38 0000001b 00001185 
ffffffff c0e05
148 eb07e200 

[   11.932626] 9ec0: eb07e280 c049dff0 ecb29100 00000400 efd862c0 
ecb29080 c0e09
ebc ffffffff 

[   11.940835] 9ee0: c08fb4b8 00000102 eb0c6018 efd862c0 ecb29080 
eb245740 ebca5
000 00000001 

[   11.949043] 9f00: 00000002 eb0c7b64 eb5f9f6c c08fb4b8 00000000 
eb0c7b60 00000
001 eb0c7b6c 

[   11.957251] 9f20: 00000000 2eff5000 c0a04adc c08fba14 eb245b90 
efd862c0 00000
000 00000000
[   11.965460] 9f40: 00000000 09865966 eb0c7b64 eb245740 eb5f8000 
09865966 ffffe
000 eb07e200 

[   11.973668] 9f60: 00000000 eb3f8b80 eb5f8000 eb07e200 c049d144 
eb0c7b64 eb22e
29c c049d184 

[   11.981877] 9f80: eb22e280 c015c708 00000001 eb3f8b80 c015c5fc 
00000000 00000
000 00000000 

[   11.990086] 9fa0: 00000000 00000000 00000000 c01010e8 00000000 
00000000 00000
000 00000000 

[   11.998294] 9fc0: 00000000 00000000 00000000 00000000 00000000 
00000000 00000
000 00000000 

[   12.006502] 9fe0: 00000000 00000000 00000000 00000000 00000013 
00000000 00000
000 00000000 

[   12.014721] [<c0494a10>] (__crypto_xor) from [<c04a45f8>] 
(crypto_cbc_encrypt
+0xf4/0x13c) 

[   12.022945] [<c04a45f8>] (crypto_cbc_encrypt) from [<bf18c4c0>] 
(omap_aes_cry
pt+0xc8/0x114 [omap_aes_driver]) 

[   12.032924] [<bf18c4c0>] (omap_aes_crypt [omap_aes_driver]) from 
[<c049f850>]
  (test_skcipher_vec_cfg+0x1c8/0x7e4) 

[   12.043228] [<c049f850>] (test_skcipher_vec_cfg) from [<c049fef0>] 
(test_skci
pher+0x84/0xf0)
[   12.051701] [<c049fef0>] (test_skcipher) from [<c04a1eb8>] 
(alg_test_skcipher
+0x80/0x140) 

[   12.059912] [<c04a1eb8>] (alg_test_skcipher) from [<c049dff0>] 
(alg_test.part
.8+0x8c/0x3a0) 

[   12.068297] [<c049dff0>] (alg_test.part.8) from [<c049d184>] 
(cryptomgr_test+
0x40/0x48) 

[   12.076336] [<c049d184>] (cryptomgr_test) from [<c015c708>] 
(kthread+0x10c/0x
148) 

[   12.083853] [<c015c708>] (kthread) from [<c01010e8>] 
(ret_from_fork+0x14/0x2c
) 

[   12.091100] Exception stack(0xeb5f9fb0 to 0xeb5f9ff8) 

[   12.096169] 9fa0:                                     00000000 
00000000 00000
000 00000000 

[   12.104378] 9fc0: 00000000 00000000 00000000 00000000 00000000 
00000000 00000
000 00000000 

[   12.112593] 9fe0: 00000000 00000000 00000000 00000000 00000013 
00000000
[   12.119240] Code: e2425004 e1a0e003 e1a04000 e5b6c004 (e5b57004) 

[   12.125437] ---[ end trace 9b4a71e796035151 ]---
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Ard Biesheuvel Oct. 17, 2019, 10:45 a.m. UTC | #3
On Thu, 17 Oct 2019 at 12:25, Tero Kristo <t-kristo@ti.com> wrote:
>
> On 15/10/2019 20:28, Tony Lindgren wrote:
> > * Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
> >> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> >> dated 20 august 2015 introduced the new skcipher API which is supposed to
> >> replace both blkcipher and ablkcipher. While all consumers of the API have
> >> been converted long ago, some producers of the ablkcipher remain, forcing
> >> us to keep the ablkcipher support routines alive, along with the matching
> >> code to expose [a]blkciphers via the skcipher API.
> >>
> >> So switch this driver to the skcipher API, allowing us to finally drop the
> >> blkcipher code in the near future.
> >
> > Adding Tero to loop as I think he was the last one to update this code.
>
> With this patch, I am seeing the SW fallback fail with the following
> crash. Any ideas why this happens? This on top of 5.4-rc2, I did not
> pick any other crypto patches from the lists, but have couple of local
> fixes to get AES working properly with latest changes to testmgr. Am I
> missing something?
>

Thanks Tero.

It looks like the fallback ends up invoking __crypto_xor() with a
value of NULL for the IV.

This should fix the issue, I think.

diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 329fddbe8a39..a1fc03ed01f3 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -715,6 +715,7 @@ static struct skcipher_alg algs_ecb_cbc[] = {

        .min_keysize            = AES_MIN_KEY_SIZE,
        .max_keysize            = AES_MAX_KEY_SIZE,
+       .ivsize                 = AES_BLOCK_SIZE,
        .setkey                 = omap_aes_setkey,
        .encrypt                = omap_aes_cbc_encrypt,
        .decrypt                = omap_aes_cbc_decrypt,


Thanks,
Ard.

> -Tero
>
>
> [   11.458071] 8<--- cut here ---
>
> [   11.461205] Unable to handle kernel NULL pointer dereference at
> virtual addre
> ss 00000000
>
> [   11.469352] pgd = e8df20f8
>
> [   11.472083] [00000000] *pgd=00000000
>
> [   11.475691] Internal error: Oops: 5 [#1] SMP ARM
>
> [   11.480325] Modules linked in: syscopyarea cfbimgblt sysfillrect
> sysimgblt fb
> _sys_fops cfbcopyarea sha512_arm(+) dwc3 ecb udc_core usb_common evdev
> aes_arm a
> es_generic snd_soc_simple_card snd_soc_simple_card_utils
> encoder_tpd12s015 leds_
> gpio led_class aes_arm_bs gpio_fan crypto_simd omapdss connector_hdmi
> omapdss_ba
> se cpufreq_dt cryptd drm omap_wdt watchdog drm_panel_orientation_quirks
> cec omap
> _aes_driver(+) omap_sham(+) phy_omap_usb2 dwc3_omap omap_mailbox
> rtc_omap blueto
> oth ecdh_generic ecc libaes snd_soc_davinci_mcasp snd_soc_ti_edma
> snd_soc_ti_sdm
> a bq27xxx_battery_hdq bq27xxx_battery snd_soc_tlv320aic3x extcon_palmas
> rtc_palm
> as palmas_pwrbutton snd_soc_core snd_pcm_dmaengine omap_rng snd_pcm
> rng_core snd
> _timer omap_hdq snd at24 soundcore tmp102 wire cn rtc_ds1307 hwmon
> omap_des cryp
> to_engine omap_crypto autofs4
>
> [   11.552884] CPU: 0 PID: 979 Comm: cryptomgr_test Not tainted
> 5.4.0-rc2-00014-
> g6f57ec1e433d-dirty #334
>
> [   11.562138] Hardware name: Generic DRA74X (Flattened Device Tree)
>
> [   11.568259] PC is at __crypto_xor+0x20/0xa0
> [   11.572454] LR is at 0x10
>
> [   11.575080] pc : [<c0494a10>]    lr : [<00000010>]    psr: 20010113
>
> [   11.581369] sp : eb5f9a3c  ip : 676e6953  fp : eb5f9cec
>
> [   11.586611] r10: c0e05148  r9 : eb4a4e80  r8 : 00000010
>
> [   11.591853] r7 : 00000003  r6 : eb2e6000  r5 : fffffffc  r4 :
> eb2e6000
> [   11.598403] r3 : 00000010  r2 : 00000000  r1 : eb2e6000  r0 :
> eb2e6000
> [   11.604955] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM
> Segment none
> [   11.612115] Control: 10c5387d  Table: abd0806a  DAC: 00000051
>
> [   11.617883] Process cryptomgr_test (pid: 979, stack limit =
> 0x99cee04c)
> [   11.624521] Stack: (0xeb5f9a3c to 0xeb5fa000)
>
> [   11.628891] 9a20:
>
>      00000010
>
> [   11.637101] 9a40: eb2e6000 eb2e6000 00000003 c04a45f8 edc12858
> eb2e6000 edc12
> 858 eb2e6000
>
> [   11.645310] 9a60: eb057020 00000000 00000010 eb057020 00000000
> 00000010 00000
> 000 00000000
>
> [   11.653519] 9a80: 00000000 00000000 00000000 00000000 00000010
> 00000000 00000
> 010 00000010
>
> [   11.661729] 9aa0: 00000000 09865966 eb5f9b00 eb22c400 c0e05148
> 00000003 00000
> 400 00000000
>
> [   11.669938] 9ac0: 00000400 bf18c4c0 00000000 00000000 00000000
> 00000000 00000
> 0b3 00000000
>
> [   11.678147] 9ae0: 00000000 00000001 00000001 00000001 00000000
> 00000000 00000
> 000 09865966
> [   11.686356] 9b00: 00000010 00000000 eb057020 eb057020 eb379800
> eb379940 00000
> 000 00000000
>
> [   11.694566] 9b20: eb4a4e80 00000400 0000084c 00000000 00000002
> 00000001 00000
> 000 00000001
>
> [   11.702774] 9b40: 00000000 c016e38c 00000129 00000000 00000000
> 00000001 00000
> 001 00000001
>
> [   11.710983] 9b60: eb379940 a8a2cc6a 00000002 09865966 c0a04b3c
> efd86300 eb245
> 7c0 efd862c0
>
> [   11.719193] 9b80: eb245900 a8d4a57d 00000002 00000000 eb5f9cf4
> c016ef74 00000
> 000 efd86300
>
> [   11.727402] 9ba0: 00000000 00000001 00000000 00000001 00000000
> c016e38c eb379
> 80c 09865966
>
> [   11.735611] 9bc0: efd86300 efd86300 eb21f240 efd862c0 eb21f380
> 00000000 eb5f9
> d20 eb2e6010
>
> [   11.743819] 9be0: c0e05148 eb2e6000 00000010 c04dfdd4 00000000
> 00000001 c08fb
> 4b8 00000000
>
> [   11.752028] 9c00: 00000020 00000020 eb2e6000 eb057000 c0e05148
> eb0570c0 00000
> 001 c049e5f8
>
> [   11.760237] 9c20: eb057000 00000000 00000000 00000010 00000000
> c0a2eca8 00000
> 010 efd862c0
>
> [   11.768446] 9c40: 2eff5000 eb21f1c0 eb245740 c0e0554c eb5f9c94
> ebe5c040 efd86
> 2c0 ebe5c000
>
> [   11.776656] 9c60: eb4a4e40 ebf65c80 c0a30694 00000000 00000000
> 09865966 c0a2e
> c9c 00000010
> [   11.784865] 9c80: c0a2ec9c eb057000 c0e05148 c0a2eca8 00000000
> 00000010 eb5f9
> cac c049e6fc
>
> [   11.793073] 9ca0: eb5f9cac 00000000 00000000 00000009 00000000
> 00000000 eb5f9
> d28 00000000
>
> [   11.801282] 9cc0: bf18f880 09865966 00000000 09865966 eb22c400
> eb057000 eb22c
> 400 c0a498f8
>
> [   11.809492] 9ce0: 00000000 eb5f9d28 c0a2ec9c c049f850 00000010
> eb5f9d20 00000
> 001 7fffffff
>
> [   11.817702] 9d00: 00000001 00000000 eb07e200 eb5f9e64 c0b7dc78
> eb20ccc0 00000
> 000 00000000
>
> [   11.825910] 9d20: c0b80cf4 00000010 00000000 00000000 eb5f9d30
> eb5f9d30 00000
> 000 00000001
>
> [   11.834119] 9d40: c0e05148 09865966 eb49e004 00000000 00000001
> 00000001 00000
> cc0 eb057168
>
> [   11.842328] 9d60: eb20cd00 eb07e280 00000001 c02963a4 00000000
> 0000000a 00000
> 000 00000000
>
> [   11.850536] 9d80: ffffffff 00000000 00000000 ffffffff 00000000
> eb1f2800 00000
> dc0 00000c30
>
> [   11.858746] 9da0: c0e763bc edc172e0 c0a2d3dc c015d2a4 00000cc0
> 09865966 ec800
> 180 eb5f9e64
>
> [   11.866954] 9dc0: c0b685b2 eb5f9e44 ffffffff c0b685b2 00000002
> eb5f9df4 c0aab
> 698 c08f6464
>
> [   11.875163] 9de0: ffffff0f ffff0a00 14a0619b eb5f9e64 bf18f8a8
> ffffff0f ffff0
> a00 09865966
> [   11.883373] 9e00: c0eac400 c0e05148 c0a498f8 eb07e200 eb07e200
> 00000001 eb22c
> 400 09865966
>
> [   11.891582] 9e20: c0a2d74c c0a2ec9c c0a498f8 c0a2f620 eb07e200
> 00000001 eb22c
> 400 eb057000
>
> [   11.899790] 9e40: c0a2d74c c049fef0 c0a2ec9c eb22c400 eb057000
> eb057180 00000
> 000 00000000
>
> [   11.907998] 9e60: eb057168 eb200030 eb07e280 c049d63c eb057000
> 09865966 eb07e
> 200 eb20ccc0
>
> [   11.916208] 9e80: eb22c400 eb07e200 eb057000 c0a2d74c eb20cd00
> eb07e280 c0a2d
> 3dc c04a1eb8
>
> [   11.924418] 9ea0: eb057000 00000000 c04a1e38 0000001b 00001185
> ffffffff c0e05
> 148 eb07e200
>
> [   11.932626] 9ec0: eb07e280 c049dff0 ecb29100 00000400 efd862c0
> ecb29080 c0e09
> ebc ffffffff
>
> [   11.940835] 9ee0: c08fb4b8 00000102 eb0c6018 efd862c0 ecb29080
> eb245740 ebca5
> 000 00000001
>
> [   11.949043] 9f00: 00000002 eb0c7b64 eb5f9f6c c08fb4b8 00000000
> eb0c7b60 00000
> 001 eb0c7b6c
>
> [   11.957251] 9f20: 00000000 2eff5000 c0a04adc c08fba14 eb245b90
> efd862c0 00000
> 000 00000000
> [   11.965460] 9f40: 00000000 09865966 eb0c7b64 eb245740 eb5f8000
> 09865966 ffffe
> 000 eb07e200
>
> [   11.973668] 9f60: 00000000 eb3f8b80 eb5f8000 eb07e200 c049d144
> eb0c7b64 eb22e
> 29c c049d184
>
> [   11.981877] 9f80: eb22e280 c015c708 00000001 eb3f8b80 c015c5fc
> 00000000 00000
> 000 00000000
>
> [   11.990086] 9fa0: 00000000 00000000 00000000 c01010e8 00000000
> 00000000 00000
> 000 00000000
>
> [   11.998294] 9fc0: 00000000 00000000 00000000 00000000 00000000
> 00000000 00000
> 000 00000000
>
> [   12.006502] 9fe0: 00000000 00000000 00000000 00000000 00000013
> 00000000 00000
> 000 00000000
>
> [   12.014721] [<c0494a10>] (__crypto_xor) from [<c04a45f8>]
> (crypto_cbc_encrypt
> +0xf4/0x13c)
>
> [   12.022945] [<c04a45f8>] (crypto_cbc_encrypt) from [<bf18c4c0>]
> (omap_aes_cry
> pt+0xc8/0x114 [omap_aes_driver])
>
> [   12.032924] [<bf18c4c0>] (omap_aes_crypt [omap_aes_driver]) from
> [<c049f850>]
>   (test_skcipher_vec_cfg+0x1c8/0x7e4)
>
> [   12.043228] [<c049f850>] (test_skcipher_vec_cfg) from [<c049fef0>]
> (test_skci
> pher+0x84/0xf0)
> [   12.051701] [<c049fef0>] (test_skcipher) from [<c04a1eb8>]
> (alg_test_skcipher
> +0x80/0x140)
>
> [   12.059912] [<c04a1eb8>] (alg_test_skcipher) from [<c049dff0>]
> (alg_test.part
> .8+0x8c/0x3a0)
>
> [   12.068297] [<c049dff0>] (alg_test.part.8) from [<c049d184>]
> (cryptomgr_test+
> 0x40/0x48)
>
> [   12.076336] [<c049d184>] (cryptomgr_test) from [<c015c708>]
> (kthread+0x10c/0x
> 148)
>
> [   12.083853] [<c015c708>] (kthread) from [<c01010e8>]
> (ret_from_fork+0x14/0x2c
> )
>
> [   12.091100] Exception stack(0xeb5f9fb0 to 0xeb5f9ff8)
>
> [   12.096169] 9fa0:                                     00000000
> 00000000 00000
> 000 00000000
>
> [   12.104378] 9fc0: 00000000 00000000 00000000 00000000 00000000
> 00000000 00000
> 000 00000000
>
> [   12.112593] 9fe0: 00000000 00000000 00000000 00000000 00000013
> 00000000
> [   12.119240] Code: e2425004 e1a0e003 e1a04000 e5b6c004 (e5b57004)
>
> [   12.125437] ---[ end trace 9b4a71e796035151 ]---
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Tero Kristo Oct. 17, 2019, 11:25 a.m. UTC | #4
On 17/10/2019 13:45, Ard Biesheuvel wrote:
> On Thu, 17 Oct 2019 at 12:25, Tero Kristo <t-kristo@ti.com> wrote:
>>
>> On 15/10/2019 20:28, Tony Lindgren wrote:
>>> * Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
>>>> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
>>>> dated 20 august 2015 introduced the new skcipher API which is supposed to
>>>> replace both blkcipher and ablkcipher. While all consumers of the API have
>>>> been converted long ago, some producers of the ablkcipher remain, forcing
>>>> us to keep the ablkcipher support routines alive, along with the matching
>>>> code to expose [a]blkciphers via the skcipher API.
>>>>
>>>> So switch this driver to the skcipher API, allowing us to finally drop the
>>>> blkcipher code in the near future.
>>>
>>> Adding Tero to loop as I think he was the last one to update this code.
>>
>> With this patch, I am seeing the SW fallback fail with the following
>> crash. Any ideas why this happens? This on top of 5.4-rc2, I did not
>> pick any other crypto patches from the lists, but have couple of local
>> fixes to get AES working properly with latest changes to testmgr. Am I
>> missing something?
>>
> 
> Thanks Tero.
> 
> It looks like the fallback ends up invoking __crypto_xor() with a
> value of NULL for the IV.
> 
> This should fix the issue, I think.

Thats right, it fixes it. There is another skcipher missing the ivsize 
within omap-aes.c it seems.

Do you want to send a patch out for both or shall I send a patch with 
you as suggested by?

I have some 10 omap crypto related patches on their way.

-Tero

> 
> diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
> index 329fddbe8a39..a1fc03ed01f3 100644
> --- a/drivers/crypto/omap-aes.c
> +++ b/drivers/crypto/omap-aes.c
> @@ -715,6 +715,7 @@ static struct skcipher_alg algs_ecb_cbc[] = {
> 
>          .min_keysize            = AES_MIN_KEY_SIZE,
>          .max_keysize            = AES_MAX_KEY_SIZE,
> +       .ivsize                 = AES_BLOCK_SIZE,
>          .setkey                 = omap_aes_setkey,
>          .encrypt                = omap_aes_cbc_encrypt,
>          .decrypt                = omap_aes_cbc_decrypt,
> 
> 
> Thanks,
> Ard.
> 
>> -Tero
>>
>>
>> [   11.458071] 8<--- cut here ---
>>
>> [   11.461205] Unable to handle kernel NULL pointer dereference at
>> virtual addre
>> ss 00000000
>>
>> [   11.469352] pgd = e8df20f8
>>
>> [   11.472083] [00000000] *pgd=00000000
>>
>> [   11.475691] Internal error: Oops: 5 [#1] SMP ARM
>>
>> [   11.480325] Modules linked in: syscopyarea cfbimgblt sysfillrect
>> sysimgblt fb
>> _sys_fops cfbcopyarea sha512_arm(+) dwc3 ecb udc_core usb_common evdev
>> aes_arm a
>> es_generic snd_soc_simple_card snd_soc_simple_card_utils
>> encoder_tpd12s015 leds_
>> gpio led_class aes_arm_bs gpio_fan crypto_simd omapdss connector_hdmi
>> omapdss_ba
>> se cpufreq_dt cryptd drm omap_wdt watchdog drm_panel_orientation_quirks
>> cec omap
>> _aes_driver(+) omap_sham(+) phy_omap_usb2 dwc3_omap omap_mailbox
>> rtc_omap blueto
>> oth ecdh_generic ecc libaes snd_soc_davinci_mcasp snd_soc_ti_edma
>> snd_soc_ti_sdm
>> a bq27xxx_battery_hdq bq27xxx_battery snd_soc_tlv320aic3x extcon_palmas
>> rtc_palm
>> as palmas_pwrbutton snd_soc_core snd_pcm_dmaengine omap_rng snd_pcm
>> rng_core snd
>> _timer omap_hdq snd at24 soundcore tmp102 wire cn rtc_ds1307 hwmon
>> omap_des cryp
>> to_engine omap_crypto autofs4
>>
>> [   11.552884] CPU: 0 PID: 979 Comm: cryptomgr_test Not tainted
>> 5.4.0-rc2-00014-
>> g6f57ec1e433d-dirty #334
>>
>> [   11.562138] Hardware name: Generic DRA74X (Flattened Device Tree)
>>
>> [   11.568259] PC is at __crypto_xor+0x20/0xa0
>> [   11.572454] LR is at 0x10
>>
>> [   11.575080] pc : [<c0494a10>]    lr : [<00000010>]    psr: 20010113
>>
>> [   11.581369] sp : eb5f9a3c  ip : 676e6953  fp : eb5f9cec
>>
>> [   11.586611] r10: c0e05148  r9 : eb4a4e80  r8 : 00000010
>>
>> [   11.591853] r7 : 00000003  r6 : eb2e6000  r5 : fffffffc  r4 :
>> eb2e6000
>> [   11.598403] r3 : 00000010  r2 : 00000000  r1 : eb2e6000  r0 :
>> eb2e6000
>> [   11.604955] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM
>> Segment none
>> [   11.612115] Control: 10c5387d  Table: abd0806a  DAC: 00000051
>>
>> [   11.617883] Process cryptomgr_test (pid: 979, stack limit =
>> 0x99cee04c)
>> [   11.624521] Stack: (0xeb5f9a3c to 0xeb5fa000)
>>
>> [   11.628891] 9a20:
>>
>>       00000010
>>
>> [   11.637101] 9a40: eb2e6000 eb2e6000 00000003 c04a45f8 edc12858
>> eb2e6000 edc12
>> 858 eb2e6000
>>
>> [   11.645310] 9a60: eb057020 00000000 00000010 eb057020 00000000
>> 00000010 00000
>> 000 00000000
>>
>> [   11.653519] 9a80: 00000000 00000000 00000000 00000000 00000010
>> 00000000 00000
>> 010 00000010
>>
>> [   11.661729] 9aa0: 00000000 09865966 eb5f9b00 eb22c400 c0e05148
>> 00000003 00000
>> 400 00000000
>>
>> [   11.669938] 9ac0: 00000400 bf18c4c0 00000000 00000000 00000000
>> 00000000 00000
>> 0b3 00000000
>>
>> [   11.678147] 9ae0: 00000000 00000001 00000001 00000001 00000000
>> 00000000 00000
>> 000 09865966
>> [   11.686356] 9b00: 00000010 00000000 eb057020 eb057020 eb379800
>> eb379940 00000
>> 000 00000000
>>
>> [   11.694566] 9b20: eb4a4e80 00000400 0000084c 00000000 00000002
>> 00000001 00000
>> 000 00000001
>>
>> [   11.702774] 9b40: 00000000 c016e38c 00000129 00000000 00000000
>> 00000001 00000
>> 001 00000001
>>
>> [   11.710983] 9b60: eb379940 a8a2cc6a 00000002 09865966 c0a04b3c
>> efd86300 eb245
>> 7c0 efd862c0
>>
>> [   11.719193] 9b80: eb245900 a8d4a57d 00000002 00000000 eb5f9cf4
>> c016ef74 00000
>> 000 efd86300
>>
>> [   11.727402] 9ba0: 00000000 00000001 00000000 00000001 00000000
>> c016e38c eb379
>> 80c 09865966
>>
>> [   11.735611] 9bc0: efd86300 efd86300 eb21f240 efd862c0 eb21f380
>> 00000000 eb5f9
>> d20 eb2e6010
>>
>> [   11.743819] 9be0: c0e05148 eb2e6000 00000010 c04dfdd4 00000000
>> 00000001 c08fb
>> 4b8 00000000
>>
>> [   11.752028] 9c00: 00000020 00000020 eb2e6000 eb057000 c0e05148
>> eb0570c0 00000
>> 001 c049e5f8
>>
>> [   11.760237] 9c20: eb057000 00000000 00000000 00000010 00000000
>> c0a2eca8 00000
>> 010 efd862c0
>>
>> [   11.768446] 9c40: 2eff5000 eb21f1c0 eb245740 c0e0554c eb5f9c94
>> ebe5c040 efd86
>> 2c0 ebe5c000
>>
>> [   11.776656] 9c60: eb4a4e40 ebf65c80 c0a30694 00000000 00000000
>> 09865966 c0a2e
>> c9c 00000010
>> [   11.784865] 9c80: c0a2ec9c eb057000 c0e05148 c0a2eca8 00000000
>> 00000010 eb5f9
>> cac c049e6fc
>>
>> [   11.793073] 9ca0: eb5f9cac 00000000 00000000 00000009 00000000
>> 00000000 eb5f9
>> d28 00000000
>>
>> [   11.801282] 9cc0: bf18f880 09865966 00000000 09865966 eb22c400
>> eb057000 eb22c
>> 400 c0a498f8
>>
>> [   11.809492] 9ce0: 00000000 eb5f9d28 c0a2ec9c c049f850 00000010
>> eb5f9d20 00000
>> 001 7fffffff
>>
>> [   11.817702] 9d00: 00000001 00000000 eb07e200 eb5f9e64 c0b7dc78
>> eb20ccc0 00000
>> 000 00000000
>>
>> [   11.825910] 9d20: c0b80cf4 00000010 00000000 00000000 eb5f9d30
>> eb5f9d30 00000
>> 000 00000001
>>
>> [   11.834119] 9d40: c0e05148 09865966 eb49e004 00000000 00000001
>> 00000001 00000
>> cc0 eb057168
>>
>> [   11.842328] 9d60: eb20cd00 eb07e280 00000001 c02963a4 00000000
>> 0000000a 00000
>> 000 00000000
>>
>> [   11.850536] 9d80: ffffffff 00000000 00000000 ffffffff 00000000
>> eb1f2800 00000
>> dc0 00000c30
>>
>> [   11.858746] 9da0: c0e763bc edc172e0 c0a2d3dc c015d2a4 00000cc0
>> 09865966 ec800
>> 180 eb5f9e64
>>
>> [   11.866954] 9dc0: c0b685b2 eb5f9e44 ffffffff c0b685b2 00000002
>> eb5f9df4 c0aab
>> 698 c08f6464
>>
>> [   11.875163] 9de0: ffffff0f ffff0a00 14a0619b eb5f9e64 bf18f8a8
>> ffffff0f ffff0
>> a00 09865966
>> [   11.883373] 9e00: c0eac400 c0e05148 c0a498f8 eb07e200 eb07e200
>> 00000001 eb22c
>> 400 09865966
>>
>> [   11.891582] 9e20: c0a2d74c c0a2ec9c c0a498f8 c0a2f620 eb07e200
>> 00000001 eb22c
>> 400 eb057000
>>
>> [   11.899790] 9e40: c0a2d74c c049fef0 c0a2ec9c eb22c400 eb057000
>> eb057180 00000
>> 000 00000000
>>
>> [   11.907998] 9e60: eb057168 eb200030 eb07e280 c049d63c eb057000
>> 09865966 eb07e
>> 200 eb20ccc0
>>
>> [   11.916208] 9e80: eb22c400 eb07e200 eb057000 c0a2d74c eb20cd00
>> eb07e280 c0a2d
>> 3dc c04a1eb8
>>
>> [   11.924418] 9ea0: eb057000 00000000 c04a1e38 0000001b 00001185
>> ffffffff c0e05
>> 148 eb07e200
>>
>> [   11.932626] 9ec0: eb07e280 c049dff0 ecb29100 00000400 efd862c0
>> ecb29080 c0e09
>> ebc ffffffff
>>
>> [   11.940835] 9ee0: c08fb4b8 00000102 eb0c6018 efd862c0 ecb29080
>> eb245740 ebca5
>> 000 00000001
>>
>> [   11.949043] 9f00: 00000002 eb0c7b64 eb5f9f6c c08fb4b8 00000000
>> eb0c7b60 00000
>> 001 eb0c7b6c
>>
>> [   11.957251] 9f20: 00000000 2eff5000 c0a04adc c08fba14 eb245b90
>> efd862c0 00000
>> 000 00000000
>> [   11.965460] 9f40: 00000000 09865966 eb0c7b64 eb245740 eb5f8000
>> 09865966 ffffe
>> 000 eb07e200
>>
>> [   11.973668] 9f60: 00000000 eb3f8b80 eb5f8000 eb07e200 c049d144
>> eb0c7b64 eb22e
>> 29c c049d184
>>
>> [   11.981877] 9f80: eb22e280 c015c708 00000001 eb3f8b80 c015c5fc
>> 00000000 00000
>> 000 00000000
>>
>> [   11.990086] 9fa0: 00000000 00000000 00000000 c01010e8 00000000
>> 00000000 00000
>> 000 00000000
>>
>> [   11.998294] 9fc0: 00000000 00000000 00000000 00000000 00000000
>> 00000000 00000
>> 000 00000000
>>
>> [   12.006502] 9fe0: 00000000 00000000 00000000 00000000 00000013
>> 00000000 00000
>> 000 00000000
>>
>> [   12.014721] [<c0494a10>] (__crypto_xor) from [<c04a45f8>]
>> (crypto_cbc_encrypt
>> +0xf4/0x13c)
>>
>> [   12.022945] [<c04a45f8>] (crypto_cbc_encrypt) from [<bf18c4c0>]
>> (omap_aes_cry
>> pt+0xc8/0x114 [omap_aes_driver])
>>
>> [   12.032924] [<bf18c4c0>] (omap_aes_crypt [omap_aes_driver]) from
>> [<c049f850>]
>>    (test_skcipher_vec_cfg+0x1c8/0x7e4)
>>
>> [   12.043228] [<c049f850>] (test_skcipher_vec_cfg) from [<c049fef0>]
>> (test_skci
>> pher+0x84/0xf0)
>> [   12.051701] [<c049fef0>] (test_skcipher) from [<c04a1eb8>]
>> (alg_test_skcipher
>> +0x80/0x140)
>>
>> [   12.059912] [<c04a1eb8>] (alg_test_skcipher) from [<c049dff0>]
>> (alg_test.part
>> .8+0x8c/0x3a0)
>>
>> [   12.068297] [<c049dff0>] (alg_test.part.8) from [<c049d184>]
>> (cryptomgr_test+
>> 0x40/0x48)
>>
>> [   12.076336] [<c049d184>] (cryptomgr_test) from [<c015c708>]
>> (kthread+0x10c/0x
>> 148)
>>
>> [   12.083853] [<c015c708>] (kthread) from [<c01010e8>]
>> (ret_from_fork+0x14/0x2c
>> )
>>
>> [   12.091100] Exception stack(0xeb5f9fb0 to 0xeb5f9ff8)
>>
>> [   12.096169] 9fa0:                                     00000000
>> 00000000 00000
>> 000 00000000
>>
>> [   12.104378] 9fc0: 00000000 00000000 00000000 00000000 00000000
>> 00000000 00000
>> 000 00000000
>>
>> [   12.112593] 9fe0: 00000000 00000000 00000000 00000000 00000013
>> 00000000
>> [   12.119240] Code: e2425004 e1a0e003 e1a04000 e5b6c004 (e5b57004)
>>
>> [   12.125437] ---[ end trace 9b4a71e796035151 ]---
>> --

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Ard Biesheuvel Oct. 17, 2019, 11:56 a.m. UTC | #5
On Thu, 17 Oct 2019 at 13:25, Tero Kristo <t-kristo@ti.com> wrote:
>
> On 17/10/2019 13:45, Ard Biesheuvel wrote:
> > On Thu, 17 Oct 2019 at 12:25, Tero Kristo <t-kristo@ti.com> wrote:
> >>
> >> On 15/10/2019 20:28, Tony Lindgren wrote:
> >>> * Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
> >>>> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> >>>> dated 20 august 2015 introduced the new skcipher API which is supposed to
> >>>> replace both blkcipher and ablkcipher. While all consumers of the API have
> >>>> been converted long ago, some producers of the ablkcipher remain, forcing
> >>>> us to keep the ablkcipher support routines alive, along with the matching
> >>>> code to expose [a]blkciphers via the skcipher API.
> >>>>
> >>>> So switch this driver to the skcipher API, allowing us to finally drop the
> >>>> blkcipher code in the near future.
> >>>
> >>> Adding Tero to loop as I think he was the last one to update this code.
> >>
> >> With this patch, I am seeing the SW fallback fail with the following
> >> crash. Any ideas why this happens? This on top of 5.4-rc2, I did not
> >> pick any other crypto patches from the lists, but have couple of local
> >> fixes to get AES working properly with latest changes to testmgr. Am I
> >> missing something?
> >>
> >
> > Thanks Tero.
> >
> > It looks like the fallback ends up invoking __crypto_xor() with a
> > value of NULL for the IV.
> >
> > This should fix the issue, I think.
>
> Thats right, it fixes it. There is another skcipher missing the ivsize
> within omap-aes.c it seems.
>

I take it you are referring to ecb(aes)? That one actually has a
ivsize of 0, so that one is correct.

> Do you want to send a patch out for both or shall I send a patch with
> you as suggested by?
>

I'll fold the cbc fix into my series, thanks.

> I have some 10 omap crypto related patches on their way.
>

Would I be able to test those on a BeagleBone white? In any case,
please cc me so I can have a look as well.

Thanks,
Ard.


> >
> > diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
> > index 329fddbe8a39..a1fc03ed01f3 100644
> > --- a/drivers/crypto/omap-aes.c
> > +++ b/drivers/crypto/omap-aes.c
> > @@ -715,6 +715,7 @@ static struct skcipher_alg algs_ecb_cbc[] = {
> >
> >          .min_keysize            = AES_MIN_KEY_SIZE,
> >          .max_keysize            = AES_MAX_KEY_SIZE,
> > +       .ivsize                 = AES_BLOCK_SIZE,
> >          .setkey                 = omap_aes_setkey,
> >          .encrypt                = omap_aes_cbc_encrypt,
> >          .decrypt                = omap_aes_cbc_decrypt,
> >
> >
> > Thanks,
> > Ard.
> >
> >> -Tero
> >>
> >>
> >> [   11.458071] 8<--- cut here ---
> >>
> >> [   11.461205] Unable to handle kernel NULL pointer dereference at
> >> virtual addre
> >> ss 00000000
> >>
> >> [   11.469352] pgd = e8df20f8
> >>
> >> [   11.472083] [00000000] *pgd=00000000
> >>
> >> [   11.475691] Internal error: Oops: 5 [#1] SMP ARM
> >>
> >> [   11.480325] Modules linked in: syscopyarea cfbimgblt sysfillrect
> >> sysimgblt fb
> >> _sys_fops cfbcopyarea sha512_arm(+) dwc3 ecb udc_core usb_common evdev
> >> aes_arm a
> >> es_generic snd_soc_simple_card snd_soc_simple_card_utils
> >> encoder_tpd12s015 leds_
> >> gpio led_class aes_arm_bs gpio_fan crypto_simd omapdss connector_hdmi
> >> omapdss_ba
> >> se cpufreq_dt cryptd drm omap_wdt watchdog drm_panel_orientation_quirks
> >> cec omap
> >> _aes_driver(+) omap_sham(+) phy_omap_usb2 dwc3_omap omap_mailbox
> >> rtc_omap blueto
> >> oth ecdh_generic ecc libaes snd_soc_davinci_mcasp snd_soc_ti_edma
> >> snd_soc_ti_sdm
> >> a bq27xxx_battery_hdq bq27xxx_battery snd_soc_tlv320aic3x extcon_palmas
> >> rtc_palm
> >> as palmas_pwrbutton snd_soc_core snd_pcm_dmaengine omap_rng snd_pcm
> >> rng_core snd
> >> _timer omap_hdq snd at24 soundcore tmp102 wire cn rtc_ds1307 hwmon
> >> omap_des cryp
> >> to_engine omap_crypto autofs4
> >>
> >> [   11.552884] CPU: 0 PID: 979 Comm: cryptomgr_test Not tainted
> >> 5.4.0-rc2-00014-
> >> g6f57ec1e433d-dirty #334
> >>
> >> [   11.562138] Hardware name: Generic DRA74X (Flattened Device Tree)
> >>
> >> [   11.568259] PC is at __crypto_xor+0x20/0xa0
> >> [   11.572454] LR is at 0x10
> >>
> >> [   11.575080] pc : [<c0494a10>]    lr : [<00000010>]    psr: 20010113
> >>
> >> [   11.581369] sp : eb5f9a3c  ip : 676e6953  fp : eb5f9cec
> >>
> >> [   11.586611] r10: c0e05148  r9 : eb4a4e80  r8 : 00000010
> >>
> >> [   11.591853] r7 : 00000003  r6 : eb2e6000  r5 : fffffffc  r4 :
> >> eb2e6000
> >> [   11.598403] r3 : 00000010  r2 : 00000000  r1 : eb2e6000  r0 :
> >> eb2e6000
> >> [   11.604955] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM
> >> Segment none
> >> [   11.612115] Control: 10c5387d  Table: abd0806a  DAC: 00000051
> >>
> >> [   11.617883] Process cryptomgr_test (pid: 979, stack limit =
> >> 0x99cee04c)
> >> [   11.624521] Stack: (0xeb5f9a3c to 0xeb5fa000)
> >>
> >> [   11.628891] 9a20:
> >>
> >>       00000010
> >>
> >> [   11.637101] 9a40: eb2e6000 eb2e6000 00000003 c04a45f8 edc12858
> >> eb2e6000 edc12
> >> 858 eb2e6000
> >>
> >> [   11.645310] 9a60: eb057020 00000000 00000010 eb057020 00000000
> >> 00000010 00000
> >> 000 00000000
> >>
> >> [   11.653519] 9a80: 00000000 00000000 00000000 00000000 00000010
> >> 00000000 00000
> >> 010 00000010
> >>
> >> [   11.661729] 9aa0: 00000000 09865966 eb5f9b00 eb22c400 c0e05148
> >> 00000003 00000
> >> 400 00000000
> >>
> >> [   11.669938] 9ac0: 00000400 bf18c4c0 00000000 00000000 00000000
> >> 00000000 00000
> >> 0b3 00000000
> >>
> >> [   11.678147] 9ae0: 00000000 00000001 00000001 00000001 00000000
> >> 00000000 00000
> >> 000 09865966
> >> [   11.686356] 9b00: 00000010 00000000 eb057020 eb057020 eb379800
> >> eb379940 00000
> >> 000 00000000
> >>
> >> [   11.694566] 9b20: eb4a4e80 00000400 0000084c 00000000 00000002
> >> 00000001 00000
> >> 000 00000001
> >>
> >> [   11.702774] 9b40: 00000000 c016e38c 00000129 00000000 00000000
> >> 00000001 00000
> >> 001 00000001
> >>
> >> [   11.710983] 9b60: eb379940 a8a2cc6a 00000002 09865966 c0a04b3c
> >> efd86300 eb245
> >> 7c0 efd862c0
> >>
> >> [   11.719193] 9b80: eb245900 a8d4a57d 00000002 00000000 eb5f9cf4
> >> c016ef74 00000
> >> 000 efd86300
> >>
> >> [   11.727402] 9ba0: 00000000 00000001 00000000 00000001 00000000
> >> c016e38c eb379
> >> 80c 09865966
> >>
> >> [   11.735611] 9bc0: efd86300 efd86300 eb21f240 efd862c0 eb21f380
> >> 00000000 eb5f9
> >> d20 eb2e6010
> >>
> >> [   11.743819] 9be0: c0e05148 eb2e6000 00000010 c04dfdd4 00000000
> >> 00000001 c08fb
> >> 4b8 00000000
> >>
> >> [   11.752028] 9c00: 00000020 00000020 eb2e6000 eb057000 c0e05148
> >> eb0570c0 00000
> >> 001 c049e5f8
> >>
> >> [   11.760237] 9c20: eb057000 00000000 00000000 00000010 00000000
> >> c0a2eca8 00000
> >> 010 efd862c0
> >>
> >> [   11.768446] 9c40: 2eff5000 eb21f1c0 eb245740 c0e0554c eb5f9c94
> >> ebe5c040 efd86
> >> 2c0 ebe5c000
> >>
> >> [   11.776656] 9c60: eb4a4e40 ebf65c80 c0a30694 00000000 00000000
> >> 09865966 c0a2e
> >> c9c 00000010
> >> [   11.784865] 9c80: c0a2ec9c eb057000 c0e05148 c0a2eca8 00000000
> >> 00000010 eb5f9
> >> cac c049e6fc
> >>
> >> [   11.793073] 9ca0: eb5f9cac 00000000 00000000 00000009 00000000
> >> 00000000 eb5f9
> >> d28 00000000
> >>
> >> [   11.801282] 9cc0: bf18f880 09865966 00000000 09865966 eb22c400
> >> eb057000 eb22c
> >> 400 c0a498f8
> >>
> >> [   11.809492] 9ce0: 00000000 eb5f9d28 c0a2ec9c c049f850 00000010
> >> eb5f9d20 00000
> >> 001 7fffffff
> >>
> >> [   11.817702] 9d00: 00000001 00000000 eb07e200 eb5f9e64 c0b7dc78
> >> eb20ccc0 00000
> >> 000 00000000
> >>
> >> [   11.825910] 9d20: c0b80cf4 00000010 00000000 00000000 eb5f9d30
> >> eb5f9d30 00000
> >> 000 00000001
> >>
> >> [   11.834119] 9d40: c0e05148 09865966 eb49e004 00000000 00000001
> >> 00000001 00000
> >> cc0 eb057168
> >>
> >> [   11.842328] 9d60: eb20cd00 eb07e280 00000001 c02963a4 00000000
> >> 0000000a 00000
> >> 000 00000000
> >>
> >> [   11.850536] 9d80: ffffffff 00000000 00000000 ffffffff 00000000
> >> eb1f2800 00000
> >> dc0 00000c30
> >>
> >> [   11.858746] 9da0: c0e763bc edc172e0 c0a2d3dc c015d2a4 00000cc0
> >> 09865966 ec800
> >> 180 eb5f9e64
> >>
> >> [   11.866954] 9dc0: c0b685b2 eb5f9e44 ffffffff c0b685b2 00000002
> >> eb5f9df4 c0aab
> >> 698 c08f6464
> >>
> >> [   11.875163] 9de0: ffffff0f ffff0a00 14a0619b eb5f9e64 bf18f8a8
> >> ffffff0f ffff0
> >> a00 09865966
> >> [   11.883373] 9e00: c0eac400 c0e05148 c0a498f8 eb07e200 eb07e200
> >> 00000001 eb22c
> >> 400 09865966
> >>
> >> [   11.891582] 9e20: c0a2d74c c0a2ec9c c0a498f8 c0a2f620 eb07e200
> >> 00000001 eb22c
> >> 400 eb057000
> >>
> >> [   11.899790] 9e40: c0a2d74c c049fef0 c0a2ec9c eb22c400 eb057000
> >> eb057180 00000
> >> 000 00000000
> >>
> >> [   11.907998] 9e60: eb057168 eb200030 eb07e280 c049d63c eb057000
> >> 09865966 eb07e
> >> 200 eb20ccc0
> >>
> >> [   11.916208] 9e80: eb22c400 eb07e200 eb057000 c0a2d74c eb20cd00
> >> eb07e280 c0a2d
> >> 3dc c04a1eb8
> >>
> >> [   11.924418] 9ea0: eb057000 00000000 c04a1e38 0000001b 00001185
> >> ffffffff c0e05
> >> 148 eb07e200
> >>
> >> [   11.932626] 9ec0: eb07e280 c049dff0 ecb29100 00000400 efd862c0
> >> ecb29080 c0e09
> >> ebc ffffffff
> >>
> >> [   11.940835] 9ee0: c08fb4b8 00000102 eb0c6018 efd862c0 ecb29080
> >> eb245740 ebca5
> >> 000 00000001
> >>
> >> [   11.949043] 9f00: 00000002 eb0c7b64 eb5f9f6c c08fb4b8 00000000
> >> eb0c7b60 00000
> >> 001 eb0c7b6c
> >>
> >> [   11.957251] 9f20: 00000000 2eff5000 c0a04adc c08fba14 eb245b90
> >> efd862c0 00000
> >> 000 00000000
> >> [   11.965460] 9f40: 00000000 09865966 eb0c7b64 eb245740 eb5f8000
> >> 09865966 ffffe
> >> 000 eb07e200
> >>
> >> [   11.973668] 9f60: 00000000 eb3f8b80 eb5f8000 eb07e200 c049d144
> >> eb0c7b64 eb22e
> >> 29c c049d184
> >>
> >> [   11.981877] 9f80: eb22e280 c015c708 00000001 eb3f8b80 c015c5fc
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   11.990086] 9fa0: 00000000 00000000 00000000 c01010e8 00000000
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   11.998294] 9fc0: 00000000 00000000 00000000 00000000 00000000
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   12.006502] 9fe0: 00000000 00000000 00000000 00000000 00000013
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   12.014721] [<c0494a10>] (__crypto_xor) from [<c04a45f8>]
> >> (crypto_cbc_encrypt
> >> +0xf4/0x13c)
> >>
> >> [   12.022945] [<c04a45f8>] (crypto_cbc_encrypt) from [<bf18c4c0>]
> >> (omap_aes_cry
> >> pt+0xc8/0x114 [omap_aes_driver])
> >>
> >> [   12.032924] [<bf18c4c0>] (omap_aes_crypt [omap_aes_driver]) from
> >> [<c049f850>]
> >>    (test_skcipher_vec_cfg+0x1c8/0x7e4)
> >>
> >> [   12.043228] [<c049f850>] (test_skcipher_vec_cfg) from [<c049fef0>]
> >> (test_skci
> >> pher+0x84/0xf0)
> >> [   12.051701] [<c049fef0>] (test_skcipher) from [<c04a1eb8>]
> >> (alg_test_skcipher
> >> +0x80/0x140)
> >>
> >> [   12.059912] [<c04a1eb8>] (alg_test_skcipher) from [<c049dff0>]
> >> (alg_test.part
> >> .8+0x8c/0x3a0)
> >>
> >> [   12.068297] [<c049dff0>] (alg_test.part.8) from [<c049d184>]
> >> (cryptomgr_test+
> >> 0x40/0x48)
> >>
> >> [   12.076336] [<c049d184>] (cryptomgr_test) from [<c015c708>]
> >> (kthread+0x10c/0x
> >> 148)
> >>
> >> [   12.083853] [<c015c708>] (kthread) from [<c01010e8>]
> >> (ret_from_fork+0x14/0x2c
> >> )
> >>
> >> [   12.091100] Exception stack(0xeb5f9fb0 to 0xeb5f9ff8)
> >>
> >> [   12.096169] 9fa0:                                     00000000
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   12.104378] 9fc0: 00000000 00000000 00000000 00000000 00000000
> >> 00000000 00000
> >> 000 00000000
> >>
> >> [   12.112593] 9fe0: 00000000 00000000 00000000 00000000 00000013
> >> 00000000
> >> [   12.119240] Code: e2425004 e1a0e003 e1a04000 e5b6c004 (e5b57004)
> >>
> >> [   12.125437] ---[ end trace 9b4a71e796035151 ]---
> >> --
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Tero Kristo Oct. 17, 2019, 12:07 p.m. UTC | #6
On 17/10/2019 14:56, Ard Biesheuvel wrote:
> On Thu, 17 Oct 2019 at 13:25, Tero Kristo <t-kristo@ti.com> wrote:
>>
>> On 17/10/2019 13:45, Ard Biesheuvel wrote:
>>> On Thu, 17 Oct 2019 at 12:25, Tero Kristo <t-kristo@ti.com> wrote:
>>>>
>>>> On 15/10/2019 20:28, Tony Lindgren wrote:
>>>>> * Ard Biesheuvel <ard.biesheuvel@linaro.org> [191014 12:20]:
>>>>>> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
>>>>>> dated 20 august 2015 introduced the new skcipher API which is supposed to
>>>>>> replace both blkcipher and ablkcipher. While all consumers of the API have
>>>>>> been converted long ago, some producers of the ablkcipher remain, forcing
>>>>>> us to keep the ablkcipher support routines alive, along with the matching
>>>>>> code to expose [a]blkciphers via the skcipher API.
>>>>>>
>>>>>> So switch this driver to the skcipher API, allowing us to finally drop the
>>>>>> blkcipher code in the near future.
>>>>>
>>>>> Adding Tero to loop as I think he was the last one to update this code.
>>>>
>>>> With this patch, I am seeing the SW fallback fail with the following
>>>> crash. Any ideas why this happens? This on top of 5.4-rc2, I did not
>>>> pick any other crypto patches from the lists, but have couple of local
>>>> fixes to get AES working properly with latest changes to testmgr. Am I
>>>> missing something?
>>>>
>>>
>>> Thanks Tero.
>>>
>>> It looks like the fallback ends up invoking __crypto_xor() with a
>>> value of NULL for the IV.
>>>
>>> This should fix the issue, I think.
>>
>> Thats right, it fixes it. There is another skcipher missing the ivsize
>> within omap-aes.c it seems.
>>
> 
> I take it you are referring to ecb(aes)? That one actually has a
> ivsize of 0, so that one is correct.

Oh yeah, you are right.

> 
>> Do you want to send a patch out for both or shall I send a patch with
>> you as suggested by?
>>
> 
> I'll fold the cbc fix into my series, thanks.

Ok, that works for me.

> 
>> I have some 10 omap crypto related patches on their way.
>>
> 
> Would I be able to test those on a BeagleBone white? In any case,
> please cc me so I can have a look as well.

Yeah, I can CC you there, you can use beaglebone to test them. It has 
the crypto accelerators available.

-Tero

> 
> Thanks,
> Ard.
> 
> 
>>>
>>> diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
>>> index 329fddbe8a39..a1fc03ed01f3 100644
>>> --- a/drivers/crypto/omap-aes.c
>>> +++ b/drivers/crypto/omap-aes.c
>>> @@ -715,6 +715,7 @@ static struct skcipher_alg algs_ecb_cbc[] = {
>>>
>>>           .min_keysize            = AES_MIN_KEY_SIZE,
>>>           .max_keysize            = AES_MAX_KEY_SIZE,
>>> +       .ivsize                 = AES_BLOCK_SIZE,
>>>           .setkey                 = omap_aes_setkey,
>>>           .encrypt                = omap_aes_cbc_encrypt,
>>>           .decrypt                = omap_aes_cbc_decrypt,
>>>
>>>
>>> Thanks,
>>> Ard.
>>>
>>>> -Tero
>>>>
>>>>
>>>> [   11.458071] 8<--- cut here ---
>>>>
>>>> [   11.461205] Unable to handle kernel NULL pointer dereference at
>>>> virtual addre
>>>> ss 00000000
>>>>
>>>> [   11.469352] pgd = e8df20f8
>>>>
>>>> [   11.472083] [00000000] *pgd=00000000
>>>>
>>>> [   11.475691] Internal error: Oops: 5 [#1] SMP ARM
>>>>
>>>> [   11.480325] Modules linked in: syscopyarea cfbimgblt sysfillrect
>>>> sysimgblt fb
>>>> _sys_fops cfbcopyarea sha512_arm(+) dwc3 ecb udc_core usb_common evdev
>>>> aes_arm a
>>>> es_generic snd_soc_simple_card snd_soc_simple_card_utils
>>>> encoder_tpd12s015 leds_
>>>> gpio led_class aes_arm_bs gpio_fan crypto_simd omapdss connector_hdmi
>>>> omapdss_ba
>>>> se cpufreq_dt cryptd drm omap_wdt watchdog drm_panel_orientation_quirks
>>>> cec omap
>>>> _aes_driver(+) omap_sham(+) phy_omap_usb2 dwc3_omap omap_mailbox
>>>> rtc_omap blueto
>>>> oth ecdh_generic ecc libaes snd_soc_davinci_mcasp snd_soc_ti_edma
>>>> snd_soc_ti_sdm
>>>> a bq27xxx_battery_hdq bq27xxx_battery snd_soc_tlv320aic3x extcon_palmas
>>>> rtc_palm
>>>> as palmas_pwrbutton snd_soc_core snd_pcm_dmaengine omap_rng snd_pcm
>>>> rng_core snd
>>>> _timer omap_hdq snd at24 soundcore tmp102 wire cn rtc_ds1307 hwmon
>>>> omap_des cryp
>>>> to_engine omap_crypto autofs4
>>>>
>>>> [   11.552884] CPU: 0 PID: 979 Comm: cryptomgr_test Not tainted
>>>> 5.4.0-rc2-00014-
>>>> g6f57ec1e433d-dirty #334
>>>>
>>>> [   11.562138] Hardware name: Generic DRA74X (Flattened Device Tree)
>>>>
>>>> [   11.568259] PC is at __crypto_xor+0x20/0xa0
>>>> [   11.572454] LR is at 0x10
>>>>
>>>> [   11.575080] pc : [<c0494a10>]    lr : [<00000010>]    psr: 20010113
>>>>
>>>> [   11.581369] sp : eb5f9a3c  ip : 676e6953  fp : eb5f9cec
>>>>
>>>> [   11.586611] r10: c0e05148  r9 : eb4a4e80  r8 : 00000010
>>>>
>>>> [   11.591853] r7 : 00000003  r6 : eb2e6000  r5 : fffffffc  r4 :
>>>> eb2e6000
>>>> [   11.598403] r3 : 00000010  r2 : 00000000  r1 : eb2e6000  r0 :
>>>> eb2e6000
>>>> [   11.604955] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM
>>>> Segment none
>>>> [   11.612115] Control: 10c5387d  Table: abd0806a  DAC: 00000051
>>>>
>>>> [   11.617883] Process cryptomgr_test (pid: 979, stack limit =
>>>> 0x99cee04c)
>>>> [   11.624521] Stack: (0xeb5f9a3c to 0xeb5fa000)
>>>>
>>>> [   11.628891] 9a20:
>>>>
>>>>        00000010
>>>>
>>>> [   11.637101] 9a40: eb2e6000 eb2e6000 00000003 c04a45f8 edc12858
>>>> eb2e6000 edc12
>>>> 858 eb2e6000
>>>>
>>>> [   11.645310] 9a60: eb057020 00000000 00000010 eb057020 00000000
>>>> 00000010 00000
>>>> 000 00000000
>>>>
>>>> [   11.653519] 9a80: 00000000 00000000 00000000 00000000 00000010
>>>> 00000000 00000
>>>> 010 00000010
>>>>
>>>> [   11.661729] 9aa0: 00000000 09865966 eb5f9b00 eb22c400 c0e05148
>>>> 00000003 00000
>>>> 400 00000000
>>>>
>>>> [   11.669938] 9ac0: 00000400 bf18c4c0 00000000 00000000 00000000
>>>> 00000000 00000
>>>> 0b3 00000000
>>>>
>>>> [   11.678147] 9ae0: 00000000 00000001 00000001 00000001 00000000
>>>> 00000000 00000
>>>> 000 09865966
>>>> [   11.686356] 9b00: 00000010 00000000 eb057020 eb057020 eb379800
>>>> eb379940 00000
>>>> 000 00000000
>>>>
>>>> [   11.694566] 9b20: eb4a4e80 00000400 0000084c 00000000 00000002
>>>> 00000001 00000
>>>> 000 00000001
>>>>
>>>> [   11.702774] 9b40: 00000000 c016e38c 00000129 00000000 00000000
>>>> 00000001 00000
>>>> 001 00000001
>>>>
>>>> [   11.710983] 9b60: eb379940 a8a2cc6a 00000002 09865966 c0a04b3c
>>>> efd86300 eb245
>>>> 7c0 efd862c0
>>>>
>>>> [   11.719193] 9b80: eb245900 a8d4a57d 00000002 00000000 eb5f9cf4
>>>> c016ef74 00000
>>>> 000 efd86300
>>>>
>>>> [   11.727402] 9ba0: 00000000 00000001 00000000 00000001 00000000
>>>> c016e38c eb379
>>>> 80c 09865966
>>>>
>>>> [   11.735611] 9bc0: efd86300 efd86300 eb21f240 efd862c0 eb21f380
>>>> 00000000 eb5f9
>>>> d20 eb2e6010
>>>>
>>>> [   11.743819] 9be0: c0e05148 eb2e6000 00000010 c04dfdd4 00000000
>>>> 00000001 c08fb
>>>> 4b8 00000000
>>>>
>>>> [   11.752028] 9c00: 00000020 00000020 eb2e6000 eb057000 c0e05148
>>>> eb0570c0 00000
>>>> 001 c049e5f8
>>>>
>>>> [   11.760237] 9c20: eb057000 00000000 00000000 00000010 00000000
>>>> c0a2eca8 00000
>>>> 010 efd862c0
>>>>
>>>> [   11.768446] 9c40: 2eff5000 eb21f1c0 eb245740 c0e0554c eb5f9c94
>>>> ebe5c040 efd86
>>>> 2c0 ebe5c000
>>>>
>>>> [   11.776656] 9c60: eb4a4e40 ebf65c80 c0a30694 00000000 00000000
>>>> 09865966 c0a2e
>>>> c9c 00000010
>>>> [   11.784865] 9c80: c0a2ec9c eb057000 c0e05148 c0a2eca8 00000000
>>>> 00000010 eb5f9
>>>> cac c049e6fc
>>>>
>>>> [   11.793073] 9ca0: eb5f9cac 00000000 00000000 00000009 00000000
>>>> 00000000 eb5f9
>>>> d28 00000000
>>>>
>>>> [   11.801282] 9cc0: bf18f880 09865966 00000000 09865966 eb22c400
>>>> eb057000 eb22c
>>>> 400 c0a498f8
>>>>
>>>> [   11.809492] 9ce0: 00000000 eb5f9d28 c0a2ec9c c049f850 00000010
>>>> eb5f9d20 00000
>>>> 001 7fffffff
>>>>
>>>> [   11.817702] 9d00: 00000001 00000000 eb07e200 eb5f9e64 c0b7dc78
>>>> eb20ccc0 00000
>>>> 000 00000000
>>>>
>>>> [   11.825910] 9d20: c0b80cf4 00000010 00000000 00000000 eb5f9d30
>>>> eb5f9d30 00000
>>>> 000 00000001
>>>>
>>>> [   11.834119] 9d40: c0e05148 09865966 eb49e004 00000000 00000001
>>>> 00000001 00000
>>>> cc0 eb057168
>>>>
>>>> [   11.842328] 9d60: eb20cd00 eb07e280 00000001 c02963a4 00000000
>>>> 0000000a 00000
>>>> 000 00000000
>>>>
>>>> [   11.850536] 9d80: ffffffff 00000000 00000000 ffffffff 00000000
>>>> eb1f2800 00000
>>>> dc0 00000c30
>>>>
>>>> [   11.858746] 9da0: c0e763bc edc172e0 c0a2d3dc c015d2a4 00000cc0
>>>> 09865966 ec800
>>>> 180 eb5f9e64
>>>>
>>>> [   11.866954] 9dc0: c0b685b2 eb5f9e44 ffffffff c0b685b2 00000002
>>>> eb5f9df4 c0aab
>>>> 698 c08f6464
>>>>
>>>> [   11.875163] 9de0: ffffff0f ffff0a00 14a0619b eb5f9e64 bf18f8a8
>>>> ffffff0f ffff0
>>>> a00 09865966
>>>> [   11.883373] 9e00: c0eac400 c0e05148 c0a498f8 eb07e200 eb07e200
>>>> 00000001 eb22c
>>>> 400 09865966
>>>>
>>>> [   11.891582] 9e20: c0a2d74c c0a2ec9c c0a498f8 c0a2f620 eb07e200
>>>> 00000001 eb22c
>>>> 400 eb057000
>>>>
>>>> [   11.899790] 9e40: c0a2d74c c049fef0 c0a2ec9c eb22c400 eb057000
>>>> eb057180 00000
>>>> 000 00000000
>>>>
>>>> [   11.907998] 9e60: eb057168 eb200030 eb07e280 c049d63c eb057000
>>>> 09865966 eb07e
>>>> 200 eb20ccc0
>>>>
>>>> [   11.916208] 9e80: eb22c400 eb07e200 eb057000 c0a2d74c eb20cd00
>>>> eb07e280 c0a2d
>>>> 3dc c04a1eb8
>>>>
>>>> [   11.924418] 9ea0: eb057000 00000000 c04a1e38 0000001b 00001185
>>>> ffffffff c0e05
>>>> 148 eb07e200
>>>>
>>>> [   11.932626] 9ec0: eb07e280 c049dff0 ecb29100 00000400 efd862c0
>>>> ecb29080 c0e09
>>>> ebc ffffffff
>>>>
>>>> [   11.940835] 9ee0: c08fb4b8 00000102 eb0c6018 efd862c0 ecb29080
>>>> eb245740 ebca5
>>>> 000 00000001
>>>>
>>>> [   11.949043] 9f00: 00000002 eb0c7b64 eb5f9f6c c08fb4b8 00000000
>>>> eb0c7b60 00000
>>>> 001 eb0c7b6c
>>>>
>>>> [   11.957251] 9f20: 00000000 2eff5000 c0a04adc c08fba14 eb245b90
>>>> efd862c0 00000
>>>> 000 00000000
>>>> [   11.965460] 9f40: 00000000 09865966 eb0c7b64 eb245740 eb5f8000
>>>> 09865966 ffffe
>>>> 000 eb07e200
>>>>
>>>> [   11.973668] 9f60: 00000000 eb3f8b80 eb5f8000 eb07e200 c049d144
>>>> eb0c7b64 eb22e
>>>> 29c c049d184
>>>>
>>>> [   11.981877] 9f80: eb22e280 c015c708 00000001 eb3f8b80 c015c5fc
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   11.990086] 9fa0: 00000000 00000000 00000000 c01010e8 00000000
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   11.998294] 9fc0: 00000000 00000000 00000000 00000000 00000000
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   12.006502] 9fe0: 00000000 00000000 00000000 00000000 00000013
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   12.014721] [<c0494a10>] (__crypto_xor) from [<c04a45f8>]
>>>> (crypto_cbc_encrypt
>>>> +0xf4/0x13c)
>>>>
>>>> [   12.022945] [<c04a45f8>] (crypto_cbc_encrypt) from [<bf18c4c0>]
>>>> (omap_aes_cry
>>>> pt+0xc8/0x114 [omap_aes_driver])
>>>>
>>>> [   12.032924] [<bf18c4c0>] (omap_aes_crypt [omap_aes_driver]) from
>>>> [<c049f850>]
>>>>     (test_skcipher_vec_cfg+0x1c8/0x7e4)
>>>>
>>>> [   12.043228] [<c049f850>] (test_skcipher_vec_cfg) from [<c049fef0>]
>>>> (test_skci
>>>> pher+0x84/0xf0)
>>>> [   12.051701] [<c049fef0>] (test_skcipher) from [<c04a1eb8>]
>>>> (alg_test_skcipher
>>>> +0x80/0x140)
>>>>
>>>> [   12.059912] [<c04a1eb8>] (alg_test_skcipher) from [<c049dff0>]
>>>> (alg_test.part
>>>> .8+0x8c/0x3a0)
>>>>
>>>> [   12.068297] [<c049dff0>] (alg_test.part.8) from [<c049d184>]
>>>> (cryptomgr_test+
>>>> 0x40/0x48)
>>>>
>>>> [   12.076336] [<c049d184>] (cryptomgr_test) from [<c015c708>]
>>>> (kthread+0x10c/0x
>>>> 148)
>>>>
>>>> [   12.083853] [<c015c708>] (kthread) from [<c01010e8>]
>>>> (ret_from_fork+0x14/0x2c
>>>> )
>>>>
>>>> [   12.091100] Exception stack(0xeb5f9fb0 to 0xeb5f9ff8)
>>>>
>>>> [   12.096169] 9fa0:                                     00000000
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   12.104378] 9fc0: 00000000 00000000 00000000 00000000 00000000
>>>> 00000000 00000
>>>> 000 00000000
>>>>
>>>> [   12.112593] 9fe0: 00000000 00000000 00000000 00000000 00000013
>>>> 00000000
>>>> [   12.119240] Code: e2425004 e1a0e003 e1a04000 e5b6c004 (e5b57004)
>>>>
>>>> [   12.125437] ---[ end trace 9b4a71e796035151 ]---
>>>> --
>>
>> --

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Patch
diff mbox series

diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 2f53fbb74100..329fddbe8a39 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -142,8 +142,8 @@  int omap_aes_write_ctrl(struct omap_aes_dev *dd)
 			__le32_to_cpu(dd->ctx->key[i]));
 	}
 
-	if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->info)
-		omap_aes_write_n(dd, AES_REG_IV(dd, 0), dd->req->info, 4);
+	if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->iv)
+		omap_aes_write_n(dd, AES_REG_IV(dd, 0), (void *)dd->req->iv, 4);
 
 	if ((dd->flags & (FLAGS_GCM)) && dd->aead_req->iv) {
 		rctx = aead_request_ctx(dd->aead_req);
@@ -382,11 +382,11 @@  int omap_aes_crypt_dma_start(struct omap_aes_dev *dd)
 
 static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
 {
-	struct ablkcipher_request *req = dd->req;
+	struct skcipher_request *req = dd->req;
 
 	pr_debug("err: %d\n", err);
 
-	crypto_finalize_ablkcipher_request(dd->engine, req, err);
+	crypto_finalize_skcipher_request(dd->engine, req, err);
 
 	pm_runtime_mark_last_busy(dd->dev);
 	pm_runtime_put_autosuspend(dd->dev);
@@ -403,10 +403,10 @@  int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
 }
 
 static int omap_aes_handle_queue(struct omap_aes_dev *dd,
-				 struct ablkcipher_request *req)
+				 struct skcipher_request *req)
 {
 	if (req)
-		return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
+		return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
 
 	return 0;
 }
@@ -414,10 +414,10 @@  static int omap_aes_handle_queue(struct omap_aes_dev *dd,
 static int omap_aes_prepare_req(struct crypto_engine *engine,
 				void *areq)
 {
-	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
-	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
-			crypto_ablkcipher_reqtfm(req));
-	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
+	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
+	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
+			crypto_skcipher_reqtfm(req));
+	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
 	struct omap_aes_dev *dd = rctx->dd;
 	int ret;
 	u16 flags;
@@ -427,8 +427,8 @@  static int omap_aes_prepare_req(struct crypto_engine *engine,
 
 	/* assign new request to device */
 	dd->req = req;
-	dd->total = req->nbytes;
-	dd->total_save = req->nbytes;
+	dd->total = req->cryptlen;
+	dd->total_save = req->cryptlen;
 	dd->in_sg = req->src;
 	dd->out_sg = req->dst;
 	dd->orig_out = req->dst;
@@ -469,8 +469,8 @@  static int omap_aes_prepare_req(struct crypto_engine *engine,
 static int omap_aes_crypt_req(struct crypto_engine *engine,
 			      void *areq)
 {
-	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
-	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
+	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
+	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
 	struct omap_aes_dev *dd = rctx->dd;
 
 	if (!dd)
@@ -505,26 +505,26 @@  static void omap_aes_done_task(unsigned long data)
 	pr_debug("exit\n");
 }
 
-static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
+static int omap_aes_crypt(struct skcipher_request *req, unsigned long mode)
 {
-	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
-			crypto_ablkcipher_reqtfm(req));
-	struct omap_aes_reqctx *rctx = ablkcipher_request_ctx(req);
+	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(
+			crypto_skcipher_reqtfm(req));
+	struct omap_aes_reqctx *rctx = skcipher_request_ctx(req);
 	struct omap_aes_dev *dd;
 	int ret;
 
-	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
+	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
 		  !!(mode & FLAGS_ENCRYPT),
 		  !!(mode & FLAGS_CBC));
 
-	if (req->nbytes < aes_fallback_sz) {
+	if (req->cryptlen < aes_fallback_sz) {
 		SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
 
 		skcipher_request_set_sync_tfm(subreq, ctx->fallback);
 		skcipher_request_set_callback(subreq, req->base.flags, NULL,
 					      NULL);
 		skcipher_request_set_crypt(subreq, req->src, req->dst,
-					   req->nbytes, req->info);
+					   req->cryptlen, req->iv);
 
 		if (mode & FLAGS_ENCRYPT)
 			ret = crypto_skcipher_encrypt(subreq);
@@ -545,10 +545,10 @@  static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
 
 /* ********************** ALG API ************************************ */
 
-static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
+static int omap_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
 			   unsigned int keylen)
 {
-	struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
 	int ret;
 
 	if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
@@ -571,32 +571,32 @@  static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
 	return 0;
 }
 
-static int omap_aes_ecb_encrypt(struct ablkcipher_request *req)
+static int omap_aes_ecb_encrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, FLAGS_ENCRYPT);
 }
 
-static int omap_aes_ecb_decrypt(struct ablkcipher_request *req)
+static int omap_aes_ecb_decrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, 0);
 }
 
-static int omap_aes_cbc_encrypt(struct ablkcipher_request *req)
+static int omap_aes_cbc_encrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
 }
 
-static int omap_aes_cbc_decrypt(struct ablkcipher_request *req)
+static int omap_aes_cbc_decrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, FLAGS_CBC);
 }
 
-static int omap_aes_ctr_encrypt(struct ablkcipher_request *req)
+static int omap_aes_ctr_encrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CTR);
 }
 
-static int omap_aes_ctr_decrypt(struct ablkcipher_request *req)
+static int omap_aes_ctr_decrypt(struct skcipher_request *req)
 {
 	return omap_aes_crypt(req, FLAGS_CTR);
 }
@@ -606,10 +606,10 @@  static int omap_aes_prepare_req(struct crypto_engine *engine,
 static int omap_aes_crypt_req(struct crypto_engine *engine,
 			      void *req);
 
-static int omap_aes_cra_init(struct crypto_tfm *tfm)
+static int omap_aes_init_tfm(struct crypto_skcipher *tfm)
 {
-	const char *name = crypto_tfm_alg_name(tfm);
-	struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+	const char *name = crypto_tfm_alg_name(&tfm->base);
+	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
 	struct crypto_sync_skcipher *blk;
 
 	blk = crypto_alloc_sync_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK);
@@ -618,7 +618,7 @@  static int omap_aes_cra_init(struct crypto_tfm *tfm)
 
 	ctx->fallback = blk;
 
-	tfm->crt_ablkcipher.reqsize = sizeof(struct omap_aes_reqctx);
+	crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx));
 
 	ctx->enginectx.op.prepare_request = omap_aes_prepare_req;
 	ctx->enginectx.op.unprepare_request = NULL;
@@ -657,9 +657,9 @@  static int omap_aes_gcm_cra_init(struct crypto_aead *tfm)
 	return 0;
 }
 
-static void omap_aes_cra_exit(struct crypto_tfm *tfm)
+static void omap_aes_exit_tfm(struct crypto_skcipher *tfm)
 {
-	struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+	struct omap_aes_ctx *ctx = crypto_skcipher_ctx(tfm);
 
 	if (ctx->fallback)
 		crypto_free_sync_skcipher(ctx->fallback);
@@ -671,7 +671,10 @@  static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm)
 {
 	struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm);
 
-	omap_aes_cra_exit(crypto_aead_tfm(tfm));
+	if (ctx->fallback)
+		crypto_free_sync_skcipher(ctx->fallback);
+
+	ctx->fallback = NULL;
 
 	if (ctx->ctr)
 		crypto_free_skcipher(ctx->ctr);
@@ -679,78 +682,68 @@  static void omap_aes_gcm_cra_exit(struct crypto_aead *tfm)
 
 /* ********************** ALGS ************************************ */
 
-static struct crypto_alg algs_ecb_cbc[] = {
+static struct skcipher_alg algs_ecb_cbc[] = {
 {
-	.cra_name		= "ecb(aes)",
-	.cra_driver_name	= "ecb-aes-omap",
-	.cra_priority		= 300,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
-				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
-	.cra_blocksize		= AES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_aes_cra_init,
-	.cra_exit		= omap_aes_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= AES_MIN_KEY_SIZE,
-		.max_keysize	= AES_MAX_KEY_SIZE,
-		.setkey		= omap_aes_setkey,
-		.encrypt	= omap_aes_ecb_encrypt,
-		.decrypt	= omap_aes_ecb_decrypt,
-	}
+	.base.cra_name		= "ecb(aes)",
+	.base.cra_driver_name	= "ecb-aes-omap",
+	.base.cra_priority	= 300,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
+				  CRYPTO_ALG_ASYNC |
+				  CRYPTO_ALG_NEED_FALLBACK,
+	.base.cra_blocksize	= AES_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= AES_MIN_KEY_SIZE,
+	.max_keysize		= AES_MAX_KEY_SIZE,
+	.setkey			= omap_aes_setkey,
+	.encrypt		= omap_aes_ecb_encrypt,
+	.decrypt		= omap_aes_ecb_decrypt,
+	.init			= omap_aes_init_tfm,
+	.exit			= omap_aes_exit_tfm,
 },
 {
-	.cra_name		= "cbc(aes)",
-	.cra_driver_name	= "cbc-aes-omap",
-	.cra_priority		= 300,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
-				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
-	.cra_blocksize		= AES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_aes_cra_init,
-	.cra_exit		= omap_aes_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= AES_MIN_KEY_SIZE,
-		.max_keysize	= AES_MAX_KEY_SIZE,
-		.ivsize		= AES_BLOCK_SIZE,
-		.setkey		= omap_aes_setkey,
-		.encrypt	= omap_aes_cbc_encrypt,
-		.decrypt	= omap_aes_cbc_decrypt,
-	}
+	.base.cra_name		= "cbc(aes)",
+	.base.cra_driver_name	= "cbc-aes-omap",
+	.base.cra_priority	= 300,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
+				  CRYPTO_ALG_ASYNC |
+				  CRYPTO_ALG_NEED_FALLBACK,
+	.base.cra_blocksize	= AES_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= AES_MIN_KEY_SIZE,
+	.max_keysize		= AES_MAX_KEY_SIZE,
+	.setkey			= omap_aes_setkey,
+	.encrypt		= omap_aes_cbc_encrypt,
+	.decrypt		= omap_aes_cbc_decrypt,
+	.init			= omap_aes_init_tfm,
+	.exit			= omap_aes_exit_tfm,
 }
 };
 
-static struct crypto_alg algs_ctr[] = {
+static struct skcipher_alg algs_ctr[] = {
 {
-	.cra_name		= "ctr(aes)",
-	.cra_driver_name	= "ctr-aes-omap",
-	.cra_priority		= 300,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
-				  CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
-	.cra_blocksize		= AES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_aes_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_aes_cra_init,
-	.cra_exit		= omap_aes_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= AES_MIN_KEY_SIZE,
-		.max_keysize	= AES_MAX_KEY_SIZE,
-		.ivsize		= AES_BLOCK_SIZE,
-		.setkey		= omap_aes_setkey,
-		.encrypt	= omap_aes_ctr_encrypt,
-		.decrypt	= omap_aes_ctr_decrypt,
-	}
-} ,
+	.base.cra_name		= "ctr(aes)",
+	.base.cra_driver_name	= "ctr-aes-omap",
+	.base.cra_priority	= 300,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
+				  CRYPTO_ALG_ASYNC |
+				  CRYPTO_ALG_NEED_FALLBACK,
+	.base.cra_blocksize	= AES_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_aes_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= AES_MIN_KEY_SIZE,
+	.max_keysize		= AES_MAX_KEY_SIZE,
+	.ivsize			= AES_BLOCK_SIZE,
+	.setkey			= omap_aes_setkey,
+	.encrypt		= omap_aes_ctr_encrypt,
+	.decrypt		= omap_aes_ctr_decrypt,
+	.init			= omap_aes_init_tfm,
+	.exit			= omap_aes_exit_tfm,
+}
 };
 
 static struct omap_aes_algs_info omap_aes_algs_info_ecb_cbc[] = {
@@ -1121,7 +1114,7 @@  static int omap_aes_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct omap_aes_dev *dd;
-	struct crypto_alg *algp;
+	struct skcipher_alg *algp;
 	struct aead_alg *aalg;
 	struct resource res;
 	int err = -ENOMEM, i, j, irq = -1;
@@ -1215,9 +1208,9 @@  static int omap_aes_probe(struct platform_device *pdev)
 			for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
 				algp = &dd->pdata->algs_info[i].algs_list[j];
 
-				pr_debug("reg alg: %s\n", algp->cra_name);
+				pr_debug("reg alg: %s\n", algp->base.cra_name);
 
-				err = crypto_register_alg(algp);
+				err = crypto_register_skcipher(algp);
 				if (err)
 					goto err_algs;
 
@@ -1230,9 +1223,8 @@  static int omap_aes_probe(struct platform_device *pdev)
 	    !dd->pdata->aead_algs_info->registered) {
 		for (i = 0; i < dd->pdata->aead_algs_info->size; i++) {
 			aalg = &dd->pdata->aead_algs_info->algs_list[i];
-			algp = &aalg->base;
 
-			pr_debug("reg alg: %s\n", algp->cra_name);
+			pr_debug("reg alg: %s\n", aalg->base.cra_name);
 
 			err = crypto_register_aead(aalg);
 			if (err)
@@ -1257,7 +1249,7 @@  static int omap_aes_probe(struct platform_device *pdev)
 err_algs:
 	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
 		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
-			crypto_unregister_alg(
+			crypto_unregister_skcipher(
 					&dd->pdata->algs_info[i].algs_list[j]);
 
 err_engine:
@@ -1290,7 +1282,7 @@  static int omap_aes_remove(struct platform_device *pdev)
 
 	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
 		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
-			crypto_unregister_alg(
+			crypto_unregister_skcipher(
 					&dd->pdata->algs_info[i].algs_list[j]);
 
 	for (i = dd->pdata->aead_algs_info->size - 1; i >= 0; i--) {
diff --git a/drivers/crypto/omap-aes.h b/drivers/crypto/omap-aes.h
index 2d4b1f87a1c9..2d3575231e31 100644
--- a/drivers/crypto/omap-aes.h
+++ b/drivers/crypto/omap-aes.h
@@ -112,7 +112,7 @@  struct omap_aes_reqctx {
 #define OMAP_AES_CACHE_SIZE	0
 
 struct omap_aes_algs_info {
-	struct crypto_alg	*algs_list;
+	struct skcipher_alg	*algs_list;
 	unsigned int		size;
 	unsigned int		registered;
 };
@@ -162,7 +162,7 @@  struct omap_aes_dev {
 	struct aead_queue	aead_queue;
 	spinlock_t		lock;
 
-	struct ablkcipher_request	*req;
+	struct skcipher_request		*req;
 	struct aead_request		*aead_req;
 	struct crypto_engine		*engine;
 
diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
index b19d7e5d55ec..4c4dbc2b377e 100644
--- a/drivers/crypto/omap-des.c
+++ b/drivers/crypto/omap-des.c
@@ -34,6 +34,7 @@ 
 #include <linux/interrupt.h>
 #include <crypto/scatterwalk.h>
 #include <crypto/internal/des.h>
+#include <crypto/internal/skcipher.h>
 #include <crypto/algapi.h>
 #include <crypto/engine.h>
 
@@ -98,7 +99,7 @@  struct omap_des_reqctx {
 #define OMAP_DES_CACHE_SIZE	0
 
 struct omap_des_algs_info {
-	struct crypto_alg	*algs_list;
+	struct skcipher_alg	*algs_list;
 	unsigned int		size;
 	unsigned int		registered;
 };
@@ -139,7 +140,7 @@  struct omap_des_dev {
 
 	struct tasklet_struct	done_task;
 
-	struct ablkcipher_request	*req;
+	struct skcipher_request	*req;
 	struct crypto_engine		*engine;
 	/*
 	 * total is used by PIO mode for book keeping so introduce
@@ -261,8 +262,8 @@  static int omap_des_write_ctrl(struct omap_des_dev *dd)
 			       __le32_to_cpu(dd->ctx->key[i]));
 	}
 
-	if ((dd->flags & FLAGS_CBC) && dd->req->info)
-		omap_des_write_n(dd, DES_REG_IV(dd, 0), dd->req->info, 2);
+	if ((dd->flags & FLAGS_CBC) && dd->req->iv)
+		omap_des_write_n(dd, DES_REG_IV(dd, 0), (void *)dd->req->iv, 2);
 
 	if (dd->flags & FLAGS_CBC)
 		val |= DES_REG_CTRL_CBC;
@@ -456,8 +457,8 @@  static int omap_des_crypt_dma(struct crypto_tfm *tfm,
 
 static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
 {
-	struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
-					crypto_ablkcipher_reqtfm(dd->req));
+	struct crypto_tfm *tfm = crypto_skcipher_tfm(
+					crypto_skcipher_reqtfm(dd->req));
 	int err;
 
 	pr_debug("total: %d\n", dd->total);
@@ -491,11 +492,11 @@  static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
 
 static void omap_des_finish_req(struct omap_des_dev *dd, int err)
 {
-	struct ablkcipher_request *req = dd->req;
+	struct skcipher_request *req = dd->req;
 
 	pr_debug("err: %d\n", err);
 
-	crypto_finalize_ablkcipher_request(dd->engine, req, err);
+	crypto_finalize_skcipher_request(dd->engine, req, err);
 
 	pm_runtime_mark_last_busy(dd->dev);
 	pm_runtime_put_autosuspend(dd->dev);
@@ -514,10 +515,10 @@  static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
 }
 
 static int omap_des_handle_queue(struct omap_des_dev *dd,
-				 struct ablkcipher_request *req)
+				 struct skcipher_request *req)
 {
 	if (req)
-		return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
+		return crypto_transfer_skcipher_request_to_engine(dd->engine, req);
 
 	return 0;
 }
@@ -525,9 +526,9 @@  static int omap_des_handle_queue(struct omap_des_dev *dd,
 static int omap_des_prepare_req(struct crypto_engine *engine,
 				void *areq)
 {
-	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
-	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
-			crypto_ablkcipher_reqtfm(req));
+	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
+			crypto_skcipher_reqtfm(req));
 	struct omap_des_dev *dd = omap_des_find_dev(ctx);
 	struct omap_des_reqctx *rctx;
 	int ret;
@@ -538,8 +539,8 @@  static int omap_des_prepare_req(struct crypto_engine *engine,
 
 	/* assign new request to device */
 	dd->req = req;
-	dd->total = req->nbytes;
-	dd->total_save = req->nbytes;
+	dd->total = req->cryptlen;
+	dd->total_save = req->cryptlen;
 	dd->in_sg = req->src;
 	dd->out_sg = req->dst;
 	dd->orig_out = req->dst;
@@ -568,8 +569,8 @@  static int omap_des_prepare_req(struct crypto_engine *engine,
 	if (dd->out_sg_len < 0)
 		return dd->out_sg_len;
 
-	rctx = ablkcipher_request_ctx(req);
-	ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
+	rctx = skcipher_request_ctx(req);
+	ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
 	rctx->mode &= FLAGS_MODE_MASK;
 	dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
 
@@ -582,9 +583,9 @@  static int omap_des_prepare_req(struct crypto_engine *engine,
 static int omap_des_crypt_req(struct crypto_engine *engine,
 			      void *areq)
 {
-	struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
-	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
-			crypto_ablkcipher_reqtfm(req));
+	struct skcipher_request *req = container_of(areq, struct skcipher_request, base);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
+			crypto_skcipher_reqtfm(req));
 	struct omap_des_dev *dd = omap_des_find_dev(ctx);
 
 	if (!dd)
@@ -619,18 +620,18 @@  static void omap_des_done_task(unsigned long data)
 	pr_debug("exit\n");
 }
 
-static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
+static int omap_des_crypt(struct skcipher_request *req, unsigned long mode)
 {
-	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
-			crypto_ablkcipher_reqtfm(req));
-	struct omap_des_reqctx *rctx = ablkcipher_request_ctx(req);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(
+			crypto_skcipher_reqtfm(req));
+	struct omap_des_reqctx *rctx = skcipher_request_ctx(req);
 	struct omap_des_dev *dd;
 
-	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
+	pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->cryptlen,
 		 !!(mode & FLAGS_ENCRYPT),
 		 !!(mode & FLAGS_CBC));
 
-	if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
+	if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE)) {
 		pr_err("request size is not exact amount of DES blocks\n");
 		return -EINVAL;
 	}
@@ -646,15 +647,15 @@  static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
 
 /* ********************** ALG API ************************************ */
 
-static int omap_des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
+static int omap_des_setkey(struct crypto_skcipher *cipher, const u8 *key,
 			   unsigned int keylen)
 {
-	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
 	int err;
 
 	pr_debug("enter, keylen: %d\n", keylen);
 
-	err = verify_ablkcipher_des_key(cipher, key);
+	err = verify_skcipher_des_key(cipher, key);
 	if (err)
 		return err;
 
@@ -664,15 +665,15 @@  static int omap_des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
 	return 0;
 }
 
-static int omap_des3_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
+static int omap_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
 			    unsigned int keylen)
 {
-	struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(cipher);
 	int err;
 
 	pr_debug("enter, keylen: %d\n", keylen);
 
-	err = verify_ablkcipher_des3_key(cipher, key);
+	err = verify_skcipher_des3_key(cipher, key);
 	if (err)
 		return err;
 
@@ -682,22 +683,22 @@  static int omap_des3_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
 	return 0;
 }
 
-static int omap_des_ecb_encrypt(struct ablkcipher_request *req)
+static int omap_des_ecb_encrypt(struct skcipher_request *req)
 {
 	return omap_des_crypt(req, FLAGS_ENCRYPT);
 }
 
-static int omap_des_ecb_decrypt(struct ablkcipher_request *req)
+static int omap_des_ecb_decrypt(struct skcipher_request *req)
 {
 	return omap_des_crypt(req, 0);
 }
 
-static int omap_des_cbc_encrypt(struct ablkcipher_request *req)
+static int omap_des_cbc_encrypt(struct skcipher_request *req)
 {
 	return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
 }
 
-static int omap_des_cbc_decrypt(struct ablkcipher_request *req)
+static int omap_des_cbc_decrypt(struct skcipher_request *req)
 {
 	return omap_des_crypt(req, FLAGS_CBC);
 }
@@ -707,13 +708,13 @@  static int omap_des_prepare_req(struct crypto_engine *engine,
 static int omap_des_crypt_req(struct crypto_engine *engine,
 			      void *areq);
 
-static int omap_des_cra_init(struct crypto_tfm *tfm)
+static int omap_des_init_tfm(struct crypto_skcipher *tfm)
 {
-	struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
+	struct omap_des_ctx *ctx = crypto_skcipher_ctx(tfm);
 
 	pr_debug("enter\n");
 
-	tfm->crt_ablkcipher.reqsize = sizeof(struct omap_des_reqctx);
+	crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_des_reqctx));
 
 	ctx->enginectx.op.prepare_request = omap_des_prepare_req;
 	ctx->enginectx.op.unprepare_request = NULL;
@@ -722,103 +723,78 @@  static int omap_des_cra_init(struct crypto_tfm *tfm)
 	return 0;
 }
 
-static void omap_des_cra_exit(struct crypto_tfm *tfm)
-{
-	pr_debug("enter\n");
-}
-
 /* ********************** ALGS ************************************ */
 
-static struct crypto_alg algs_ecb_cbc[] = {
+static struct skcipher_alg algs_ecb_cbc[] = {
 {
-	.cra_name		= "ecb(des)",
-	.cra_driver_name	= "ecb-des-omap",
-	.cra_priority		= 100,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
+	.base.cra_name		= "ecb(des)",
+	.base.cra_driver_name	= "ecb-des-omap",
+	.base.cra_priority	= 100,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
 				  CRYPTO_ALG_ASYNC,
-	.cra_blocksize		= DES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_des_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_des_cra_init,
-	.cra_exit		= omap_des_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= DES_KEY_SIZE,
-		.max_keysize	= DES_KEY_SIZE,
-		.setkey		= omap_des_setkey,
-		.encrypt	= omap_des_ecb_encrypt,
-		.decrypt	= omap_des_ecb_decrypt,
-	}
+	.base.cra_blocksize	= DES_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= DES_KEY_SIZE,
+	.max_keysize		= DES_KEY_SIZE,
+	.setkey			= omap_des_setkey,
+	.encrypt		= omap_des_ecb_encrypt,
+	.decrypt		= omap_des_ecb_decrypt,
+	.init			= omap_des_init_tfm,
 },
 {
-	.cra_name		= "cbc(des)",
-	.cra_driver_name	= "cbc-des-omap",
-	.cra_priority		= 100,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
+	.base.cra_name		= "cbc(des)",
+	.base.cra_driver_name	= "cbc-des-omap",
+	.base.cra_priority	= 100,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
 				  CRYPTO_ALG_ASYNC,
-	.cra_blocksize		= DES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_des_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_des_cra_init,
-	.cra_exit		= omap_des_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= DES_KEY_SIZE,
-		.max_keysize	= DES_KEY_SIZE,
-		.ivsize		= DES_BLOCK_SIZE,
-		.setkey		= omap_des_setkey,
-		.encrypt	= omap_des_cbc_encrypt,
-		.decrypt	= omap_des_cbc_decrypt,
-	}
+	.base.cra_blocksize	= DES_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= DES_KEY_SIZE,
+	.max_keysize		= DES_KEY_SIZE,
+	.ivsize			= DES_BLOCK_SIZE,
+	.setkey			= omap_des_setkey,
+	.encrypt		= omap_des_cbc_encrypt,
+	.decrypt		= omap_des_cbc_decrypt,
+	.init			= omap_des_init_tfm,
 },
 {
-	.cra_name		= "ecb(des3_ede)",
-	.cra_driver_name	= "ecb-des3-omap",
-	.cra_priority		= 100,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
+	.base.cra_name		= "ecb(des3_ede)",
+	.base.cra_driver_name	= "ecb-des3-omap",
+	.base.cra_priority	= 100,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
 				  CRYPTO_ALG_ASYNC,
-	.cra_blocksize		= DES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_des_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_des_cra_init,
-	.cra_exit		= omap_des_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= 3*DES_KEY_SIZE,
-		.max_keysize	= 3*DES_KEY_SIZE,
-		.setkey		= omap_des3_setkey,
-		.encrypt	= omap_des_ecb_encrypt,
-		.decrypt	= omap_des_ecb_decrypt,
-	}
+	.base.cra_blocksize	= DES3_EDE_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= DES3_EDE_KEY_SIZE,
+	.max_keysize		= DES3_EDE_KEY_SIZE,
+	.setkey			= omap_des3_setkey,
+	.encrypt		= omap_des_ecb_encrypt,
+	.decrypt		= omap_des_ecb_decrypt,
+	.init			= omap_des_init_tfm,
 },
 {
-	.cra_name		= "cbc(des3_ede)",
-	.cra_driver_name	= "cbc-des3-omap",
-	.cra_priority		= 100,
-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
-				  CRYPTO_ALG_KERN_DRIVER_ONLY |
+	.base.cra_name		= "cbc(des3_ede)",
+	.base.cra_driver_name	= "cbc-des3-omap",
+	.base.cra_priority	= 100,
+	.base.cra_flags		= CRYPTO_ALG_KERN_DRIVER_ONLY |
 				  CRYPTO_ALG_ASYNC,
-	.cra_blocksize		= DES_BLOCK_SIZE,
-	.cra_ctxsize		= sizeof(struct omap_des_ctx),
-	.cra_alignmask		= 0,
-	.cra_type		= &crypto_ablkcipher_type,
-	.cra_module		= THIS_MODULE,
-	.cra_init		= omap_des_cra_init,
-	.cra_exit		= omap_des_cra_exit,
-	.cra_u.ablkcipher = {
-		.min_keysize	= 3*DES_KEY_SIZE,
-		.max_keysize	= 3*DES_KEY_SIZE,
-		.ivsize		= DES_BLOCK_SIZE,
-		.setkey		= omap_des3_setkey,
-		.encrypt	= omap_des_cbc_encrypt,
-		.decrypt	= omap_des_cbc_decrypt,
-	}
+	.base.cra_blocksize	= DES3_EDE_BLOCK_SIZE,
+	.base.cra_ctxsize	= sizeof(struct omap_des_ctx),
+	.base.cra_module	= THIS_MODULE,
+
+	.min_keysize		= DES3_EDE_KEY_SIZE,
+	.max_keysize		= DES3_EDE_KEY_SIZE,
+	.ivsize			= DES3_EDE_BLOCK_SIZE,
+	.setkey			= omap_des3_setkey,
+	.encrypt		= omap_des_cbc_encrypt,
+	.decrypt		= omap_des_cbc_decrypt,
+	.init			= omap_des_init_tfm,
 }
 };
 
@@ -976,7 +952,7 @@  static int omap_des_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct omap_des_dev *dd;
-	struct crypto_alg *algp;
+	struct skcipher_alg *algp;
 	struct resource *res;
 	int err = -ENOMEM, i, j, irq = -1;
 	u32 reg;
@@ -1071,9 +1047,9 @@  static int omap_des_probe(struct platform_device *pdev)
 		for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
 			algp = &dd->pdata->algs_info[i].algs_list[j];
 
-			pr_debug("reg alg: %s\n", algp->cra_name);
+			pr_debug("reg alg: %s\n", algp->base.cra_name);
 
-			err = crypto_register_alg(algp);
+			err = crypto_register_skcipher(algp);
 			if (err)
 				goto err_algs;
 
@@ -1086,7 +1062,7 @@  static int omap_des_probe(struct platform_device *pdev)
 err_algs:
 	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
 		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
-			crypto_unregister_alg(
+			crypto_unregister_skcipher(
 					&dd->pdata->algs_info[i].algs_list[j]);
 
 err_engine:
@@ -1119,7 +1095,7 @@  static int omap_des_remove(struct platform_device *pdev)
 
 	for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
 		for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
-			crypto_unregister_alg(
+			crypto_unregister_skcipher(
 					&dd->pdata->algs_info[i].algs_list[j]);
 
 	tasklet_kill(&dd->done_task);