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[09/11] drm/i915/tgl: Wa_1607138336

Message ID 20191015154449.10338-9-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [01/11] drm/i915/tgl: Add IS_TGL_REVID | expand

Commit Message

Mika Kuoppala Oct. 15, 2019, 3:44 p.m. UTC
Avoid possible deadlock on context switch.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h             | 2 ++
 2 files changed, 7 insertions(+)

Comments

Chris Wilson Oct. 15, 2019, 4:06 p.m. UTC | #1
Quoting Mika Kuoppala (2019-10-15 16:44:47)
> Avoid possible deadlock on context switch.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
>  drivers/gpu/drm/i915/i915_reg.h             | 2 ++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 4b7740aaf3bf..3bacf3d9684e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1276,6 +1276,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>                 wa_masked_en(wal,
>                              GEN9_CS_DEBUG_MODE1,
>                              FF_DOP_CLOCK_GATE_DISABLE);
> +
> +               /* Wa_1607138336:tgl */
> +               wa_write_or(wal,
> +                           GEN9_CTX_PREEMPT_REG,
> +                           GEN12_DISABLE_POSH_BUSY_FF_DOP_CG);
>         }
>  
>         if (IS_GEN(i915, 11)) {
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 51c3e7975d6b..19ac01057528 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7676,6 +7676,8 @@ enum {
>  #define GEN9_CS_DEBUG_MODE1            _MMIO(0x20ec)
>    #define FF_DOP_CLOCK_GATE_DISABLE    BIT(1)
>  #define GEN9_CTX_PREEMPT_REG           _MMIO(0x2248)
> +  #define GEN12_DISABLE_POSH_BUSY_FF_DOP_CG (1 << 11)

REG_BIT(11)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 4b7740aaf3bf..3bacf3d9684e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1276,6 +1276,11 @@  rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 		wa_masked_en(wal,
 			     GEN9_CS_DEBUG_MODE1,
 			     FF_DOP_CLOCK_GATE_DISABLE);
+
+		/* Wa_1607138336:tgl */
+		wa_write_or(wal,
+			    GEN9_CTX_PREEMPT_REG,
+			    GEN12_DISABLE_POSH_BUSY_FF_DOP_CG);
 	}
 
 	if (IS_GEN(i915, 11)) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 51c3e7975d6b..19ac01057528 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7676,6 +7676,8 @@  enum {
 #define GEN9_CS_DEBUG_MODE1		_MMIO(0x20ec)
   #define FF_DOP_CLOCK_GATE_DISABLE	BIT(1)
 #define GEN9_CTX_PREEMPT_REG		_MMIO(0x2248)
+  #define GEN12_DISABLE_POSH_BUSY_FF_DOP_CG (1 << 11)
+
 #define GEN8_CS_CHICKEN1		_MMIO(0x2580)
 #define GEN9_PREEMPT_3D_OBJECT_LEVEL		(1 << 0)
 #define GEN9_PREEMPT_GPGPU_LEVEL(hi, lo)	(((hi) << 2) | ((lo) << 1))