| Message ID | 20191017132105.15528-7-maarten.lankhorst@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [01/14] drm/i915: Rework watermark readout to use plane api | expand |
On Thu, Oct 17, 2019 at 03:20:58PM +0200, Maarten Lankhorst wrote: > Split up crtc_state->base to uapi. This is done using the following patch, > ran after the previous commit that splits out any hw references: > > @@ > struct intel_crtc_state *T; > @@ > -T->base > +T->uapi > > @@ > struct intel_crtc_state *T; > identifier x =~ "^(active|enable|degamma_lut|gamma_lut|ctm|mode|adjusted_mode)$"; > @@ > -T->base.x > +T->uapi.x > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Can't see any functional issues with this one. Slightly disgusting how many places end up saying "uapi" when not actually dealing with uapi stuff, but can't really do anyhting about that unless we want to start playing super fragile tricks with unions. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 6 +- > drivers/gpu/drm/i915/display/intel_atomic.c | 8 +- > .../gpu/drm/i915/display/intel_atomic_plane.c | 6 +- > drivers/gpu/drm/i915/display/intel_audio.c | 8 +- > drivers/gpu/drm/i915/display/intel_bw.c | 4 +- > drivers/gpu/drm/i915/display/intel_cdclk.c | 10 +- > drivers/gpu/drm/i915/display/intel_color.c | 70 ++--- > drivers/gpu/drm/i915/display/intel_crt.c | 6 +- > drivers/gpu/drm/i915/display/intel_ddi.c | 32 +-- > drivers/gpu/drm/i915/display/intel_display.c | 241 +++++++++--------- > drivers/gpu/drm/i915/display/intel_dp.c | 20 +- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/display/intel_dpio_phy.c | 14 +- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 20 +- > drivers/gpu/drm/i915/display/intel_dvo.c | 2 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 44 ++-- > drivers/gpu/drm/i915/display/intel_lvds.c | 4 +- > drivers/gpu/drm/i915/display/intel_panel.c | 6 +- > drivers/gpu/drm/i915/display/intel_pipe_crc.c | 4 +- > drivers/gpu/drm/i915/display/intel_psr.c | 6 +- > drivers/gpu/drm/i915/display/intel_sdvo.c | 6 +- > drivers/gpu/drm/i915/display/intel_sprite.c | 17 +- > drivers/gpu/drm/i915/display/intel_tv.c | 4 +- > drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +- > drivers/gpu/drm/i915/display/vlv_dsi.c | 10 +- > drivers/gpu/drm/i915/i915_debugfs.c | 6 +- > drivers/gpu/drm/i915/intel_pm.c | 112 ++++---- > 27 files changed, 339 insertions(+), 337 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index 4ec493e4755b..0e24b8e257e5 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -625,7 +625,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > enum pipe pipe = intel_crtc->pipe; > u32 tmp; > enum port port; > @@ -1242,7 +1242,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > > /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ > @@ -1265,7 +1265,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, > struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, > base); > struct intel_connector *intel_connector = intel_dsi->attached_connector; > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > const struct drm_display_mode *fixed_mode = > intel_connector->panel.fixed_mode; > struct drm_display_mode *adjusted_mode = > diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c > index 2cdc92897abd..7cf13b9c7d38 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic.c > +++ b/drivers/gpu/drm/i915/display/intel_atomic.c > @@ -193,7 +193,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) > if (!crtc_state) > return NULL; > > - __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base); > + __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi); > > crtc_state->update_pipe = false; > crtc_state->disable_lp_wm = false; > @@ -205,7 +205,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) > crtc_state->fb_bits = 0; > crtc_state->update_planes = 0; > > - return &crtc_state->base; > + return &crtc_state->uapi; > } > > /** > @@ -222,7 +222,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc, > { > struct intel_crtc_state *crtc_state = to_intel_crtc_state(state); > > - __drm_atomic_helper_crtc_destroy_state(&crtc_state->base); > + __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi); > kfree(crtc_state); > } > > @@ -319,7 +319,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > { > struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > - struct drm_atomic_state *drm_state = crtc_state->base.state; > + struct drm_atomic_state *drm_state = crtc_state->uapi.state; > struct intel_atomic_state *state = to_intel_atomic_state(drm_state); > int num_scalers_need; > int i; > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > index 847f9c4ecbbd..d92c185d4b4a 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > @@ -268,7 +268,7 @@ void intel_update_plane(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > trace_intel_update_plane(&plane->base, crtc); > plane->update_plane(plane, crtc_state, plane_state); > @@ -278,7 +278,7 @@ void intel_update_slave(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > trace_intel_update_plane(&plane->base, crtc); > plane->update_slave(plane, crtc_state, plane_state); > @@ -287,7 +287,7 @@ void intel_update_slave(struct intel_plane *plane, > void intel_disable_plane(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > trace_intel_disable_plane(&plane->base, crtc); > plane->disable_plane(plane, crtc_state); > diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c > index 6a58e8ad86f8..5680eed9c71f 100644 > --- a/drivers/gpu/drm/i915/display/intel_audio.c > +++ b/drivers/gpu/drm/i915/display/intel_audio.c > @@ -554,7 +554,7 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder, > const struct drm_connector_state *old_conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > enum pipe pipe = crtc->pipe; > enum port port = encoder->port; > u32 tmp, eldv; > @@ -601,7 +601,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_connector *connector = conn_state->connector; > enum pipe pipe = crtc->pipe; > enum port port = encoder->port; > @@ -691,7 +691,7 @@ void intel_audio_codec_enable(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct i915_audio_component *acomp = dev_priv->audio_component; > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_connector *connector = conn_state->connector; > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > @@ -752,7 +752,7 @@ void intel_audio_codec_disable(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct i915_audio_component *acomp = dev_priv->audio_component; > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > enum port port = encoder->port; > enum pipe pipe = crtc->pipe; > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c > index 22e83f857de8..3f6e29f61323 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -297,7 +297,7 @@ static unsigned int intel_bw_crtc_num_active_planes(const struct intel_crtc_stat > > static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > unsigned int data_rate = 0; > enum plane_id plane_id; > > @@ -318,7 +318,7 @@ static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_ > void intel_bw_crtc_update(struct intel_bw_state *bw_state, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > bw_state->data_rate[crtc->pipe] = > intel_bw_crtc_data_rate(crtc_state); > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index fd1ed0fb8748..931f19dbd4dd 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1902,7 +1902,7 @@ intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv, > > static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > int pixel_rate = crtc_state->pixel_rate; > > if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > @@ -1921,7 +1921,7 @@ static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state) > int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = > - to_i915(crtc_state->base.crtc->dev); > + to_i915(crtc_state->uapi.crtc->dev); > int min_cdclk; > > if (!crtc_state->hw.enable) > @@ -2261,10 +2261,10 @@ static int intel_modeset_all_pipes(struct intel_atomic_state *state) > return PTR_ERR(crtc_state); > > if (!crtc_state->hw.active || > - drm_atomic_crtc_needs_modeset(&crtc_state->base)) > + drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) > continue; > > - crtc_state->base.mode_changed = true; > + crtc_state->uapi.mode_changed = true; > > ret = drm_atomic_add_affected_connectors(&state->base, > &crtc->base); > @@ -2330,7 +2330,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) > crtc = intel_get_crtc_for_pipe(dev_priv, pipe); > crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > if (crtc_state && > - drm_atomic_crtc_needs_modeset(&crtc_state->base)) > + drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) > pipe = INVALID_PIPE; > } else { > pipe = INVALID_PIPE; > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c > index 65e1b18bd7e3..52712bb9ed15 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -205,7 +205,7 @@ static void icl_update_output_csc(struct intel_crtc *crtc, > > static bool ilk_csc_limited_range(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > /* > * FIXME if there's a gamma LUT after the CSC, we should > @@ -270,7 +270,7 @@ static void ilk_csc_convert_ctm(const struct intel_crtc_state *crtc_state, > > static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > bool limited_color_range = ilk_csc_limited_range(crtc_state); > > @@ -309,7 +309,7 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state) > > static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (crtc_state->hw.ctm) { > @@ -338,7 +338,7 @@ static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state) > */ > static void cherryview_load_csc_matrix(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -404,7 +404,7 @@ static u32 ilk_lut_10(const struct drm_color_lut *color) > static void i9xx_load_luts_internal(const struct intel_crtc_state *crtc_state, > const struct drm_property_blob *blob) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > int i; > @@ -440,7 +440,7 @@ static void i9xx_load_luts(const struct intel_crtc_state *crtc_state) > > static void i9xx_color_commit(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > u32 val; > @@ -453,7 +453,7 @@ static void i9xx_color_commit(const struct intel_crtc_state *crtc_state) > > static void ilk_color_commit(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > u32 val; > @@ -468,7 +468,7 @@ static void ilk_color_commit(const struct intel_crtc_state *crtc_state) > > static void hsw_color_commit(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > I915_WRITE(GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode); > @@ -478,7 +478,7 @@ static void hsw_color_commit(const struct intel_crtc_state *crtc_state) > > static void skl_color_commit(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > u32 val = 0; > @@ -524,7 +524,7 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc, > > static void i965_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > > if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) > @@ -547,7 +547,7 @@ static void ilk_load_lut_10(struct intel_crtc *crtc, > > static void ilk_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > > if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) > @@ -654,7 +654,7 @@ static void ivb_load_lut_ext_max(struct intel_crtc *crtc) > > static void ivb_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; > > @@ -677,7 +677,7 @@ static void ivb_load_luts(const struct intel_crtc_state *crtc_state) > > static void bdw_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; > > @@ -700,7 +700,7 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state) > > static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; > @@ -739,7 +739,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) > > static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; > @@ -767,7 +767,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat > static void glk_load_luts(const struct intel_crtc_state *crtc_state) > { > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > /* > * On GLK+ both pipe CSC and degamma LUT are controlled > @@ -808,7 +808,7 @@ static void > icl_load_gcmax(const struct intel_crtc_state *crtc_state, > const struct drm_color_lut *color) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_dsb *dsb = intel_dsb_get(crtc); > enum pipe pipe = crtc->pipe; > > @@ -822,7 +822,7 @@ icl_load_gcmax(const struct intel_crtc_state *crtc_state, > static void > icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *blob = crtc_state->hw.gamma_lut; > const struct drm_color_lut *lut = blob->data; > struct intel_dsb *dsb = intel_dsb_get(crtc); > @@ -854,7 +854,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state) > static void > icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *blob = crtc_state->hw.gamma_lut; > const struct drm_color_lut *lut = blob->data; > const struct drm_color_lut *entry; > @@ -911,7 +911,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state) > static void icl_load_luts(const struct intel_crtc_state *crtc_state) > { > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_dsb *dsb = intel_dsb_get(crtc); > > if (crtc_state->hw.degamma_lut) > @@ -990,7 +990,7 @@ static void chv_load_cgm_gamma(struct intel_crtc *crtc, > > static void chv_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; > > @@ -1010,28 +1010,28 @@ static void chv_load_luts(const struct intel_crtc_state *crtc_state) > > void intel_color_load_luts(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > dev_priv->display.load_luts(crtc_state); > } > > void intel_color_commit(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > dev_priv->display.color_commit(crtc_state); > } > > int intel_color_check(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > return dev_priv->display.color_check(crtc_state); > } > > void intel_color_get_config(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (dev_priv->display.read_luts) > dev_priv->display.read_luts(crtc_state); > @@ -1055,16 +1055,16 @@ static bool need_plane_update(struct intel_plane *plane, > static int > intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_atomic_state *state = > - to_intel_atomic_state(new_crtc_state->base.state); > + to_intel_atomic_state(new_crtc_state->uapi.state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > struct intel_plane *plane; > > if (!new_crtc_state->hw.active || > - drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) > + drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) > return 0; > > if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable && > @@ -1107,7 +1107,7 @@ static int check_lut_size(const struct drm_property_blob *lut, int expected) > > static int check_luts(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; > const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; > int gamma_length, degamma_length; > @@ -1480,7 +1480,7 @@ static int glk_gamma_precision(const struct intel_crtc_state *crtc_state) > > int intel_color_get_gamma_bit_precision(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (HAS_GMCH(dev_priv)) { > @@ -1586,7 +1586,7 @@ static u32 intel_color_lut_pack(u32 val, u32 bit_precision) > static struct drm_property_blob * > i9xx_read_lut_8(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > struct drm_property_blob *blob; > @@ -1629,7 +1629,7 @@ static void i9xx_read_luts(struct intel_crtc_state *crtc_state) > static struct drm_property_blob * > i965_read_lut_10p6(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; > enum pipe pipe = crtc->pipe; > @@ -1681,7 +1681,7 @@ static void i965_read_luts(struct intel_crtc_state *crtc_state) > static struct drm_property_blob * > chv_read_cgm_lut(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; > enum pipe pipe = crtc->pipe; > @@ -1723,7 +1723,7 @@ static void chv_read_luts(struct intel_crtc_state *crtc_state) > static struct drm_property_blob * > ilk_read_lut_10(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; > enum pipe pipe = crtc->pipe; > @@ -1770,7 +1770,7 @@ static void ilk_read_luts(struct intel_crtc_state *crtc_state) > static struct drm_property_blob * > glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > int hw_lut_size = ivb_lut_10_size(prec_index); > enum pipe pipe = crtc->pipe; > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > index 399abc3d521e..164af1936d38 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -161,7 +161,7 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_crt *crt = intel_encoder_to_crt(encoder); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; > u32 adpa; > > @@ -271,7 +271,7 @@ static void hsw_pre_enable_crt(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum pipe pipe = crtc->pipe; > > WARN_ON(!crtc_state->has_pch_encoder); > @@ -288,7 +288,7 @@ static void hsw_enable_crt(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum pipe pipe = crtc->pipe; > > WARN_ON(!crtc_state->has_pch_encoder); > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index c8639b92a6da..1b9f68d4c566 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -1744,7 +1744,7 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder, > void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, > const struct drm_connector_state *conn_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 temp; > @@ -1806,7 +1806,7 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, > void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, > bool state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 temp; > @@ -1828,7 +1828,7 @@ void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, > static u32 > intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > @@ -1915,7 +1915,7 @@ intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state) > > void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 temp; > @@ -1931,7 +1931,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) > static void > intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 temp; > @@ -1943,7 +1943,7 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state) > > void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); > @@ -2241,7 +2241,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder, > > void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); > enum port port = encoder->port; > @@ -2259,7 +2259,7 @@ void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state) > > void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > if (cpu_transcoder != TRANSCODER_EDP) { > @@ -3337,7 +3337,7 @@ static void intel_ddi_disable_fec_state(struct intel_encoder *encoder, > static void > tgl_clear_psr2_transcoder_exitline(const struct intel_crtc_state *cstate) > { > - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); > u32 val; > > if (!cstate->dc3co_exitline) > @@ -3352,7 +3352,7 @@ static void > tgl_set_psr2_transcoder_exitline(const struct intel_crtc_state *cstate) > { > u32 val, exit_scanlines; > - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); > > if (!cstate->dc3co_exitline) > return; > @@ -3370,7 +3370,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *cstate) > { > u32 exit_scanlines; > - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); > u32 crtc_vdisplay = cstate->hw.adjusted_mode.crtc_vdisplay; > > cstate->dc3co_exitline = 0; > @@ -3379,7 +3379,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, > return; > > /* B.Specs:49196 DC3CO only works with pipeA and DDIA.*/ > - if (to_intel_crtc(cstate->base.crtc)->pipe != PIPE_A || > + if (to_intel_crtc(cstate->uapi.crtc)->pipe != PIPE_A || > encoder->port != PORT_A) > return; > > @@ -3403,7 +3403,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, > static void tgl_dc3co_exitline_get_config(struct intel_crtc_state *crtc_state) > { > u32 val; > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (INTEL_GEN(dev_priv) < 12) > return; > @@ -3649,7 +3649,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > const struct drm_connector_state *conn_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -4206,7 +4206,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; > u32 temp, flags = 0; > > @@ -4373,7 +4373,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum port port = encoder->port; > int ret; > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 3106aaf55f17..06c593d56d92 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -516,7 +516,7 @@ icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, > static bool > needs_modeset(const struct intel_crtc_state *state) > { > - return drm_atomic_crtc_needs_modeset(&state->base); > + return drm_atomic_crtc_needs_modeset(&state->uapi); > } > > /* > @@ -630,7 +630,7 @@ i9xx_select_p2_div(const struct intel_limit *limit, > const struct intel_crtc_state *crtc_state, > int target) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { > /* > @@ -666,7 +666,7 @@ i9xx_find_best_dpll(const struct intel_limit *limit, > int target, int refclk, struct dpll *match_clock, > struct dpll *best_clock) > { > - struct drm_device *dev = crtc_state->base.crtc->dev; > + struct drm_device *dev = crtc_state->uapi.crtc->dev; > struct dpll clock; > int err = target; > > @@ -724,7 +724,7 @@ pnv_find_best_dpll(const struct intel_limit *limit, > int target, int refclk, struct dpll *match_clock, > struct dpll *best_clock) > { > - struct drm_device *dev = crtc_state->base.crtc->dev; > + struct drm_device *dev = crtc_state->uapi.crtc->dev; > struct dpll clock; > int err = target; > > @@ -780,7 +780,7 @@ g4x_find_best_dpll(const struct intel_limit *limit, > int target, int refclk, struct dpll *match_clock, > struct dpll *best_clock) > { > - struct drm_device *dev = crtc_state->base.crtc->dev; > + struct drm_device *dev = crtc_state->uapi.crtc->dev; > struct dpll clock; > int max_n; > bool found = false; > @@ -874,7 +874,7 @@ vlv_find_best_dpll(const struct intel_limit *limit, > int target, int refclk, struct dpll *match_clock, > struct dpll *best_clock) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct dpll clock; > unsigned int bestppm = 1000000; > @@ -934,7 +934,7 @@ chv_find_best_dpll(const struct intel_limit *limit, > int target, int refclk, struct dpll *match_clock, > struct dpll *best_clock) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > unsigned int best_error_ppm; > struct dpll clock; > @@ -1067,7 +1067,7 @@ static void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc) > static void > intel_wait_for_pipe_off(const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (INTEL_GEN(dev_priv) >= 4) { > @@ -1526,7 +1526,7 @@ static void i9xx_enable_pll(struct intel_crtc *crtc, > > static void i9xx_disable_pll(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -1617,7 +1617,7 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv, > > static void ironlake_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > i915_reg_t reg; > @@ -1761,7 +1761,7 @@ enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc) > > static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > /* > * On i965gm the hardware frame counter reads > @@ -1781,7 +1781,7 @@ static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state > > static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > drm_crtc_set_max_vblank_count(&crtc->base, > intel_crtc_max_vblank_count(crtc_state)); > @@ -1790,7 +1790,7 @@ static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) > > static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; > enum pipe pipe = crtc->pipe; > @@ -1848,7 +1848,7 @@ static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) > > static void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; > enum pipe pipe = crtc->pipe; > @@ -3103,14 +3103,14 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, > plane_state->base.visible = visible; > > if (visible) > - crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); > + crtc_state->uapi.plane_mask |= drm_plane_mask(&plane->base); > else > - crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); > + crtc_state->uapi.plane_mask &= ~drm_plane_mask(&plane->base); > } > > static void fixup_active_planes(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > struct drm_plane *plane; > > /* > @@ -3121,7 +3121,7 @@ static void fixup_active_planes(struct intel_crtc_state *crtc_state) > crtc_state->active_planes = 0; > > drm_for_each_plane_mask(plane, &dev_priv->drm, > - crtc_state->base.plane_mask) > + crtc_state->uapi.plane_mask) > crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); > } > > @@ -3592,7 +3592,7 @@ i9xx_plane_max_stride(struct intel_plane *plane, > > static u32 i9xx_plane_ctl_crtc(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 dspcntr = 0; > > @@ -3745,7 +3745,7 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state, > return ret; > > ret = drm_atomic_helper_check_plane_state(&plane_state->base, > - &crtc_state->base, > + &crtc_state->uapi, > DRM_PLANE_HELPER_NO_SCALING, > DRM_PLANE_HELPER_NO_SCALING, > i9xx_plane_has_windowing(plane), > @@ -3921,7 +3921,7 @@ static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id) > */ > static void skl_detach_scalers(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > int i; > @@ -4116,7 +4116,7 @@ static u32 cnl_plane_ctl_flip(unsigned int reflect) > > u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > u32 plane_ctl = 0; > > if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > @@ -4172,7 +4172,7 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, > > u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > u32 plane_color_ctl = 0; > > if (INTEL_GEN(dev_priv) >= 11) > @@ -4788,7 +4788,7 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc, > > static void ironlake_fdi_pll_enable(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > enum pipe pipe = intel_crtc->pipe; > i915_reg_t reg; > @@ -4949,7 +4949,7 @@ void lpt_disable_iclkip(struct drm_i915_private *dev_priv) > /* Program iCLKIP clock to the desired frequency */ > static void lpt_program_iclkip(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > int clock = crtc_state->hw.adjusted_mode.crtc_clock; > u32 divsel, phaseinc, auxdiv, phasedir = 0; > @@ -5065,7 +5065,7 @@ int lpt_get_iclkip(struct drm_i915_private *dev_priv) > static void ironlake_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state, > enum pipe pch_transcoder) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > @@ -5108,7 +5108,7 @@ static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool e > > static void ivybridge_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > switch (crtc->pipe) { > @@ -5138,7 +5138,7 @@ static struct intel_encoder * > intel_get_crtc_new_encoder(const struct intel_atomic_state *state, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_connector_state *connector_state; > const struct drm_connector *connector; > struct intel_encoder *encoder = NULL; > @@ -5170,7 +5170,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state, > static void ironlake_pch_enable(const struct intel_atomic_state *state, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > enum pipe pipe = crtc->pipe; > @@ -5254,7 +5254,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state, > static void lpt_pch_enable(const struct intel_atomic_state *state, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > @@ -5371,7 +5371,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, > struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > struct intel_crtc *intel_crtc = > - to_intel_crtc(crtc_state->base.crtc); > + to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > @@ -5568,7 +5568,7 @@ static void skylake_scaler_disable(struct intel_crtc *crtc) > > static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > const struct intel_crtc_scaler_state *scaler_state = > @@ -5605,7 +5605,7 @@ static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) > > static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -5626,7 +5626,7 @@ static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state) > > void hsw_enable_ips(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > > @@ -5662,7 +5662,7 @@ void hsw_enable_ips(const struct intel_crtc_state *crtc_state) > > void hsw_disable_ips(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > > @@ -5767,7 +5767,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc) > static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_state, > const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (!old_crtc_state->ips_enabled) > @@ -5783,7 +5783,7 @@ static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_s > * Disable IPS before we program the LUT. > */ > if (IS_HASWELL(dev_priv) && > - (new_crtc_state->base.color_mgmt_changed || > + (new_crtc_state->uapi.color_mgmt_changed || > new_crtc_state->update_pipe) && > new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) > return true; > @@ -5794,7 +5794,7 @@ static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_s > static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_state, > const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (!new_crtc_state->ips_enabled) > @@ -5810,7 +5810,7 @@ static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s > * Re-enable IPS after the LUT has been programmed. > */ > if (IS_HASWELL(dev_priv) && > - (new_crtc_state->base.color_mgmt_changed || > + (new_crtc_state->uapi.color_mgmt_changed || > new_crtc_state->update_pipe) && > new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) > return true; > @@ -5851,10 +5851,10 @@ static bool needs_scalerclk_wa(struct drm_i915_private *dev_priv, > > static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct drm_atomic_state *state = old_crtc_state->base.state; > + struct drm_atomic_state *state = old_crtc_state->uapi.state; > struct intel_crtc_state *pipe_config = > intel_atomic_get_new_crtc_state(to_intel_atomic_state(state), > crtc); > @@ -5894,10 +5894,10 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) > static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state, > struct intel_crtc_state *pipe_config) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct drm_atomic_state *state = old_crtc_state->base.state; > + struct drm_atomic_state *state = old_crtc_state->uapi.state; > struct drm_plane *primary = crtc->base.primary; > struct drm_plane_state *old_primary_state = > drm_atomic_get_old_plane_state(state, primary); > @@ -6249,7 +6249,7 @@ static void intel_encoders_update_pipe(struct intel_crtc *crtc, > > static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_plane *plane = to_intel_plane(crtc->base.primary); > > plane->disable_plane(plane, crtc_state); > @@ -6258,7 +6258,7 @@ static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_stat > static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > @@ -6392,7 +6392,7 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc) > static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > enum pipe pipe = intel_crtc->pipe, hsw_workaround_pipe; > @@ -6500,7 +6500,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, > > static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -6516,7 +6516,7 @@ static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state) > static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = old_crtc_state->base.crtc; > + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > @@ -6575,7 +6575,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, > static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = old_crtc_state->base.crtc; > + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; > struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; > @@ -6609,7 +6609,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, > > static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (!crtc_state->gmch_pfit.control) > @@ -6745,7 +6745,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port) > > static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct drm_encoder *encoder; > enum pipe pipe = crtc->pipe; > @@ -6762,7 +6762,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) > mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe)); > > drm_for_each_encoder_mask(encoder, &dev_priv->drm, > - crtc_state->base.encoder_mask) { > + crtc_state->uapi.encoder_mask) { > struct intel_encoder *intel_encoder = to_intel_encoder(encoder); > > mask |= BIT_ULL(intel_encoder->power_domain); > @@ -6780,7 +6780,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) > static u64 > modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum intel_display_power_domain domain; > u64 domains, new_domains, old_domains; > @@ -6809,7 +6809,7 @@ static void modeset_put_power_domains(struct drm_i915_private *dev_priv, > static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > @@ -6865,7 +6865,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, > > static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > I915_WRITE(FP0(crtc->pipe), crtc_state->dpll_hw_state.fp0); > @@ -6875,7 +6875,7 @@ static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state) > static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > @@ -6925,7 +6925,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config, > > static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (!old_crtc_state->gmch_pfit.control) > @@ -6941,7 +6941,7 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) > static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state, > struct intel_atomic_state *state) > { > - struct drm_crtc *crtc = old_crtc_state->base.crtc; > + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > @@ -7140,7 +7140,7 @@ static int ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, > struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(dev); > - struct drm_atomic_state *state = pipe_config->base.state; > + struct drm_atomic_state *state = pipe_config->uapi.state; > struct intel_crtc *other_crtc; > struct intel_crtc_state *other_crtc_state; > > @@ -7259,7 +7259,7 @@ static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc, > > bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > /* IPS only exists on ULT machines and is tied to pipe A. */ > @@ -7289,9 +7289,9 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) > static bool hsw_compute_ips_config(struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = > - to_i915(crtc_state->base.crtc->dev); > + to_i915(crtc_state->uapi.crtc->dev); > struct intel_atomic_state *intel_state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > > if (!hsw_crtc_state_ips_capable(crtc_state)) > return false; > @@ -7363,7 +7363,7 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config) > > static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (HAS_GMCH(dev_priv)) > /* FIXME calculate proper pipe pixel rate for GMCH pfit */ > @@ -7598,7 +7598,7 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv, enum pipe > static void intel_pch_transcoder_set_m_n(const struct intel_crtc_state *crtc_state, > const struct intel_link_m_n *m_n) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -7625,7 +7625,7 @@ static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_sta > const struct intel_link_m_n *m_n, > const struct intel_link_m_n *m2_n2) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > enum transcoder transcoder = crtc_state->cpu_transcoder; > @@ -7938,7 +7938,7 @@ int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, > if (!pipe_config) > return -ENOMEM; > > - pipe_config->base.crtc = &crtc->base; > + pipe_config->uapi.crtc = &crtc->base; > pipe_config->pixel_multiplier = 1; > pipe_config->dpll = *dpll; > > @@ -8098,7 +8098,7 @@ static void i8xx_compute_dpll(struct intel_crtc *crtc, > > static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > @@ -8160,7 +8160,7 @@ static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state) > > static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > > @@ -8174,7 +8174,7 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) > > static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > if (IS_GEN(dev_priv, 2)) > @@ -8272,7 +8272,7 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, > > static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 pipeconf; > > @@ -8718,7 +8718,7 @@ bdw_get_pipemisc_output_format(struct intel_crtc *crtc) > > static void i9xx_get_pipe_color_config(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_plane *plane = to_intel_plane(crtc->base.primary); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; > @@ -9356,7 +9356,7 @@ void intel_init_pch_refclk(struct drm_i915_private *dev_priv) > > static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > u32 val; > @@ -9410,7 +9410,7 @@ static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state) > > static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > u32 val = 0; > @@ -9433,7 +9433,7 @@ static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state) > > static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 val = 0; > > @@ -9619,7 +9619,7 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc, > { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_atomic_state *state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > const struct intel_limit *limit; > int refclk = 120000; > > @@ -10044,7 +10044,7 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc, > { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_atomic_state *state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > > if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) || > INTEL_GEN(dev_priv) >= 11) { > @@ -10615,7 +10615,7 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state, > } > > ret = drm_atomic_helper_check_plane_state(&plane_state->base, > - &crtc_state->base, > + &crtc_state->uapi, > DRM_PLANE_HELPER_NO_SCALING, > DRM_PLANE_HELPER_NO_SCALING, > true, true); > @@ -10802,7 +10802,7 @@ i9xx_cursor_max_stride(struct intel_plane *plane, > > static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 cntl = 0; > > @@ -11219,7 +11219,7 @@ int intel_get_load_detect_pipe(struct drm_connector *connector, > if (!mode) > mode = &load_detect_mode; > > - ret = drm_atomic_set_mode_for_crtc(&crtc_state->base, mode); > + ret = drm_atomic_set_mode_for_crtc(&crtc_state->uapi, mode); > if (ret) > goto fail; > > @@ -11457,7 +11457,7 @@ intel_encoder_current_mode(struct intel_encoder *encoder) > return NULL; > } > > - crtc_state->base.crtc = &crtc->base; > + crtc_state->uapi.crtc = &crtc->base; > > if (!dev_priv->display.get_pipe_config(crtc, crtc_state)) { > kfree(crtc_state); > @@ -11528,7 +11528,7 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat > const struct intel_plane_state *old_plane_state, > struct intel_plane_state *plane_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_plane *plane = to_intel_plane(plane_state->base.plane); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > bool mode_changed = needs_modeset(crtc_state); > @@ -11700,9 +11700,9 @@ static int icl_add_linked_planes(struct intel_atomic_state *state) > > static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->base.state); > + struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state); > struct intel_plane *plane, *linked; > struct intel_plane_state *plane_state; > int i; > @@ -11772,9 +11772,9 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) > > static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct intel_atomic_state *state = > - to_intel_atomic_state(new_crtc_state->base.state); > + to_intel_atomic_state(new_crtc_state->uapi.state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(state, crtc); > > @@ -11807,10 +11807,10 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, > * when C8 planes are getting enabled/disabled. > */ > if (c8_planes_changed(crtc_state)) > - crtc_state->base.color_mgmt_changed = true; > + crtc_state->uapi.color_mgmt_changed = true; > > if (mode_changed || crtc_state->update_pipe || > - crtc_state->base.color_mgmt_changed) { > + crtc_state->uapi.color_mgmt_changed) { > ret = intel_color_check(crtc_state); > if (ret) > return ret; > @@ -11928,7 +11928,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - struct drm_atomic_state *state = pipe_config->base.state; > + struct drm_atomic_state *state = pipe_config->uapi.state; > struct drm_connector *connector; > struct drm_connector_state *connector_state; > int bpp, i; > @@ -12081,7 +12081,7 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, > struct intel_atomic_state *state, > const char *context) > { > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > const struct intel_plane_state *plane_state; > struct intel_plane *plane; > @@ -12258,7 +12258,7 @@ static int > clear_intel_crtc_state(struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = > - to_i915(crtc_state->base.crtc->dev); > + to_i915(crtc_state->uapi.crtc->dev); > struct intel_crtc_state *saved_state; > > saved_state = kzalloc(sizeof(*saved_state), GFP_KERNEL); > @@ -12284,8 +12284,8 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) > BUILD_BUG_ON(offsetof(struct intel_crtc_state, base)); > BUILD_BUG_ON(offsetof(struct intel_crtc_state, uapi)); > BUILD_BUG_ON(offsetof(struct intel_crtc_state, hw)); > - memcpy(&crtc_state->base + 1, &saved_state->base + 1, > - sizeof(*crtc_state) - sizeof(crtc_state->base)); > + memcpy(&crtc_state->uapi + 1, &saved_state->uapi + 1, > + sizeof(*crtc_state) - sizeof(crtc_state->uapi)); > > kfree(saved_state); > return 0; > @@ -12294,8 +12294,8 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) > static int > intel_modeset_pipe_config(struct intel_crtc_state *pipe_config) > { > - struct drm_crtc *crtc = pipe_config->base.crtc; > - struct drm_atomic_state *state = pipe_config->base.state; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > + struct drm_atomic_state *state = pipe_config->uapi.state; > struct intel_encoder *encoder; > struct drm_connector *connector; > struct drm_connector_state *connector_state; > @@ -12560,7 +12560,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > const struct intel_crtc_state *pipe_config, > bool fastset) > { > - struct drm_i915_private *dev_priv = to_i915(current_config->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev); > bool ret = true; > u32 bp_gamma = 0; > bool fixup_inherited = fastset && > @@ -13108,12 +13108,12 @@ verify_crtc_state(struct intel_crtc *crtc, > struct drm_atomic_state *state; > bool active; > > - state = old_crtc_state->base.state; > - __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->base); > + state = old_crtc_state->uapi.state; > + __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi); > pipe_config = old_crtc_state; > memset(pipe_config, 0, sizeof(*pipe_config)); > - pipe_config->base.crtc = &crtc->base; > - pipe_config->base.state = state; > + pipe_config->uapi.crtc = &crtc->base; > + pipe_config->uapi.state = state; > > DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); > > @@ -13293,7 +13293,7 @@ intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, > static void > intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > @@ -13490,7 +13490,7 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta > if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) > return; > > - new_crtc_state->base.mode_changed = false; > + new_crtc_state->uapi.mode_changed = false; > new_crtc_state->update_pipe = true; > > /* > @@ -13563,7 +13563,7 @@ static int intel_atomic_check(struct drm_device *dev, > new_crtc_state, i) { > if (new_crtc_state->hw.mode.private_flags != > old_crtc_state->hw.mode.private_flags) > - new_crtc_state->base.mode_changed = true; > + new_crtc_state->uapi.mode_changed = true; > } > > ret = drm_atomic_helper_check_modeset(dev, &state->base); > @@ -13687,7 +13687,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, > static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, > const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > /* drm_atomic_helper_update_legacy_modeset_state might not be called. */ > @@ -13732,7 +13732,7 @@ static void commit_pipe_config(struct intel_atomic_state *state, > * CRTC was enabled. > */ > if (!modeset) { > - if (new_crtc_state->base.color_mgmt_changed || > + if (new_crtc_state->uapi.color_mgmt_changed || > new_crtc_state->update_pipe) > intel_color_commit(new_crtc_state); > > @@ -13938,7 +13938,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) > */ > if (!skl_ddb_entry_equal(&new_crtc_state->wm.skl.ddb, > &old_crtc_state->wm.skl.ddb) && > - !new_crtc_state->base.active_changed && > + !new_crtc_state->uapi.active_changed && > state->wm_results.dirty_pipes != updated) > vbl_wait = true; > > @@ -14071,12 +14071,13 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > bool modeset = needs_modeset(new_crtc_state); > > /* Complete events for now disable pipes here. */ > - if (modeset && !new_crtc_state->hw.active && new_crtc_state->base.event) { > + if (modeset && !new_crtc_state->hw.active && new_crtc_state->uapi.event) { > spin_lock_irq(&dev->event_lock); > - drm_crtc_send_vblank_event(&crtc->base, new_crtc_state->base.event); > + drm_crtc_send_vblank_event(&crtc->base, > + new_crtc_state->uapi.event); > spin_unlock_irq(&dev->event_lock); > > - new_crtc_state->base.event = NULL; > + new_crtc_state->uapi.event = NULL; > } > } > > @@ -14109,7 +14110,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { > if (new_crtc_state->hw.active && > !needs_modeset(new_crtc_state) && > - (new_crtc_state->base.color_mgmt_changed || > + (new_crtc_state->uapi.color_mgmt_changed || > new_crtc_state->update_pipe)) > intel_color_load_luts(new_crtc_state); > } > @@ -14557,7 +14558,7 @@ int > skl_max_scale(const struct intel_crtc_state *crtc_state, > const struct drm_format_info *format) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > int max_scale; > int crtc_clock, max_dotclk, tmpclk1, tmpclk2; > @@ -14566,7 +14567,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, > return DRM_PLANE_HELPER_NO_SCALING; > > crtc_clock = crtc_state->hw.adjusted_mode.crtc_clock; > - max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk; > + max_dotclk = to_intel_atomic_state(crtc_state->uapi.state)->cdclk.logical.cdclk; > > if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10) > max_dotclk *= 2; > @@ -14786,7 +14787,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane, > > out_free: > if (new_crtc_state) > - intel_crtc_destroy_state(&crtc->base, &new_crtc_state->base); > + intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi); > if (ret) > intel_plane_destroy_state(&plane->base, &new_plane_state->base); > else > @@ -15112,7 +15113,7 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) > ret = -ENOMEM; > goto fail; > } > - __drm_atomic_helper_crtc_reset(&intel_crtc->base, &crtc_state->base); > + __drm_atomic_helper_crtc_reset(&intel_crtc->base, &crtc_state->uapi); > intel_crtc->config = crtc_state; > > primary = intel_primary_plane_create(dev_priv, pipe); > @@ -16128,7 +16129,7 @@ static int intel_initial_commit(struct drm_device *dev) > * having a proper LUT loaded. Remove once we > * have readout for pipe gamma enable. > */ > - crtc_state->base.color_mgmt_changed = true; > + crtc_state->uapi.color_mgmt_changed = true; > } > } > > @@ -16526,7 +16527,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc, > > static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > /* > * Some SNB BIOSen (eg. ASUS K53SV) are known to misprogram > @@ -16660,9 +16661,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) > struct intel_crtc_state *crtc_state = > to_intel_crtc_state(crtc->base.state); > > - __drm_atomic_helper_crtc_destroy_state(&crtc_state->base); > + __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi); > memset(crtc_state, 0, sizeof(*crtc_state)); > - __drm_atomic_helper_crtc_reset(&crtc->base, &crtc_state->base); > + __drm_atomic_helper_crtc_reset(&crtc->base, &crtc_state->uapi); > > crtc_state->hw.active = crtc_state->hw.enable = > dev_priv->display.get_pipe_config(crtc, crtc_state); > @@ -16748,9 +16749,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) > * because anything calling .crtc_disable may > * rely on the connector_mask being accurate. > */ > - crtc_state->base.connector_mask |= > + crtc_state->uapi.connector_mask |= > drm_connector_mask(&connector->base); > - crtc_state->base.encoder_mask |= > + crtc_state->uapi.encoder_mask |= > drm_encoder_mask(&encoder->base); > } > } else { > @@ -16778,7 +16779,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) > crtc->base.mode.vdisplay = crtc_state->pipe_src_h; > intel_mode_from_pipe_config(&crtc_state->hw.adjusted_mode, > crtc_state); > - WARN_ON(drm_atomic_set_mode_for_crtc(&crtc_state->base, &crtc->base.mode)); > + WARN_ON(drm_atomic_set_mode_for_crtc(&crtc_state->uapi, &crtc->base.mode)); > > /* > * The initial mode needs to be set in order to keep > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 213b0c0cdd67..7d691f6fc369 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2222,7 +2222,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp, > const struct drm_display_info *info = &connector->display_info; > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > int ret; > > if (!drm_mode_is_420_only(info, adjusted_mode) || > @@ -2287,7 +2287,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > struct intel_lspcon *lspcon = enc_to_intel_lspcon(&encoder->base); > enum port port = encoder->port; > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_connector *intel_connector = intel_dp->attached_connector; > struct intel_digital_connector_state *intel_conn_state = > to_intel_digital_connector_state(conn_state); > @@ -2402,7 +2402,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder, > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > enum port port = encoder->port; > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > > intel_dp_set_link_params(intel_dp, pipe_config->port_clock, > @@ -3000,7 +3000,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state) > static void ironlake_edp_pll_on(struct intel_dp *intel_dp, > const struct intel_crtc_state *pipe_config) > { > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > assert_pipe_disabled(dev_priv, crtc->pipe); > @@ -3040,7 +3040,7 @@ static void ironlake_edp_pll_on(struct intel_dp *intel_dp, > static void ironlake_edp_pll_off(struct intel_dp *intel_dp, > const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > assert_pipe_disabled(dev_priv, crtc->pipe); > @@ -3200,7 +3200,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > u32 tmp, flags = 0; > enum port port = encoder->port; > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > if (encoder->type == INTEL_OUTPUT_EDP) > pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP); > @@ -3467,7 +3467,7 @@ static void intel_enable_dp(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > u32 dp_reg = I915_READ(intel_dp->output_reg); > enum pipe pipe = crtc->pipe; > intel_wakeref_t wakeref; > @@ -3600,7 +3600,7 @@ static void vlv_init_panel_power_sequencer(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > lockdep_assert_held(&dev_priv->pps_mutex); > > @@ -4122,7 +4122,7 @@ intel_dp_link_down(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > enum port port = encoder->port; > u32 DP = intel_dp->DP; > > @@ -6874,7 +6874,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, > int refresh_rate) > { > struct intel_dp *intel_dp = dev_priv->drrs.dp; > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum drrs_refresh_rate_type index = DRRS_HIGH_RR; > > if (refresh_rate <= 0) { > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 7d63f0a79ca1..adf1d3895419 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -42,7 +42,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, > struct drm_connector_state *conn_state, > struct link_config_limits *limits) > { > - struct drm_atomic_state *state = crtc_state->base.state; > + struct drm_atomic_state *state = crtc_state->uapi.state; > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); > struct intel_dp *intel_dp = &intel_mst->primary->dp; > struct intel_connector *connector = > diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c > index 556d1b30f06a..704f38681c4b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c > @@ -739,7 +739,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum dpio_channel ch = vlv_dport_to_channel(enc_to_dig_port(&encoder->base)); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum pipe pipe = crtc->pipe; > u32 val; > > @@ -783,7 +783,7 @@ void chv_phy_pre_pll_enable(struct intel_encoder *encoder, > { > struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum dpio_channel ch = vlv_dport_to_channel(dport); > enum pipe pipe = crtc->pipe; > unsigned int lane_mask = > @@ -864,7 +864,7 @@ void chv_phy_pre_encoder_enable(struct intel_encoder *encoder, > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > struct intel_digital_port *dport = dp_to_dig_port(intel_dp); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum dpio_channel ch = vlv_dport_to_channel(dport); > enum pipe pipe = crtc->pipe; > int data, i, stagger; > @@ -953,7 +953,7 @@ void chv_phy_post_pll_disable(struct intel_encoder *encoder, > const struct intel_crtc_state *old_crtc_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - enum pipe pipe = to_intel_crtc(old_crtc_state->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(old_crtc_state->uapi.crtc)->pipe; > u32 val; > > vlv_dpio_get(dev_priv); > @@ -1016,7 +1016,7 @@ void vlv_phy_pre_pll_enable(struct intel_encoder *encoder, > { > struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum dpio_channel port = vlv_dport_to_channel(dport); > enum pipe pipe = crtc->pipe; > > @@ -1046,7 +1046,7 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder, > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > struct intel_digital_port *dport = dp_to_dig_port(intel_dp); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > enum dpio_channel port = vlv_dport_to_channel(dport); > enum pipe pipe = crtc->pipe; > u32 val; > @@ -1075,7 +1075,7 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder, > { > struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > enum dpio_channel port = vlv_dport_to_channel(dport); > enum pipe pipe = crtc->pipe; > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index ec10fa7d3c69..33db1f59b406 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -136,7 +136,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, > */ > void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_shared_dpll *pll = crtc_state->shared_dpll; > > @@ -163,7 +163,7 @@ void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state) > */ > void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_shared_dpll *pll = crtc_state->shared_dpll; > unsigned int crtc_mask = drm_crtc_mask(&crtc->base); > @@ -208,7 +208,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) > */ > void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_shared_dpll *pll = crtc_state->shared_dpll; > unsigned int crtc_mask = drm_crtc_mask(&crtc->base); > @@ -827,7 +827,7 @@ hsw_ddi_hdmi_get_dpll(struct intel_atomic_state *state, > static struct intel_shared_dpll * > hsw_ddi_dp_get_dpll(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > struct intel_shared_dpll *pll; > enum intel_dpll_id pll_id; > int clock = crtc_state->port_clock; > @@ -1736,7 +1736,7 @@ static bool > bxt_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state, > struct bxt_clk_div *clk_div) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct dpll best_clock; > > /* Calculate HDMI div */ > @@ -2259,7 +2259,7 @@ static bool > cnl_ddi_calculate_wrpll(struct intel_crtc_state *crtc_state, > struct skl_wrpll_params *wrpll_params) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > u32 afe_clock = crtc_state->port_clock * 5; > u32 ref_clock; > u32 dco_min = 7998000; > @@ -2538,7 +2538,7 @@ static const struct skl_wrpll_params tgl_tbt_pll_24MHz_values = { > static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state, > struct skl_wrpll_params *pll_params) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > const struct icl_combo_pll_params *params = > dev_priv->cdclk.hw.ref == 24000 ? > icl_dp_combo_pll_24MHz_values : > @@ -2560,7 +2560,7 @@ static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state, > static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, > struct skl_wrpll_params *pll_params) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (INTEL_GEN(dev_priv) >= 12) { > switch (dev_priv->cdclk.hw.ref) { > @@ -2597,7 +2597,7 @@ static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state, > struct intel_encoder *encoder, > struct intel_dpll_hw_state *pll_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > u32 cfgcr0, cfgcr1; > struct skl_wrpll_params pll_params = { 0 }; > bool ret; > @@ -2729,7 +2729,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, > static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state, > struct intel_dpll_hw_state *pll_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > int refclk_khz = dev_priv->cdclk.hw.ref; > int clock = crtc_state->port_clock; > u32 dco_khz, m1div, m2div_int, m2div_rem, m2div_frac; > diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c > index a68e5c5b91b4..28770c5765ad 100644 > --- a/drivers/gpu/drm/i915/display/intel_dvo.c > +++ b/drivers/gpu/drm/i915/display/intel_dvo.c > @@ -277,7 +277,7 @@ static void intel_dvo_pre_enable(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > struct intel_dvo *intel_dvo = enc_to_dvo(encoder); > enum pipe pipe = crtc->pipe; > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c > index 2f5fc71ac9a0..357ad459bfbc 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -285,7 +285,7 @@ static void ibx_write_infoframe(struct intel_encoder *encoder, > { > const u32 *data = frame; > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -321,7 +321,7 @@ static void ibx_read_infoframe(struct intel_encoder *encoder, > void *frame, ssize_t len) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > u32 val, *data = frame; > int i; > > @@ -340,7 +340,7 @@ static u32 ibx_infoframes_enabled(struct intel_encoder *encoder, > const struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; > i915_reg_t reg = TVIDEO_DIP_CTL(pipe); > u32 val = I915_READ(reg); > > @@ -362,7 +362,7 @@ static void cpt_write_infoframe(struct intel_encoder *encoder, > { > const u32 *data = frame; > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -401,7 +401,7 @@ static void cpt_read_infoframe(struct intel_encoder *encoder, > void *frame, ssize_t len) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > u32 val, *data = frame; > int i; > > @@ -420,7 +420,7 @@ static u32 cpt_infoframes_enabled(struct intel_encoder *encoder, > const struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; > u32 val = I915_READ(TVIDEO_DIP_CTL(pipe)); > > if ((val & VIDEO_DIP_ENABLE) == 0) > @@ -438,7 +438,7 @@ static void vlv_write_infoframe(struct intel_encoder *encoder, > { > const u32 *data = frame; > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -474,7 +474,7 @@ static void vlv_read_infoframe(struct intel_encoder *encoder, > void *frame, ssize_t len) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > u32 val, *data = frame; > int i; > > @@ -493,7 +493,7 @@ static u32 vlv_infoframes_enabled(struct intel_encoder *encoder, > const struct intel_crtc_state *pipe_config) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; > u32 val = I915_READ(VLV_TVIDEO_DIP_CTL(pipe)); > > if ((val & VIDEO_DIP_ENABLE) == 0) > @@ -965,7 +965,7 @@ static bool intel_hdmi_set_gcp_infoframe(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > i915_reg_t reg; > > if ((crtc_state->infoframes.enable & > @@ -990,7 +990,7 @@ void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder, > struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > i915_reg_t reg; > > if ((crtc_state->infoframes.enable & > @@ -1037,7 +1037,7 @@ static void ibx_set_infoframes(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base); > struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > @@ -1096,7 +1096,7 @@ static void cpt_set_infoframes(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > @@ -1145,7 +1145,7 @@ static void vlv_set_infoframes(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > @@ -1741,7 +1741,7 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder, > { > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; > u32 hdmi_val; > @@ -1865,7 +1865,7 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder, > const struct intel_crtc_state *pipe_config, > const struct drm_connector_state *conn_state) > { > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > > WARN_ON(!pipe_config->has_hdmi_sink); > DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", > @@ -1951,7 +1951,7 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder, > { > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > enum pipe pipe = crtc->pipe; > u32 temp; > @@ -2015,7 +2015,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > struct intel_digital_port *intel_dig_port = > hdmi_to_dig_port(intel_hdmi); > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > u32 temp; > > temp = I915_READ(intel_hdmi->hdmi_reg); > @@ -2215,8 +2215,8 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, > int bpc) > { > struct drm_i915_private *dev_priv = > - to_i915(crtc_state->base.crtc->dev); > - struct drm_atomic_state *state = crtc_state->base.state; > + to_i915(crtc_state->uapi.crtc->dev); > + struct drm_atomic_state *state = crtc_state->uapi.state; > struct drm_connector_state *connector_state; > struct drm_connector *connector; > const struct drm_display_mode *adjusted_mode = > @@ -2245,7 +2245,7 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, > for_each_new_connector_in_state(state, connector, connector_state, i) { > const struct drm_display_info *info = &connector->display_info; > > - if (connector_state->crtc != crtc_state->base.crtc) > + if (connector_state->crtc != crtc_state->uapi.crtc) > continue; > > if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { > @@ -2286,7 +2286,7 @@ static bool > intel_hdmi_ycbcr420_config(struct drm_connector *connector, > struct intel_crtc_state *config) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(config->uapi.crtc); > > if (!connector->ycbcr_420_allowed) { > DRM_ERROR("Platform doesn't support YCBCR420 output\n"); > diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c > index f17d6e02460f..ca4ebb0f2230 100644 > --- a/drivers/gpu/drm/i915/display/intel_lvds.c > +++ b/drivers/gpu/drm/i915/display/intel_lvds.c > @@ -230,7 +230,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder, > { > struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > enum pipe pipe = crtc->pipe; > u32 temp; > @@ -393,7 +393,7 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder, > struct intel_connector *intel_connector = > lvds_encoder->attached_connector; > struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > unsigned int lvds_bpp; > > /* Should never happen!! */ > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c > index 5e3fd37d9471..6f3eaae3761f 100644 > --- a/drivers/gpu/drm/i915/display/intel_panel.c > +++ b/drivers/gpu/drm/i915/display/intel_panel.c > @@ -1047,7 +1047,7 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, > struct intel_connector *connector = to_intel_connector(conn_state->connector); > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; > u32 ctl, ctl2; > > ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); > @@ -1077,7 +1077,7 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, > struct intel_connector *connector = to_intel_connector(conn_state->connector); > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; > u32 pwm_ctl, val; > > /* Controller 1 uses the utility pin. */ > @@ -1189,7 +1189,7 @@ void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, > struct intel_connector *connector = to_intel_connector(conn_state->connector); > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; > + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; > > if (!panel->backlight.present) > return; > diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c > index fc602533a602..2746512f4466 100644 > --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c > +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c > @@ -309,13 +309,13 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable) > goto put_state; > } > > - pipe_config->base.mode_changed = pipe_config->has_psr; > + pipe_config->uapi.mode_changed = pipe_config->has_psr; > pipe_config->crc_enabled = enable; > > if (IS_HASWELL(dev_priv) && > pipe_config->hw.active && crtc->pipe == PIPE_A && > pipe_config->cpu_transcoder == TRANSCODER_EDP) > - pipe_config->base.mode_changed = true; > + pipe_config->uapi.mode_changed = true; > > ret = drm_atomic_commit(state); > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 347004981cff..9c76ad5383b9 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -812,7 +812,7 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, > > dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state); > dev_priv->psr.busy_frontbuffer_bits = 0; > - dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; > + dev_priv->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; > dev_priv->psr.dc3co_enabled = !!crtc_state->dc3co_exitline; > dev_priv->psr.dc3co_exit_delay = intel_get_frame_time_us(crtc_state); > dev_priv->psr.transcoder = crtc_state->cpu_transcoder; > @@ -1059,7 +1059,7 @@ void intel_psr_update(struct intel_dp *intel_dp, > int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, > u32 *out_value) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > > if (!dev_priv->psr.enabled || !new_crtc_state->has_psr) > @@ -1141,7 +1141,7 @@ static int intel_psr_fastset_force(struct drm_i915_private *dev_priv) > > if (intel_crtc_state->hw.active && intel_crtc_state->has_psr) { > /* Mark mode as changed to trigger a pipe->update() */ > - intel_crtc_state->base.mode_changed = true; > + intel_crtc_state->uapi.mode_changed = true; > break; > } > } > diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c > index 97ae8cc1314e..1047357c15c4 100644 > --- a/drivers/gpu/drm/i915/display/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c > @@ -1429,7 +1429,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; > const struct intel_sdvo_connector_state *sdvo_state = > to_intel_sdvo_connector_state(conn_state); > @@ -1723,7 +1723,7 @@ static void intel_disable_sdvo(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_sdvo *intel_sdvo = to_sdvo(encoder); > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > u32 temp; > > if (old_crtc_state->has_audio) > @@ -1785,7 +1785,7 @@ static void intel_enable_sdvo(struct intel_encoder *encoder, > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_sdvo *intel_sdvo = to_sdvo(encoder); > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > u32 temp; > bool input1, input2; > int i; > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c > index ef0ca7c6d11f..fa687c05b1ed 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -81,7 +81,7 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, > */ > void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode; > long timeout = msecs_to_jiffies_timeout(1); > @@ -190,7 +190,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) > */ > void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > enum pipe pipe = crtc->pipe; > int scanline_end = intel_get_crtc_scanline(crtc); > u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc); > @@ -203,14 +203,15 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > * Would be slightly nice to just grab the vblank count and arm the > * event outside of the critical section - the spinlock might spin for a > * while ... */ > - if (new_crtc_state->base.event) { > + if (new_crtc_state->uapi.event) { > WARN_ON(drm_crtc_vblank_get(&crtc->base) != 0); > > spin_lock(&crtc->base.dev->event_lock); > - drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event); > + drm_crtc_arm_vblank_event(&crtc->base, > + new_crtc_state->uapi.event); > spin_unlock(&crtc->base.dev->event_lock); > > - new_crtc_state->base.event = NULL; > + new_crtc_state->uapi.event = NULL; > } > > local_irq_enable(); > @@ -1586,7 +1587,7 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state, > } > > ret = drm_atomic_helper_check_plane_state(&plane_state->base, > - &crtc_state->base, > + &crtc_state->uapi, > min_scale, max_scale, > true, true); > if (ret) > @@ -1643,7 +1644,7 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, > return ret; > > ret = drm_atomic_helper_check_plane_state(&plane_state->base, > - &crtc_state->base, > + &crtc_state->uapi, > DRM_PLANE_HELPER_NO_SCALING, > DRM_PLANE_HELPER_NO_SCALING, > true, true); > @@ -1808,7 +1809,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, > } > > ret = drm_atomic_helper_check_plane_state(&plane_state->base, > - &crtc_state->base, > + &crtc_state->uapi, > min_scale, max_scale, > true, true); > if (ret) > diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c > index e800d45b813d..4499d402c316 100644 > --- a/drivers/gpu/drm/i915/display/intel_tv.c > +++ b/drivers/gpu/drm/i915/display/intel_tv.c > @@ -924,7 +924,7 @@ intel_enable_tv(struct intel_encoder *encoder, > > /* Prevents vblank waits from timing out in intel_tv_detect_type() */ > intel_wait_for_vblank(dev_priv, > - to_intel_crtc(pipe_config->base.crtc)->pipe); > + to_intel_crtc(pipe_config->uapi.crtc)->pipe); > > I915_WRITE(TV_CTL, I915_READ(TV_CTL) | TV_ENC_ENABLE); > } > @@ -1417,7 +1417,7 @@ static void intel_tv_pre_enable(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_tv *intel_tv = enc_to_tv(encoder); > const struct intel_tv_connector_state *tv_conn_state = > to_intel_tv_connector_state(conn_state); > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 6a338a83aaed..38c181499505 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -459,7 +459,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp, > enum intel_display_power_domain > intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *i915 = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > /* > @@ -483,7 +483,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) > static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg; > enum pipe pipe = crtc->pipe; > @@ -902,7 +902,7 @@ static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder, > void intel_dsc_enable(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum pipe pipe = crtc->pipe; > i915_reg_t dss_ctl1_reg, dss_ctl2_reg; > @@ -938,7 +938,7 @@ void intel_dsc_enable(struct intel_encoder *encoder, > > void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > enum pipe pipe = crtc->pipe; > i915_reg_t dss_ctl1_reg, dss_ctl2_reg; > diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c > index 3bf838279fc2..16f93d1e71e5 100644 > --- a/drivers/gpu/drm/i915/display/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c > @@ -261,7 +261,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder, > struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, > base); > struct intel_connector *intel_connector = intel_dsi->attached_connector; > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; > struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > int ret; > @@ -624,7 +624,7 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > enum port port; > > @@ -746,7 +746,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, > const struct drm_connector_state *conn_state) > { > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > - struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_crtc *crtc = pipe_config->uapi.crtc; > struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > enum pipe pipe = intel_crtc->pipe; > @@ -1034,7 +1034,7 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder, > struct drm_display_mode *adjusted_mode = > &pipe_config->hw.adjusted_mode; > struct drm_display_mode *adjusted_mode_sw; > - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > unsigned int lane_count = intel_dsi->lane_count; > unsigned int bpp, fmt; > @@ -1315,7 +1315,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder, > struct drm_encoder *encoder = &intel_encoder->base; > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); > const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; > enum port port; > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 51e83da21738..bdace2f14cde 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4222,7 +4222,7 @@ static int i915_drrs_ctl_set(void *data, u64 val) > !crtc_state->has_drrs) > goto out; > > - commit = crtc_state->base.commit; > + commit = crtc_state->uapi.commit; > if (commit) { > ret = wait_for_completion_interruptible(&commit->hw_done); > if (ret) > @@ -4234,7 +4234,7 @@ static int i915_drrs_ctl_set(void *data, u64 val) > struct intel_encoder *encoder; > struct intel_dp *intel_dp; > > - if (!(crtc_state->base.connector_mask & > + if (!(crtc_state->uapi.connector_mask & > drm_connector_mask(connector))) > continue; > > @@ -4293,7 +4293,7 @@ i915_fifo_underrun_reset_write(struct file *filp, > return ret; > > crtc_state = to_intel_crtc_state(intel_crtc->base.state); > - commit = crtc_state->base.commit; > + commit = crtc_state->uapi.commit; > if (commit) { > ret = wait_for_completion_interruptible(&commit->hw_done); > if (!ret) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 9671ff29c25f..76f8eea15ddf 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -464,7 +464,7 @@ static const int pessimal_latency_ns = 5000; > > static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; > enum pipe pipe = crtc->pipe; > @@ -1144,7 +1144,7 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state, > static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, > int level, enum plane_id plane_id, u16 value) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > bool dirty = false; > > for (; level < intel_wm_num_levels(dev_priv); level++) { > @@ -1160,7 +1160,7 @@ static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, > static bool g4x_raw_fbc_wm_set(struct intel_crtc_state *crtc_state, > int level, u16 value) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > bool dirty = false; > > /* NORMAL level doesn't have an FBC watermark */ > @@ -1262,7 +1262,7 @@ static bool g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, > static bool g4x_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state, > int level) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > > if (level > dev_priv->wm.max_level) > return false; > @@ -1300,9 +1300,9 @@ static void g4x_invalidate_wms(struct intel_crtc *crtc, > > static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_atomic_state *state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal; > int num_active_planes = hweight8(crtc_state->active_planes & > ~BIT(PLANE_CURSOR)); > @@ -1389,17 +1389,17 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state) > > static int g4x_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate; > const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal; > struct intel_atomic_state *intel_state = > - to_intel_atomic_state(new_crtc_state->base.state); > + to_intel_atomic_state(new_crtc_state->uapi.state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(intel_state, crtc); > const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal; > enum plane_id plane_id; > > - if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { > + if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) { > *intermediate = *optimal; > > intermediate->cxsr = false; > @@ -1531,8 +1531,8 @@ static void g4x_program_watermarks(struct drm_i915_private *dev_priv) > static void g4x_initial_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > mutex_lock(&dev_priv->wm.wm_mutex); > crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; > @@ -1543,8 +1543,8 @@ static void g4x_initial_watermarks(struct intel_atomic_state *state, > static void g4x_optimize_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > if (!crtc_state->wm.need_postvbl_update) > return; > @@ -1631,7 +1631,7 @@ static bool vlv_need_sprite0_fifo_workaround(unsigned int active_planes) > > static int vlv_compute_fifo(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > const struct g4x_pipe_wm *raw = > &crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2]; > struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; > @@ -1743,7 +1743,7 @@ static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size) > static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state, > int level, enum plane_id plane_id, u16 value) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > int num_levels = intel_wm_num_levels(dev_priv); > bool dirty = false; > > @@ -1818,16 +1818,16 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state, > > static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_atomic_state *state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; > const struct vlv_fifo_state *fifo_state = > &crtc_state->wm.vlv.fifo_state; > int num_active_planes = hweight8(crtc_state->active_planes & > ~BIT(PLANE_CURSOR)); > - bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->base); > + bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi); > const struct intel_plane_state *old_plane_state; > const struct intel_plane_state *new_plane_state; > struct intel_plane *plane; > @@ -1926,7 +1926,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state) > static void vlv_atomic_update_fifo(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_uncore *uncore = &dev_priv->uncore; > const struct vlv_fifo_state *fifo_state = > @@ -2022,17 +2022,17 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state, > > static int vlv_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; > const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; > struct intel_atomic_state *intel_state = > - to_intel_atomic_state(new_crtc_state->base.state); > + to_intel_atomic_state(new_crtc_state->uapi.state); > const struct intel_crtc_state *old_crtc_state = > intel_atomic_get_old_crtc_state(intel_state, crtc); > const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal; > int level; > > - if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { > + if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) { > *intermediate = *optimal; > > intermediate->cxsr = false; > @@ -2150,8 +2150,8 @@ static void vlv_program_watermarks(struct drm_i915_private *dev_priv) > static void vlv_initial_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > mutex_lock(&dev_priv->wm.wm_mutex); > crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; > @@ -2162,8 +2162,8 @@ static void vlv_initial_watermarks(struct intel_atomic_state *state, > static void vlv_optimize_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > if (!crtc_state->wm.need_postvbl_update) > return; > @@ -2767,7 +2767,7 @@ static u32 > hsw_compute_linetime_wm(const struct intel_crtc_state *crtc_state) > { > const struct intel_atomic_state *intel_state = > - to_intel_atomic_state(crtc_state->base.state); > + to_intel_atomic_state(crtc_state->uapi.state); > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > u32 linetime, ips_linetime; > @@ -3082,8 +3082,8 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv, > /* Compute new watermarks for the pipe */ > static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct intel_pipe_wm *pipe_wm; > struct intel_plane *plane; > const struct intel_plane_state *plane_state; > @@ -3161,11 +3161,11 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state) > */ > static int ilk_compute_intermediate_wm(struct intel_crtc_state *newstate) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(newstate->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(newstate->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; > struct intel_atomic_state *intel_state = > - to_intel_atomic_state(newstate->base.state); > + to_intel_atomic_state(newstate->uapi.state); > const struct intel_crtc_state *oldstate = > intel_atomic_get_old_crtc_state(intel_state, intel_crtc); > const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal; > @@ -3177,7 +3177,7 @@ static int ilk_compute_intermediate_wm(struct intel_crtc_state *newstate) > * and after the vblank. > */ > *a = newstate->wm.ilk.optimal; > - if (!newstate->hw.active || drm_atomic_crtc_needs_modeset(&newstate->base) || > + if (!newstate->hw.active || drm_atomic_crtc_needs_modeset(&newstate->uapi) || > intel_state->skip_intermediate_wm) > return 0; > > @@ -3858,9 +3858,9 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, > struct skl_ddb_entry *alloc, /* out */ > int *num_active /* out */) > { > - struct drm_atomic_state *state = crtc_state->base.state; > + struct drm_atomic_state *state = crtc_state->uapi.state; > struct intel_atomic_state *intel_state = to_intel_atomic_state(state); > - struct drm_crtc *for_crtc = crtc_state->base.crtc; > + struct drm_crtc *for_crtc = crtc_state->uapi.crtc; > const struct intel_crtc *crtc; > u32 pipe_width = 0, total_width = 0, width_before_pipe = 0; > enum pipe for_pipe = to_intel_crtc(for_crtc)->pipe; > @@ -3941,7 +3941,7 @@ static unsigned int > skl_cursor_allocation(const struct intel_crtc_state *crtc_state, > int num_active) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > int level, max_level = ilk_wm_max_level(dev_priv); > struct skl_wm_level wm = {}; > int ret, min_ddb_alloc = 0; > @@ -4131,7 +4131,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, > struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > - struct drm_atomic_state *state = crtc_state->base.state; > + struct drm_atomic_state *state = crtc_state->uapi.state; > const struct intel_plane_state *plane_state; > struct intel_plane *plane; > int crtc_clock, dotclk; > @@ -4232,7 +4232,7 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state, > u64 *plane_data_rate, > u64 *uv_plane_data_rate) > { > - struct drm_atomic_state *state = crtc_state->base.state; > + struct drm_atomic_state *state = crtc_state->uapi.state; > struct intel_plane *plane; > const struct intel_plane_state *plane_state; > u64 total_data_rate = 0; > @@ -4267,7 +4267,7 @@ icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state, > const struct intel_plane_state *plane_state; > u64 total_data_rate = 0; > > - if (WARN_ON(!crtc_state->base.state)) > + if (WARN_ON(!crtc_state->uapi.state)) > return 0; > > /* Calculate and cache data rate for each plane */ > @@ -4311,8 +4311,8 @@ static int > skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, > struct skl_ddb_allocation *ddb /* out */) > { > - struct drm_atomic_state *state = crtc_state->base.state; > - struct drm_crtc *crtc = crtc_state->base.crtc; > + struct drm_atomic_state *state = crtc_state->uapi.state; > + struct drm_crtc *crtc = crtc_state->uapi.crtc; > struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > struct skl_ddb_entry *alloc = &crtc_state->wm.skl.ddb; > @@ -4619,7 +4619,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state, > u32 plane_pixel_rate, struct skl_wm_params *wp, > int color_plane) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > u32 interm_pbpl; > > @@ -4740,7 +4740,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state, > const struct skl_wm_level *result_prev, > struct skl_wm_level *result /* out */) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > u32 latency = dev_priv->wm.skl_latency[level]; > uint_fixed_16_16_t method1, method2; > uint_fixed_16_16_t selected_result; > @@ -4864,7 +4864,7 @@ skl_compute_wm_levels(const struct intel_crtc_state *crtc_state, > const struct skl_wm_params *wm_params, > struct skl_wm_level *levels) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > int level, max_level = ilk_wm_max_level(dev_priv); > struct skl_wm_level *result_prev = &levels[0]; > > @@ -4881,7 +4881,7 @@ skl_compute_wm_levels(const struct intel_crtc_state *crtc_state, > static u32 > skl_compute_linetime_wm(const struct intel_crtc_state *crtc_state) > { > - struct drm_atomic_state *state = crtc_state->base.state; > + struct drm_atomic_state *state = crtc_state->uapi.state; > struct drm_i915_private *dev_priv = to_i915(state->dev); > uint_fixed_16_16_t linetime_us; > u32 linetime_wm; > @@ -4900,7 +4900,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *crtc_state, > const struct skl_wm_params *wp, > struct skl_plane_wm *wm) > { > - struct drm_device *dev = crtc_state->base.crtc->dev; > + struct drm_device *dev = crtc_state->uapi.crtc->dev; > const struct drm_i915_private *dev_priv = to_i915(dev); > u16 trans_min, trans_y_tile_min; > const u16 trans_amount = 10; /* This is configurable amount */ > @@ -5060,7 +5060,7 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, > > static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; > struct intel_plane *plane; > const struct intel_plane_state *plane_state; > @@ -5250,8 +5250,8 @@ static int > skl_ddb_add_affected_planes(const struct intel_crtc_state *old_crtc_state, > struct intel_crtc_state *new_crtc_state) > { > - struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->base.state); > - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); > + struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->uapi.state); > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_plane *plane; > > @@ -5552,7 +5552,7 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state, > * power well the hardware state will go out of sync > * with the software state. > */ > - if (!drm_atomic_crtc_needs_modeset(&new_crtc_state->base) && > + if (!drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi) && > skl_plane_wm_equals(dev_priv, > &old_crtc_state->wm.skl.optimal.planes[plane_id], > &new_crtc_state->wm.skl.optimal.planes[plane_id])) > @@ -5620,7 +5620,7 @@ skl_compute_wm(struct intel_atomic_state *state) > static void skl_atomic_update_crtc_wm(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *dev_priv = to_i915(state->base.dev); > struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; > enum pipe pipe = crtc->pipe; > @@ -5634,7 +5634,7 @@ static void skl_atomic_update_crtc_wm(struct intel_atomic_state *state, > static void skl_initial_wm(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_device *dev = intel_crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct skl_ddb_values *results = &state->wm_results; > @@ -5644,7 +5644,7 @@ static void skl_initial_wm(struct intel_atomic_state *state, > > mutex_lock(&dev_priv->wm.wm_mutex); > > - if (crtc_state->base.active_changed) > + if (crtc_state->uapi.active_changed) > skl_atomic_update_crtc_wm(state, crtc_state); > > mutex_unlock(&dev_priv->wm.wm_mutex); > @@ -5703,8 +5703,8 @@ static void ilk_program_watermarks(struct drm_i915_private *dev_priv) > static void ilk_initial_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > mutex_lock(&dev_priv->wm.wm_mutex); > crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate; > @@ -5715,8 +5715,8 @@ static void ilk_initial_watermarks(struct intel_atomic_state *state, > static void ilk_optimize_watermarks(struct intel_atomic_state *state, > struct intel_crtc_state *crtc_state) > { > - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > if (!crtc_state->wm.need_postvbl_update) > return; > -- > 2.23.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 4ec493e4755b..0e24b8e257e5 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -625,7 +625,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); enum pipe pipe = intel_crtc->pipe; u32 tmp; enum port port; @@ -1242,7 +1242,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ @@ -1265,7 +1265,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, base); struct intel_connector *intel_connector = intel_dsi->attached_connector; - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; struct drm_display_mode *adjusted_mode = diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index 2cdc92897abd..7cf13b9c7d38 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -193,7 +193,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) if (!crtc_state) return NULL; - __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base); + __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi); crtc_state->update_pipe = false; crtc_state->disable_lp_wm = false; @@ -205,7 +205,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) crtc_state->fb_bits = 0; crtc_state->update_planes = 0; - return &crtc_state->base; + return &crtc_state->uapi; } /** @@ -222,7 +222,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc, { struct intel_crtc_state *crtc_state = to_intel_crtc_state(state); - __drm_atomic_helper_crtc_destroy_state(&crtc_state->base); + __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi); kfree(crtc_state); } @@ -319,7 +319,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, { struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; - struct drm_atomic_state *drm_state = crtc_state->base.state; + struct drm_atomic_state *drm_state = crtc_state->uapi.state; struct intel_atomic_state *state = to_intel_atomic_state(drm_state); int num_scalers_need; int i; diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 847f9c4ecbbd..d92c185d4b4a 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -268,7 +268,7 @@ void intel_update_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); trace_intel_update_plane(&plane->base, crtc); plane->update_plane(plane, crtc_state, plane_state); @@ -278,7 +278,7 @@ void intel_update_slave(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); trace_intel_update_plane(&plane->base, crtc); plane->update_slave(plane, crtc_state, plane_state); @@ -287,7 +287,7 @@ void intel_update_slave(struct intel_plane *plane, void intel_disable_plane(struct intel_plane *plane, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); trace_intel_disable_plane(&plane->base, crtc); plane->disable_plane(plane, crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c index 6a58e8ad86f8..5680eed9c71f 100644 --- a/drivers/gpu/drm/i915/display/intel_audio.c +++ b/drivers/gpu/drm/i915/display/intel_audio.c @@ -554,7 +554,7 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder, const struct drm_connector_state *old_conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; enum port port = encoder->port; u32 tmp, eldv; @@ -601,7 +601,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_connector *connector = conn_state->connector; enum pipe pipe = crtc->pipe; enum port port = encoder->port; @@ -691,7 +691,7 @@ void intel_audio_codec_enable(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct i915_audio_component *acomp = dev_priv->audio_component; - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_connector *connector = conn_state->connector; const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; @@ -752,7 +752,7 @@ void intel_audio_codec_disable(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct i915_audio_component *acomp = dev_priv->audio_component; - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); enum port port = encoder->port; enum pipe pipe = crtc->pipe; diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 22e83f857de8..3f6e29f61323 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -297,7 +297,7 @@ static unsigned int intel_bw_crtc_num_active_planes(const struct intel_crtc_stat static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); unsigned int data_rate = 0; enum plane_id plane_id; @@ -318,7 +318,7 @@ static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_ void intel_bw_crtc_update(struct intel_bw_state *bw_state, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); bw_state->data_rate[crtc->pipe] = intel_bw_crtc_data_rate(crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index fd1ed0fb8748..931f19dbd4dd 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1902,7 +1902,7 @@ intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv, static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int pixel_rate = crtc_state->pixel_rate; if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) @@ -1921,7 +1921,7 @@ static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state) int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = - to_i915(crtc_state->base.crtc->dev); + to_i915(crtc_state->uapi.crtc->dev); int min_cdclk; if (!crtc_state->hw.enable) @@ -2261,10 +2261,10 @@ static int intel_modeset_all_pipes(struct intel_atomic_state *state) return PTR_ERR(crtc_state); if (!crtc_state->hw.active || - drm_atomic_crtc_needs_modeset(&crtc_state->base)) + drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) continue; - crtc_state->base.mode_changed = true; + crtc_state->uapi.mode_changed = true; ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base); @@ -2330,7 +2330,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc_state = intel_atomic_get_new_crtc_state(state, crtc); if (crtc_state && - drm_atomic_crtc_needs_modeset(&crtc_state->base)) + drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) pipe = INVALID_PIPE; } else { pipe = INVALID_PIPE; diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 65e1b18bd7e3..52712bb9ed15 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -205,7 +205,7 @@ static void icl_update_output_csc(struct intel_crtc *crtc, static bool ilk_csc_limited_range(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); /* * FIXME if there's a gamma LUT after the CSC, we should @@ -270,7 +270,7 @@ static void ilk_csc_convert_ctm(const struct intel_crtc_state *crtc_state, static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); bool limited_color_range = ilk_csc_limited_range(crtc_state); @@ -309,7 +309,7 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state) static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (crtc_state->hw.ctm) { @@ -338,7 +338,7 @@ static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state) */ static void cherryview_load_csc_matrix(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -404,7 +404,7 @@ static u32 ilk_lut_10(const struct drm_color_lut *color) static void i9xx_load_luts_internal(const struct intel_crtc_state *crtc_state, const struct drm_property_blob *blob) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; int i; @@ -440,7 +440,7 @@ static void i9xx_load_luts(const struct intel_crtc_state *crtc_state) static void i9xx_color_commit(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 val; @@ -453,7 +453,7 @@ static void i9xx_color_commit(const struct intel_crtc_state *crtc_state) static void ilk_color_commit(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 val; @@ -468,7 +468,7 @@ static void ilk_color_commit(const struct intel_crtc_state *crtc_state) static void hsw_color_commit(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); I915_WRITE(GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode); @@ -478,7 +478,7 @@ static void hsw_color_commit(const struct intel_crtc_state *crtc_state) static void skl_color_commit(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 val = 0; @@ -524,7 +524,7 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc, static void i965_load_luts(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) @@ -547,7 +547,7 @@ static void ilk_load_lut_10(struct intel_crtc *crtc, static void ilk_load_luts(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) @@ -654,7 +654,7 @@ static void ivb_load_lut_ext_max(struct intel_crtc *crtc) static void ivb_load_luts(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; @@ -677,7 +677,7 @@ static void ivb_load_luts(const struct intel_crtc_state *crtc_state) static void bdw_load_luts(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; @@ -700,7 +700,7 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state) static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; @@ -739,7 +739,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; @@ -767,7 +767,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat static void glk_load_luts(const struct intel_crtc_state *crtc_state) { const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); /* * On GLK+ both pipe CSC and degamma LUT are controlled @@ -808,7 +808,7 @@ static void icl_load_gcmax(const struct intel_crtc_state *crtc_state, const struct drm_color_lut *color) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_dsb *dsb = intel_dsb_get(crtc); enum pipe pipe = crtc->pipe; @@ -822,7 +822,7 @@ icl_load_gcmax(const struct intel_crtc_state *crtc_state, static void icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *blob = crtc_state->hw.gamma_lut; const struct drm_color_lut *lut = blob->data; struct intel_dsb *dsb = intel_dsb_get(crtc); @@ -854,7 +854,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state) static void icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *blob = crtc_state->hw.gamma_lut; const struct drm_color_lut *lut = blob->data; const struct drm_color_lut *entry; @@ -911,7 +911,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state) static void icl_load_luts(const struct intel_crtc_state *crtc_state) { const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_dsb *dsb = intel_dsb_get(crtc); if (crtc_state->hw.degamma_lut) @@ -990,7 +990,7 @@ static void chv_load_cgm_gamma(struct intel_crtc *crtc, static void chv_load_luts(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; @@ -1010,28 +1010,28 @@ static void chv_load_luts(const struct intel_crtc_state *crtc_state) void intel_color_load_luts(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); dev_priv->display.load_luts(crtc_state); } void intel_color_commit(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); dev_priv->display.color_commit(crtc_state); } int intel_color_check(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); return dev_priv->display.color_check(crtc_state); } void intel_color_get_config(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (dev_priv->display.read_luts) dev_priv->display.read_luts(crtc_state); @@ -1055,16 +1055,16 @@ static bool need_plane_update(struct intel_plane *plane, static int intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_atomic_state *state = - to_intel_atomic_state(new_crtc_state->base.state); + to_intel_atomic_state(new_crtc_state->uapi.state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct intel_plane *plane; if (!new_crtc_state->hw.active || - drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) + drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) return 0; if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable && @@ -1107,7 +1107,7 @@ static int check_lut_size(const struct drm_property_blob *lut, int expected) static int check_luts(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut; const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut; int gamma_length, degamma_length; @@ -1480,7 +1480,7 @@ static int glk_gamma_precision(const struct intel_crtc_state *crtc_state) int intel_color_get_gamma_bit_precision(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (HAS_GMCH(dev_priv)) { @@ -1586,7 +1586,7 @@ static u32 intel_color_lut_pack(u32 val, u32 bit_precision) static struct drm_property_blob * i9xx_read_lut_8(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; @@ -1629,7 +1629,7 @@ static void i9xx_read_luts(struct intel_crtc_state *crtc_state) static struct drm_property_blob * i965_read_lut_10p6(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; @@ -1681,7 +1681,7 @@ static void i965_read_luts(struct intel_crtc_state *crtc_state) static struct drm_property_blob * chv_read_cgm_lut(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; @@ -1723,7 +1723,7 @@ static void chv_read_luts(struct intel_crtc_state *crtc_state) static struct drm_property_blob * ilk_read_lut_10(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; @@ -1770,7 +1770,7 @@ static void ilk_read_luts(struct intel_crtc_state *crtc_state) static struct drm_property_blob * glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); int hw_lut_size = ivb_lut_10_size(prec_index); enum pipe pipe = crtc->pipe; diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index 399abc3d521e..164af1936d38 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -161,7 +161,7 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_crt *crt = intel_encoder_to_crt(encoder); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; u32 adpa; @@ -271,7 +271,7 @@ static void hsw_pre_enable_crt(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; WARN_ON(!crtc_state->has_pch_encoder); @@ -288,7 +288,7 @@ static void hsw_enable_crt(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; WARN_ON(!crtc_state->has_pch_encoder); diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index c8639b92a6da..1b9f68d4c566 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1744,7 +1744,7 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder, void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 temp; @@ -1806,7 +1806,7 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, bool state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 temp; @@ -1828,7 +1828,7 @@ void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, static u32 intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -1915,7 +1915,7 @@ intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state) void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 temp; @@ -1931,7 +1931,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) static void intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 temp; @@ -1943,7 +1943,7 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state) void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); @@ -2241,7 +2241,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder, void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); enum port port = encoder->port; @@ -2259,7 +2259,7 @@ void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state) void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; if (cpu_transcoder != TRANSCODER_EDP) { @@ -3337,7 +3337,7 @@ static void intel_ddi_disable_fec_state(struct intel_encoder *encoder, static void tgl_clear_psr2_transcoder_exitline(const struct intel_crtc_state *cstate) { - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); u32 val; if (!cstate->dc3co_exitline) @@ -3352,7 +3352,7 @@ static void tgl_set_psr2_transcoder_exitline(const struct intel_crtc_state *cstate) { u32 val, exit_scanlines; - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); if (!cstate->dc3co_exitline) return; @@ -3370,7 +3370,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *cstate) { u32 exit_scanlines; - struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(cstate->uapi.crtc->dev); u32 crtc_vdisplay = cstate->hw.adjusted_mode.crtc_vdisplay; cstate->dc3co_exitline = 0; @@ -3379,7 +3379,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, return; /* B.Specs:49196 DC3CO only works with pipeA and DDIA.*/ - if (to_intel_crtc(cstate->base.crtc)->pipe != PIPE_A || + if (to_intel_crtc(cstate->uapi.crtc)->pipe != PIPE_A || encoder->port != PORT_A) return; @@ -3403,7 +3403,7 @@ static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder, static void tgl_dc3co_exitline_get_config(struct intel_crtc_state *crtc_state) { u32 val; - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (INTEL_GEN(dev_priv) < 12) return; @@ -3649,7 +3649,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -4206,7 +4206,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; u32 temp, flags = 0; @@ -4373,7 +4373,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) { - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum port port = encoder->port; int ret; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3106aaf55f17..06c593d56d92 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -516,7 +516,7 @@ icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, static bool needs_modeset(const struct intel_crtc_state *state) { - return drm_atomic_crtc_needs_modeset(&state->base); + return drm_atomic_crtc_needs_modeset(&state->uapi); } /* @@ -630,7 +630,7 @@ i9xx_select_p2_div(const struct intel_limit *limit, const struct intel_crtc_state *crtc_state, int target) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { /* @@ -666,7 +666,7 @@ i9xx_find_best_dpll(const struct intel_limit *limit, int target, int refclk, struct dpll *match_clock, struct dpll *best_clock) { - struct drm_device *dev = crtc_state->base.crtc->dev; + struct drm_device *dev = crtc_state->uapi.crtc->dev; struct dpll clock; int err = target; @@ -724,7 +724,7 @@ pnv_find_best_dpll(const struct intel_limit *limit, int target, int refclk, struct dpll *match_clock, struct dpll *best_clock) { - struct drm_device *dev = crtc_state->base.crtc->dev; + struct drm_device *dev = crtc_state->uapi.crtc->dev; struct dpll clock; int err = target; @@ -780,7 +780,7 @@ g4x_find_best_dpll(const struct intel_limit *limit, int target, int refclk, struct dpll *match_clock, struct dpll *best_clock) { - struct drm_device *dev = crtc_state->base.crtc->dev; + struct drm_device *dev = crtc_state->uapi.crtc->dev; struct dpll clock; int max_n; bool found = false; @@ -874,7 +874,7 @@ vlv_find_best_dpll(const struct intel_limit *limit, int target, int refclk, struct dpll *match_clock, struct dpll *best_clock) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct dpll clock; unsigned int bestppm = 1000000; @@ -934,7 +934,7 @@ chv_find_best_dpll(const struct intel_limit *limit, int target, int refclk, struct dpll *match_clock, struct dpll *best_clock) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; unsigned int best_error_ppm; struct dpll clock; @@ -1067,7 +1067,7 @@ static void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc) static void intel_wait_for_pipe_off(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (INTEL_GEN(dev_priv) >= 4) { @@ -1526,7 +1526,7 @@ static void i9xx_enable_pll(struct intel_crtc *crtc, static void i9xx_disable_pll(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -1617,7 +1617,7 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv, static void ironlake_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; i915_reg_t reg; @@ -1761,7 +1761,7 @@ enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc) static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); /* * On i965gm the hardware frame counter reads @@ -1781,7 +1781,7 @@ static u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); drm_crtc_set_max_vblank_count(&crtc->base, intel_crtc_max_vblank_count(crtc_state)); @@ -1790,7 +1790,7 @@ static void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; enum pipe pipe = crtc->pipe; @@ -1848,7 +1848,7 @@ static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) static void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; enum pipe pipe = crtc->pipe; @@ -3103,14 +3103,14 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, plane_state->base.visible = visible; if (visible) - crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); + crtc_state->uapi.plane_mask |= drm_plane_mask(&plane->base); else - crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); + crtc_state->uapi.plane_mask &= ~drm_plane_mask(&plane->base); } static void fixup_active_planes(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); struct drm_plane *plane; /* @@ -3121,7 +3121,7 @@ static void fixup_active_planes(struct intel_crtc_state *crtc_state) crtc_state->active_planes = 0; drm_for_each_plane_mask(plane, &dev_priv->drm, - crtc_state->base.plane_mask) + crtc_state->uapi.plane_mask) crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); } @@ -3592,7 +3592,7 @@ i9xx_plane_max_stride(struct intel_plane *plane, static u32 i9xx_plane_ctl_crtc(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 dspcntr = 0; @@ -3745,7 +3745,7 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state, return ret; ret = drm_atomic_helper_check_plane_state(&plane_state->base, - &crtc_state->base, + &crtc_state->uapi, DRM_PLANE_HELPER_NO_SCALING, DRM_PLANE_HELPER_NO_SCALING, i9xx_plane_has_windowing(plane), @@ -3921,7 +3921,7 @@ static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id) */ static void skl_detach_scalers(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; int i; @@ -4116,7 +4116,7 @@ static u32 cnl_plane_ctl_flip(unsigned int reflect) u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); u32 plane_ctl = 0; if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) @@ -4172,7 +4172,7 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); u32 plane_color_ctl = 0; if (INTEL_GEN(dev_priv) >= 11) @@ -4788,7 +4788,7 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc, static void ironlake_fdi_pll_enable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); enum pipe pipe = intel_crtc->pipe; i915_reg_t reg; @@ -4949,7 +4949,7 @@ void lpt_disable_iclkip(struct drm_i915_private *dev_priv) /* Program iCLKIP clock to the desired frequency */ static void lpt_program_iclkip(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); int clock = crtc_state->hw.adjusted_mode.crtc_clock; u32 divsel, phaseinc, auxdiv, phasedir = 0; @@ -5065,7 +5065,7 @@ int lpt_get_iclkip(struct drm_i915_private *dev_priv) static void ironlake_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state, enum pipe pch_transcoder) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -5108,7 +5108,7 @@ static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool e static void ivybridge_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); switch (crtc->pipe) { @@ -5138,7 +5138,7 @@ static struct intel_encoder * intel_get_crtc_new_encoder(const struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_connector_state *connector_state; const struct drm_connector *connector; struct intel_encoder *encoder = NULL; @@ -5170,7 +5170,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state, static void ironlake_pch_enable(const struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); enum pipe pipe = crtc->pipe; @@ -5254,7 +5254,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state, static void lpt_pch_enable(const struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -5371,7 +5371,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; struct intel_crtc *intel_crtc = - to_intel_crtc(crtc_state->base.crtc); + to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; @@ -5568,7 +5568,7 @@ static void skylake_scaler_disable(struct intel_crtc *crtc) static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; const struct intel_crtc_scaler_state *scaler_state = @@ -5605,7 +5605,7 @@ static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -5626,7 +5626,7 @@ static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state) void hsw_enable_ips(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); @@ -5662,7 +5662,7 @@ void hsw_enable_ips(const struct intel_crtc_state *crtc_state) void hsw_disable_ips(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); @@ -5767,7 +5767,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc) static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (!old_crtc_state->ips_enabled) @@ -5783,7 +5783,7 @@ static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_s * Disable IPS before we program the LUT. */ if (IS_HASWELL(dev_priv) && - (new_crtc_state->base.color_mgmt_changed || + (new_crtc_state->uapi.color_mgmt_changed || new_crtc_state->update_pipe) && new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) return true; @@ -5794,7 +5794,7 @@ static bool hsw_pre_update_disable_ips(const struct intel_crtc_state *old_crtc_s static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (!new_crtc_state->ips_enabled) @@ -5810,7 +5810,7 @@ static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s * Re-enable IPS after the LUT has been programmed. */ if (IS_HASWELL(dev_priv) && - (new_crtc_state->base.color_mgmt_changed || + (new_crtc_state->uapi.color_mgmt_changed || new_crtc_state->update_pipe) && new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) return true; @@ -5851,10 +5851,10 @@ static bool needs_scalerclk_wa(struct drm_i915_private *dev_priv, static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct drm_atomic_state *state = old_crtc_state->base.state; + struct drm_atomic_state *state = old_crtc_state->uapi.state; struct intel_crtc_state *pipe_config = intel_atomic_get_new_crtc_state(to_intel_atomic_state(state), crtc); @@ -5894,10 +5894,10 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state, struct intel_crtc_state *pipe_config) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct drm_atomic_state *state = old_crtc_state->base.state; + struct drm_atomic_state *state = old_crtc_state->uapi.state; struct drm_plane *primary = crtc->base.primary; struct drm_plane_state *old_primary_state = drm_atomic_get_old_plane_state(state, primary); @@ -6249,7 +6249,7 @@ static void intel_encoders_update_pipe(struct intel_crtc *crtc, static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_plane *plane = to_intel_plane(crtc->base.primary); plane->disable_plane(plane, crtc_state); @@ -6258,7 +6258,7 @@ static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_stat static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, struct intel_atomic_state *state) { - struct drm_crtc *crtc = pipe_config->base.crtc; + struct drm_crtc *crtc = pipe_config->uapi.crtc; struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); @@ -6392,7 +6392,7 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc) static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, struct intel_atomic_state *state) { - struct drm_crtc *crtc = pipe_config->base.crtc; + struct drm_crtc *crtc = pipe_config->uapi.crtc; struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = intel_crtc->pipe, hsw_workaround_pipe; @@ -6500,7 +6500,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -6516,7 +6516,7 @@ static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state) static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, struct intel_atomic_state *state) { - struct drm_crtc *crtc = old_crtc_state->base.crtc; + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); @@ -6575,7 +6575,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, struct intel_atomic_state *state) { - struct drm_crtc *crtc = old_crtc_state->base.crtc; + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; @@ -6609,7 +6609,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (!crtc_state->gmch_pfit.control) @@ -6745,7 +6745,7 @@ intel_aux_power_domain(struct intel_digital_port *dig_port) static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_encoder *encoder; enum pipe pipe = crtc->pipe; @@ -6762,7 +6762,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe)); drm_for_each_encoder_mask(encoder, &dev_priv->drm, - crtc_state->base.encoder_mask) { + crtc_state->uapi.encoder_mask) { struct intel_encoder *intel_encoder = to_intel_encoder(encoder); mask |= BIT_ULL(intel_encoder->power_domain); @@ -6780,7 +6780,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state) static u64 modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum intel_display_power_domain domain; u64 domains, new_domains, old_domains; @@ -6809,7 +6809,7 @@ static void modeset_put_power_domains(struct drm_i915_private *dev_priv, static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, struct intel_atomic_state *state) { - struct drm_crtc *crtc = pipe_config->base.crtc; + struct drm_crtc *crtc = pipe_config->uapi.crtc; struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); @@ -6865,7 +6865,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); I915_WRITE(FP0(crtc->pipe), crtc_state->dpll_hw_state.fp0); @@ -6875,7 +6875,7 @@ static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state) static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config, struct intel_atomic_state *state) { - struct drm_crtc *crtc = pipe_config->base.crtc; + struct drm_crtc *crtc = pipe_config->uapi.crtc; struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); @@ -6925,7 +6925,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config, static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (!old_crtc_state->gmch_pfit.control) @@ -6941,7 +6941,7 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state, struct intel_atomic_state *state) { - struct drm_crtc *crtc = old_crtc_state->base.crtc; + struct drm_crtc *crtc = old_crtc_state->uapi.crtc; struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); @@ -7140,7 +7140,7 @@ static int ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(dev); - struct drm_atomic_state *state = pipe_config->base.state; + struct drm_atomic_state *state = pipe_config->uapi.state; struct intel_crtc *other_crtc; struct intel_crtc_state *other_crtc_state; @@ -7259,7 +7259,7 @@ static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc, bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); /* IPS only exists on ULT machines and is tied to pipe A. */ @@ -7289,9 +7289,9 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) static bool hsw_compute_ips_config(struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = - to_i915(crtc_state->base.crtc->dev); + to_i915(crtc_state->uapi.crtc->dev); struct intel_atomic_state *intel_state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); if (!hsw_crtc_state_ips_capable(crtc_state)) return false; @@ -7363,7 +7363,7 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config) static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (HAS_GMCH(dev_priv)) /* FIXME calculate proper pipe pixel rate for GMCH pfit */ @@ -7598,7 +7598,7 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv, enum pipe static void intel_pch_transcoder_set_m_n(const struct intel_crtc_state *crtc_state, const struct intel_link_m_n *m_n) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -7625,7 +7625,7 @@ static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_sta const struct intel_link_m_n *m_n, const struct intel_link_m_n *m2_n2) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; enum transcoder transcoder = crtc_state->cpu_transcoder; @@ -7938,7 +7938,7 @@ int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, if (!pipe_config) return -ENOMEM; - pipe_config->base.crtc = &crtc->base; + pipe_config->uapi.crtc = &crtc->base; pipe_config->pixel_multiplier = 1; pipe_config->dpll = *dpll; @@ -8098,7 +8098,7 @@ static void i8xx_compute_dpll(struct intel_crtc *crtc, static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -8160,7 +8160,7 @@ static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state) static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -8174,7 +8174,7 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; if (IS_GEN(dev_priv, 2)) @@ -8272,7 +8272,7 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 pipeconf; @@ -8718,7 +8718,7 @@ bdw_get_pipemisc_output_format(struct intel_crtc *crtc) static void i9xx_get_pipe_color_config(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_plane *plane = to_intel_plane(crtc->base.primary); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; @@ -9356,7 +9356,7 @@ void intel_init_pch_refclk(struct drm_i915_private *dev_priv) static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; u32 val; @@ -9410,7 +9410,7 @@ static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state) static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 val = 0; @@ -9433,7 +9433,7 @@ static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state) static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 val = 0; @@ -9619,7 +9619,7 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc, { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_atomic_state *state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); const struct intel_limit *limit; int refclk = 120000; @@ -10044,7 +10044,7 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc, { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_atomic_state *state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) || INTEL_GEN(dev_priv) >= 11) { @@ -10615,7 +10615,7 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state, } ret = drm_atomic_helper_check_plane_state(&plane_state->base, - &crtc_state->base, + &crtc_state->uapi, DRM_PLANE_HELPER_NO_SCALING, DRM_PLANE_HELPER_NO_SCALING, true, true); @@ -10802,7 +10802,7 @@ i9xx_cursor_max_stride(struct intel_plane *plane, static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 cntl = 0; @@ -11219,7 +11219,7 @@ int intel_get_load_detect_pipe(struct drm_connector *connector, if (!mode) mode = &load_detect_mode; - ret = drm_atomic_set_mode_for_crtc(&crtc_state->base, mode); + ret = drm_atomic_set_mode_for_crtc(&crtc_state->uapi, mode); if (ret) goto fail; @@ -11457,7 +11457,7 @@ intel_encoder_current_mode(struct intel_encoder *encoder) return NULL; } - crtc_state->base.crtc = &crtc->base; + crtc_state->uapi.crtc = &crtc->base; if (!dev_priv->display.get_pipe_config(crtc, crtc_state)) { kfree(crtc_state); @@ -11528,7 +11528,7 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat const struct intel_plane_state *old_plane_state, struct intel_plane_state *plane_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_plane *plane = to_intel_plane(plane_state->base.plane); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); bool mode_changed = needs_modeset(crtc_state); @@ -11700,9 +11700,9 @@ static int icl_add_linked_planes(struct intel_atomic_state *state) static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->base.state); + struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state); struct intel_plane *plane, *linked; struct intel_plane_state *plane_state; int i; @@ -11772,9 +11772,9 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct intel_atomic_state *state = - to_intel_atomic_state(new_crtc_state->base.state); + to_intel_atomic_state(new_crtc_state->uapi.state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); @@ -11807,10 +11807,10 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, * when C8 planes are getting enabled/disabled. */ if (c8_planes_changed(crtc_state)) - crtc_state->base.color_mgmt_changed = true; + crtc_state->uapi.color_mgmt_changed = true; if (mode_changed || crtc_state->update_pipe || - crtc_state->base.color_mgmt_changed) { + crtc_state->uapi.color_mgmt_changed) { ret = intel_color_check(crtc_state); if (ret) return ret; @@ -11928,7 +11928,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - struct drm_atomic_state *state = pipe_config->base.state; + struct drm_atomic_state *state = pipe_config->uapi.state; struct drm_connector *connector; struct drm_connector_state *connector_state; int bpp, i; @@ -12081,7 +12081,7 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, struct intel_atomic_state *state, const char *context) { - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); const struct intel_plane_state *plane_state; struct intel_plane *plane; @@ -12258,7 +12258,7 @@ static int clear_intel_crtc_state(struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = - to_i915(crtc_state->base.crtc->dev); + to_i915(crtc_state->uapi.crtc->dev); struct intel_crtc_state *saved_state; saved_state = kzalloc(sizeof(*saved_state), GFP_KERNEL); @@ -12284,8 +12284,8 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) BUILD_BUG_ON(offsetof(struct intel_crtc_state, base)); BUILD_BUG_ON(offsetof(struct intel_crtc_state, uapi)); BUILD_BUG_ON(offsetof(struct intel_crtc_state, hw)); - memcpy(&crtc_state->base + 1, &saved_state->base + 1, - sizeof(*crtc_state) - sizeof(crtc_state->base)); + memcpy(&crtc_state->uapi + 1, &saved_state->uapi + 1, + sizeof(*crtc_state) - sizeof(crtc_state->uapi)); kfree(saved_state); return 0; @@ -12294,8 +12294,8 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) static int intel_modeset_pipe_config(struct intel_crtc_state *pipe_config) { - struct drm_crtc *crtc = pipe_config->base.crtc; - struct drm_atomic_state *state = pipe_config->base.state; + struct drm_crtc *crtc = pipe_config->uapi.crtc; + struct drm_atomic_state *state = pipe_config->uapi.state; struct intel_encoder *encoder; struct drm_connector *connector; struct drm_connector_state *connector_state; @@ -12560,7 +12560,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, const struct intel_crtc_state *pipe_config, bool fastset) { - struct drm_i915_private *dev_priv = to_i915(current_config->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev); bool ret = true; u32 bp_gamma = 0; bool fixup_inherited = fastset && @@ -13108,12 +13108,12 @@ verify_crtc_state(struct intel_crtc *crtc, struct drm_atomic_state *state; bool active; - state = old_crtc_state->base.state; - __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->base); + state = old_crtc_state->uapi.state; + __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi); pipe_config = old_crtc_state; memset(pipe_config, 0, sizeof(*pipe_config)); - pipe_config->base.crtc = &crtc->base; - pipe_config->base.state = state; + pipe_config->uapi.crtc = &crtc->base; + pipe_config->uapi.state = state; DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); @@ -13293,7 +13293,7 @@ intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, static void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; @@ -13490,7 +13490,7 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) return; - new_crtc_state->base.mode_changed = false; + new_crtc_state->uapi.mode_changed = false; new_crtc_state->update_pipe = true; /* @@ -13563,7 +13563,7 @@ static int intel_atomic_check(struct drm_device *dev, new_crtc_state, i) { if (new_crtc_state->hw.mode.private_flags != old_crtc_state->hw.mode.private_flags) - new_crtc_state->base.mode_changed = true; + new_crtc_state->uapi.mode_changed = true; } ret = drm_atomic_helper_check_modeset(dev, &state->base); @@ -13687,7 +13687,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); /* drm_atomic_helper_update_legacy_modeset_state might not be called. */ @@ -13732,7 +13732,7 @@ static void commit_pipe_config(struct intel_atomic_state *state, * CRTC was enabled. */ if (!modeset) { - if (new_crtc_state->base.color_mgmt_changed || + if (new_crtc_state->uapi.color_mgmt_changed || new_crtc_state->update_pipe) intel_color_commit(new_crtc_state); @@ -13938,7 +13938,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) */ if (!skl_ddb_entry_equal(&new_crtc_state->wm.skl.ddb, &old_crtc_state->wm.skl.ddb) && - !new_crtc_state->base.active_changed && + !new_crtc_state->uapi.active_changed && state->wm_results.dirty_pipes != updated) vbl_wait = true; @@ -14071,12 +14071,13 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) bool modeset = needs_modeset(new_crtc_state); /* Complete events for now disable pipes here. */ - if (modeset && !new_crtc_state->hw.active && new_crtc_state->base.event) { + if (modeset && !new_crtc_state->hw.active && new_crtc_state->uapi.event) { spin_lock_irq(&dev->event_lock); - drm_crtc_send_vblank_event(&crtc->base, new_crtc_state->base.event); + drm_crtc_send_vblank_event(&crtc->base, + new_crtc_state->uapi.event); spin_unlock_irq(&dev->event_lock); - new_crtc_state->base.event = NULL; + new_crtc_state->uapi.event = NULL; } } @@ -14109,7 +14110,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { if (new_crtc_state->hw.active && !needs_modeset(new_crtc_state) && - (new_crtc_state->base.color_mgmt_changed || + (new_crtc_state->uapi.color_mgmt_changed || new_crtc_state->update_pipe)) intel_color_load_luts(new_crtc_state); } @@ -14557,7 +14558,7 @@ int skl_max_scale(const struct intel_crtc_state *crtc_state, const struct drm_format_info *format) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); int max_scale; int crtc_clock, max_dotclk, tmpclk1, tmpclk2; @@ -14566,7 +14567,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, return DRM_PLANE_HELPER_NO_SCALING; crtc_clock = crtc_state->hw.adjusted_mode.crtc_clock; - max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk; + max_dotclk = to_intel_atomic_state(crtc_state->uapi.state)->cdclk.logical.cdclk; if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10) max_dotclk *= 2; @@ -14786,7 +14787,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane, out_free: if (new_crtc_state) - intel_crtc_destroy_state(&crtc->base, &new_crtc_state->base); + intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi); if (ret) intel_plane_destroy_state(&plane->base, &new_plane_state->base); else @@ -15112,7 +15113,7 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) ret = -ENOMEM; goto fail; } - __drm_atomic_helper_crtc_reset(&intel_crtc->base, &crtc_state->base); + __drm_atomic_helper_crtc_reset(&intel_crtc->base, &crtc_state->uapi); intel_crtc->config = crtc_state; primary = intel_primary_plane_create(dev_priv, pipe); @@ -16128,7 +16129,7 @@ static int intel_initial_commit(struct drm_device *dev) * having a proper LUT loaded. Remove once we * have readout for pipe gamma enable. */ - crtc_state->base.color_mgmt_changed = true; + crtc_state->uapi.color_mgmt_changed = true; } } @@ -16526,7 +16527,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc, static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); /* * Some SNB BIOSen (eg. ASUS K53SV) are known to misprogram @@ -16660,9 +16661,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); - __drm_atomic_helper_crtc_destroy_state(&crtc_state->base); + __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi); memset(crtc_state, 0, sizeof(*crtc_state)); - __drm_atomic_helper_crtc_reset(&crtc->base, &crtc_state->base); + __drm_atomic_helper_crtc_reset(&crtc->base, &crtc_state->uapi); crtc_state->hw.active = crtc_state->hw.enable = dev_priv->display.get_pipe_config(crtc, crtc_state); @@ -16748,9 +16749,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) * because anything calling .crtc_disable may * rely on the connector_mask being accurate. */ - crtc_state->base.connector_mask |= + crtc_state->uapi.connector_mask |= drm_connector_mask(&connector->base); - crtc_state->base.encoder_mask |= + crtc_state->uapi.encoder_mask |= drm_encoder_mask(&encoder->base); } } else { @@ -16778,7 +16779,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) crtc->base.mode.vdisplay = crtc_state->pipe_src_h; intel_mode_from_pipe_config(&crtc_state->hw.adjusted_mode, crtc_state); - WARN_ON(drm_atomic_set_mode_for_crtc(&crtc_state->base, &crtc->base.mode)); + WARN_ON(drm_atomic_set_mode_for_crtc(&crtc_state->uapi, &crtc->base.mode)); /* * The initial mode needs to be set in order to keep diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 213b0c0cdd67..7d691f6fc369 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2222,7 +2222,7 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp, const struct drm_display_info *info = &connector->display_info; const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); int ret; if (!drm_mode_is_420_only(info, adjusted_mode) || @@ -2287,7 +2287,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct intel_lspcon *lspcon = enc_to_intel_lspcon(&encoder->base); enum port port = encoder->port; - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_connector *intel_connector = intel_dp->attached_connector; struct intel_digital_connector_state *intel_conn_state = to_intel_digital_connector_state(conn_state); @@ -2402,7 +2402,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); enum port port = encoder->port; - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; intel_dp_set_link_params(intel_dp, pipe_config->port_clock, @@ -3000,7 +3000,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state) static void ironlake_edp_pll_on(struct intel_dp *intel_dp, const struct intel_crtc_state *pipe_config) { - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); assert_pipe_disabled(dev_priv, crtc->pipe); @@ -3040,7 +3040,7 @@ static void ironlake_edp_pll_on(struct intel_dp *intel_dp, static void ironlake_edp_pll_off(struct intel_dp *intel_dp, const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); assert_pipe_disabled(dev_priv, crtc->pipe); @@ -3200,7 +3200,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); u32 tmp, flags = 0; enum port port = encoder->port; - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); if (encoder->type == INTEL_OUTPUT_EDP) pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP); @@ -3467,7 +3467,7 @@ static void intel_enable_dp(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); u32 dp_reg = I915_READ(intel_dp->output_reg); enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; @@ -3600,7 +3600,7 @@ static void vlv_init_panel_power_sequencer(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); lockdep_assert_held(&dev_priv->pps_mutex); @@ -4122,7 +4122,7 @@ intel_dp_link_down(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); enum port port = encoder->port; u32 DP = intel_dp->DP; @@ -6874,7 +6874,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, int refresh_rate) { struct intel_dp *intel_dp = dev_priv->drrs.dp; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); enum drrs_refresh_rate_type index = DRRS_HIGH_RR; if (refresh_rate <= 0) { diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 7d63f0a79ca1..adf1d3895419 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -42,7 +42,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, struct drm_connector_state *conn_state, struct link_config_limits *limits) { - struct drm_atomic_state *state = crtc_state->base.state; + struct drm_atomic_state *state = crtc_state->uapi.state; struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); struct intel_dp *intel_dp = &intel_mst->primary->dp; struct intel_connector *connector = diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c index 556d1b30f06a..704f38681c4b 100644 --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c @@ -739,7 +739,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum dpio_channel ch = vlv_dport_to_channel(enc_to_dig_port(&encoder->base)); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; u32 val; @@ -783,7 +783,7 @@ void chv_phy_pre_pll_enable(struct intel_encoder *encoder, { struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum dpio_channel ch = vlv_dport_to_channel(dport); enum pipe pipe = crtc->pipe; unsigned int lane_mask = @@ -864,7 +864,7 @@ void chv_phy_pre_encoder_enable(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct intel_digital_port *dport = dp_to_dig_port(intel_dp); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum dpio_channel ch = vlv_dport_to_channel(dport); enum pipe pipe = crtc->pipe; int data, i, stagger; @@ -953,7 +953,7 @@ void chv_phy_post_pll_disable(struct intel_encoder *encoder, const struct intel_crtc_state *old_crtc_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - enum pipe pipe = to_intel_crtc(old_crtc_state->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(old_crtc_state->uapi.crtc)->pipe; u32 val; vlv_dpio_get(dev_priv); @@ -1016,7 +1016,7 @@ void vlv_phy_pre_pll_enable(struct intel_encoder *encoder, { struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum dpio_channel port = vlv_dport_to_channel(dport); enum pipe pipe = crtc->pipe; @@ -1046,7 +1046,7 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct intel_digital_port *dport = dp_to_dig_port(intel_dp); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum dpio_channel port = vlv_dport_to_channel(dport); enum pipe pipe = crtc->pipe; u32 val; @@ -1075,7 +1075,7 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder, { struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); enum dpio_channel port = vlv_dport_to_channel(dport); enum pipe pipe = crtc->pipe; diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index ec10fa7d3c69..33db1f59b406 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -136,7 +136,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, */ void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_shared_dpll *pll = crtc_state->shared_dpll; @@ -163,7 +163,7 @@ void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state) */ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_shared_dpll *pll = crtc_state->shared_dpll; unsigned int crtc_mask = drm_crtc_mask(&crtc->base); @@ -208,7 +208,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) */ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_shared_dpll *pll = crtc_state->shared_dpll; unsigned int crtc_mask = drm_crtc_mask(&crtc->base); @@ -827,7 +827,7 @@ hsw_ddi_hdmi_get_dpll(struct intel_atomic_state *state, static struct intel_shared_dpll * hsw_ddi_dp_get_dpll(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); struct intel_shared_dpll *pll; enum intel_dpll_id pll_id; int clock = crtc_state->port_clock; @@ -1736,7 +1736,7 @@ static bool bxt_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state, struct bxt_clk_div *clk_div) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct dpll best_clock; /* Calculate HDMI div */ @@ -2259,7 +2259,7 @@ static bool cnl_ddi_calculate_wrpll(struct intel_crtc_state *crtc_state, struct skl_wrpll_params *wrpll_params) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); u32 afe_clock = crtc_state->port_clock * 5; u32 ref_clock; u32 dco_min = 7998000; @@ -2538,7 +2538,7 @@ static const struct skl_wrpll_params tgl_tbt_pll_24MHz_values = { static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state, struct skl_wrpll_params *pll_params) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); const struct icl_combo_pll_params *params = dev_priv->cdclk.hw.ref == 24000 ? icl_dp_combo_pll_24MHz_values : @@ -2560,7 +2560,7 @@ static bool icl_calc_dp_combo_pll(struct intel_crtc_state *crtc_state, static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, struct skl_wrpll_params *pll_params) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (INTEL_GEN(dev_priv) >= 12) { switch (dev_priv->cdclk.hw.ref) { @@ -2597,7 +2597,7 @@ static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder, struct intel_dpll_hw_state *pll_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); u32 cfgcr0, cfgcr1; struct skl_wrpll_params pll_params = { 0 }; bool ret; @@ -2729,7 +2729,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state, struct intel_dpll_hw_state *pll_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int refclk_khz = dev_priv->cdclk.hw.ref; int clock = crtc_state->port_clock; u32 dco_khz, m1div, m2div_int, m2div_rem, m2div_frac; diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c index a68e5c5b91b4..28770c5765ad 100644 --- a/drivers/gpu/drm/i915/display/intel_dvo.c +++ b/drivers/gpu/drm/i915/display/intel_dvo.c @@ -277,7 +277,7 @@ static void intel_dvo_pre_enable(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; struct intel_dvo *intel_dvo = enc_to_dvo(encoder); enum pipe pipe = crtc->pipe; diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 2f5fc71ac9a0..357ad459bfbc 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -285,7 +285,7 @@ static void ibx_write_infoframe(struct intel_encoder *encoder, { const u32 *data = frame; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -321,7 +321,7 @@ static void ibx_read_infoframe(struct intel_encoder *encoder, void *frame, ssize_t len) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); u32 val, *data = frame; int i; @@ -340,7 +340,7 @@ static u32 ibx_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; i915_reg_t reg = TVIDEO_DIP_CTL(pipe); u32 val = I915_READ(reg); @@ -362,7 +362,7 @@ static void cpt_write_infoframe(struct intel_encoder *encoder, { const u32 *data = frame; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -401,7 +401,7 @@ static void cpt_read_infoframe(struct intel_encoder *encoder, void *frame, ssize_t len) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); u32 val, *data = frame; int i; @@ -420,7 +420,7 @@ static u32 cpt_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; u32 val = I915_READ(TVIDEO_DIP_CTL(pipe)); if ((val & VIDEO_DIP_ENABLE) == 0) @@ -438,7 +438,7 @@ static void vlv_write_infoframe(struct intel_encoder *encoder, { const u32 *data = frame; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -474,7 +474,7 @@ static void vlv_read_infoframe(struct intel_encoder *encoder, void *frame, ssize_t len) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); u32 val, *data = frame; int i; @@ -493,7 +493,7 @@ static u32 vlv_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; u32 val = I915_READ(VLV_TVIDEO_DIP_CTL(pipe)); if ((val & VIDEO_DIP_ENABLE) == 0) @@ -965,7 +965,7 @@ static bool intel_hdmi_set_gcp_infoframe(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); i915_reg_t reg; if ((crtc_state->infoframes.enable & @@ -990,7 +990,7 @@ void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); i915_reg_t reg; if ((crtc_state->infoframes.enable & @@ -1037,7 +1037,7 @@ static void ibx_set_infoframes(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base); struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); @@ -1096,7 +1096,7 @@ static void cpt_set_infoframes(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); @@ -1145,7 +1145,7 @@ static void vlv_set_infoframes(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); @@ -1741,7 +1741,7 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder, { struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; u32 hdmi_val; @@ -1865,7 +1865,7 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config, const struct drm_connector_state *conn_state) { - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); WARN_ON(!pipe_config->has_hdmi_sink); DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", @@ -1951,7 +1951,7 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder, { struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); enum pipe pipe = crtc->pipe; u32 temp; @@ -2015,7 +2015,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); struct intel_digital_port *intel_dig_port = hdmi_to_dig_port(intel_hdmi); - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); u32 temp; temp = I915_READ(intel_hdmi->hdmi_reg); @@ -2215,8 +2215,8 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, int bpc) { struct drm_i915_private *dev_priv = - to_i915(crtc_state->base.crtc->dev); - struct drm_atomic_state *state = crtc_state->base.state; + to_i915(crtc_state->uapi.crtc->dev); + struct drm_atomic_state *state = crtc_state->uapi.state; struct drm_connector_state *connector_state; struct drm_connector *connector; const struct drm_display_mode *adjusted_mode = @@ -2245,7 +2245,7 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, for_each_new_connector_in_state(state, connector, connector_state, i) { const struct drm_display_info *info = &connector->display_info; - if (connector_state->crtc != crtc_state->base.crtc) + if (connector_state->crtc != crtc_state->uapi.crtc) continue; if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { @@ -2286,7 +2286,7 @@ static bool intel_hdmi_ycbcr420_config(struct drm_connector *connector, struct intel_crtc_state *config) { - struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(config->uapi.crtc); if (!connector->ycbcr_420_allowed) { DRM_ERROR("Platform doesn't support YCBCR420 output\n"); diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c index f17d6e02460f..ca4ebb0f2230 100644 --- a/drivers/gpu/drm/i915/display/intel_lvds.c +++ b/drivers/gpu/drm/i915/display/intel_lvds.c @@ -230,7 +230,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder, { struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; enum pipe pipe = crtc->pipe; u32 temp; @@ -393,7 +393,7 @@ static int intel_lvds_compute_config(struct intel_encoder *intel_encoder, struct intel_connector *intel_connector = lvds_encoder->attached_connector; struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); unsigned int lvds_bpp; /* Should never happen!! */ diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index 5e3fd37d9471..6f3eaae3761f 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -1047,7 +1047,7 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, struct intel_connector *connector = to_intel_connector(conn_state->connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; u32 ctl, ctl2; ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); @@ -1077,7 +1077,7 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, struct intel_connector *connector = to_intel_connector(conn_state->connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; u32 pwm_ctl, val; /* Controller 1 uses the utility pin. */ @@ -1189,7 +1189,7 @@ void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, struct intel_connector *connector = to_intel_connector(conn_state->connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; + enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; if (!panel->backlight.present) return; diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c index fc602533a602..2746512f4466 100644 --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c @@ -309,13 +309,13 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable) goto put_state; } - pipe_config->base.mode_changed = pipe_config->has_psr; + pipe_config->uapi.mode_changed = pipe_config->has_psr; pipe_config->crc_enabled = enable; if (IS_HASWELL(dev_priv) && pipe_config->hw.active && crtc->pipe == PIPE_A && pipe_config->cpu_transcoder == TRANSCODER_EDP) - pipe_config->base.mode_changed = true; + pipe_config->uapi.mode_changed = true; ret = drm_atomic_commit(state); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 347004981cff..9c76ad5383b9 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -812,7 +812,7 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state); dev_priv->psr.busy_frontbuffer_bits = 0; - dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; + dev_priv->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; dev_priv->psr.dc3co_enabled = !!crtc_state->dc3co_exitline; dev_priv->psr.dc3co_exit_delay = intel_get_frame_time_us(crtc_state); dev_priv->psr.transcoder = crtc_state->cpu_transcoder; @@ -1059,7 +1059,7 @@ void intel_psr_update(struct intel_dp *intel_dp, int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, u32 *out_value) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (!dev_priv->psr.enabled || !new_crtc_state->has_psr) @@ -1141,7 +1141,7 @@ static int intel_psr_fastset_force(struct drm_i915_private *dev_priv) if (intel_crtc_state->hw.active && intel_crtc_state->has_psr) { /* Mark mode as changed to trigger a pipe->update() */ - intel_crtc_state->base.mode_changed = true; + intel_crtc_state->uapi.mode_changed = true; break; } } diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 97ae8cc1314e..1047357c15c4 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -1429,7 +1429,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(conn_state); @@ -1723,7 +1723,7 @@ static void intel_disable_sdvo(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_sdvo *intel_sdvo = to_sdvo(encoder); - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); u32 temp; if (old_crtc_state->has_audio) @@ -1785,7 +1785,7 @@ static void intel_enable_sdvo(struct intel_encoder *encoder, struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_sdvo *intel_sdvo = to_sdvo(encoder); - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); u32 temp; bool input1, input2; int i; diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index ef0ca7c6d11f..fa687c05b1ed 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -81,7 +81,7 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, */ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode; long timeout = msecs_to_jiffies_timeout(1); @@ -190,7 +190,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) */ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; int scanline_end = intel_get_crtc_scanline(crtc); u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc); @@ -203,14 +203,15 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) * Would be slightly nice to just grab the vblank count and arm the * event outside of the critical section - the spinlock might spin for a * while ... */ - if (new_crtc_state->base.event) { + if (new_crtc_state->uapi.event) { WARN_ON(drm_crtc_vblank_get(&crtc->base) != 0); spin_lock(&crtc->base.dev->event_lock); - drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event); + drm_crtc_arm_vblank_event(&crtc->base, + new_crtc_state->uapi.event); spin_unlock(&crtc->base.dev->event_lock); - new_crtc_state->base.event = NULL; + new_crtc_state->uapi.event = NULL; } local_irq_enable(); @@ -1586,7 +1587,7 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state, } ret = drm_atomic_helper_check_plane_state(&plane_state->base, - &crtc_state->base, + &crtc_state->uapi, min_scale, max_scale, true, true); if (ret) @@ -1643,7 +1644,7 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return ret; ret = drm_atomic_helper_check_plane_state(&plane_state->base, - &crtc_state->base, + &crtc_state->uapi, DRM_PLANE_HELPER_NO_SCALING, DRM_PLANE_HELPER_NO_SCALING, true, true); @@ -1808,7 +1809,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, } ret = drm_atomic_helper_check_plane_state(&plane_state->base, - &crtc_state->base, + &crtc_state->uapi, min_scale, max_scale, true, true); if (ret) diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c index e800d45b813d..4499d402c316 100644 --- a/drivers/gpu/drm/i915/display/intel_tv.c +++ b/drivers/gpu/drm/i915/display/intel_tv.c @@ -924,7 +924,7 @@ intel_enable_tv(struct intel_encoder *encoder, /* Prevents vblank waits from timing out in intel_tv_detect_type() */ intel_wait_for_vblank(dev_priv, - to_intel_crtc(pipe_config->base.crtc)->pipe); + to_intel_crtc(pipe_config->uapi.crtc)->pipe); I915_WRITE(TV_CTL, I915_READ(TV_CTL) | TV_ENC_ENABLE); } @@ -1417,7 +1417,7 @@ static void intel_tv_pre_enable(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_tv *intel_tv = enc_to_tv(encoder); const struct intel_tv_connector_state *tv_conn_state = to_intel_tv_connector_state(conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 6a338a83aaed..38c181499505 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -459,7 +459,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp, enum intel_display_power_domain intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *i915 = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; /* @@ -483,7 +483,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); const struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg; enum pipe pipe = crtc->pipe; @@ -902,7 +902,7 @@ static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder, void intel_dsc_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum pipe pipe = crtc->pipe; i915_reg_t dss_ctl1_reg, dss_ctl2_reg; @@ -938,7 +938,7 @@ void intel_dsc_enable(struct intel_encoder *encoder, void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; i915_reg_t dss_ctl1_reg, dss_ctl2_reg; diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index 3bf838279fc2..16f93d1e71e5 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -261,7 +261,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder, struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, base); struct intel_connector *intel_connector = intel_dsi->attached_connector; - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; int ret; @@ -624,7 +624,7 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); enum port port; @@ -746,7 +746,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, const struct drm_connector_state *conn_state) { struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); - struct drm_crtc *crtc = pipe_config->base.crtc; + struct drm_crtc *crtc = pipe_config->uapi.crtc; struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = intel_crtc->pipe; @@ -1034,7 +1034,7 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder, struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; struct drm_display_mode *adjusted_mode_sw; - struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); unsigned int lane_count = intel_dsi->lane_count; unsigned int bpp, fmt; @@ -1315,7 +1315,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder, struct drm_encoder *encoder = &intel_encoder->base; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; enum port port; diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 51e83da21738..bdace2f14cde 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -4222,7 +4222,7 @@ static int i915_drrs_ctl_set(void *data, u64 val) !crtc_state->has_drrs) goto out; - commit = crtc_state->base.commit; + commit = crtc_state->uapi.commit; if (commit) { ret = wait_for_completion_interruptible(&commit->hw_done); if (ret) @@ -4234,7 +4234,7 @@ static int i915_drrs_ctl_set(void *data, u64 val) struct intel_encoder *encoder; struct intel_dp *intel_dp; - if (!(crtc_state->base.connector_mask & + if (!(crtc_state->uapi.connector_mask & drm_connector_mask(connector))) continue; @@ -4293,7 +4293,7 @@ i915_fifo_underrun_reset_write(struct file *filp, return ret; crtc_state = to_intel_crtc_state(intel_crtc->base.state); - commit = crtc_state->base.commit; + commit = crtc_state->uapi.commit; if (commit) { ret = wait_for_completion_interruptible(&commit->hw_done); if (!ret) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9671ff29c25f..76f8eea15ddf 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -464,7 +464,7 @@ static const int pessimal_latency_ns = 5000; static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; enum pipe pipe = crtc->pipe; @@ -1144,7 +1144,7 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state, static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); bool dirty = false; for (; level < intel_wm_num_levels(dev_priv); level++) { @@ -1160,7 +1160,7 @@ static bool g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, static bool g4x_raw_fbc_wm_set(struct intel_crtc_state *crtc_state, int level, u16 value) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); bool dirty = false; /* NORMAL level doesn't have an FBC watermark */ @@ -1262,7 +1262,7 @@ static bool g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, static bool g4x_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state, int level) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); if (level > dev_priv->wm.max_level) return false; @@ -1300,9 +1300,9 @@ static void g4x_invalidate_wms(struct intel_crtc *crtc, static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_atomic_state *state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal; int num_active_planes = hweight8(crtc_state->active_planes & ~BIT(PLANE_CURSOR)); @@ -1389,17 +1389,17 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state) static int g4x_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate; const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal; struct intel_atomic_state *intel_state = - to_intel_atomic_state(new_crtc_state->base.state); + to_intel_atomic_state(new_crtc_state->uapi.state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(intel_state, crtc); const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal; enum plane_id plane_id; - if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { + if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) { *intermediate = *optimal; intermediate->cxsr = false; @@ -1531,8 +1531,8 @@ static void g4x_program_watermarks(struct drm_i915_private *dev_priv) static void g4x_initial_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); mutex_lock(&dev_priv->wm.wm_mutex); crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; @@ -1543,8 +1543,8 @@ static void g4x_initial_watermarks(struct intel_atomic_state *state, static void g4x_optimize_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); if (!crtc_state->wm.need_postvbl_update) return; @@ -1631,7 +1631,7 @@ static bool vlv_need_sprite0_fifo_workaround(unsigned int active_planes) static int vlv_compute_fifo(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2]; struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; @@ -1743,7 +1743,7 @@ static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size) static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int num_levels = intel_wm_num_levels(dev_priv); bool dirty = false; @@ -1818,16 +1818,16 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state, static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_atomic_state *state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; const struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; int num_active_planes = hweight8(crtc_state->active_planes & ~BIT(PLANE_CURSOR)); - bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->base); + bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi); const struct intel_plane_state *old_plane_state; const struct intel_plane_state *new_plane_state; struct intel_plane *plane; @@ -1926,7 +1926,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state) static void vlv_atomic_update_fifo(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_uncore *uncore = &dev_priv->uncore; const struct vlv_fifo_state *fifo_state = @@ -2022,17 +2022,17 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state, static int vlv_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; struct intel_atomic_state *intel_state = - to_intel_atomic_state(new_crtc_state->base.state); + to_intel_atomic_state(new_crtc_state->uapi.state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(intel_state, crtc); const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal; int level; - if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { + if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) { *intermediate = *optimal; intermediate->cxsr = false; @@ -2150,8 +2150,8 @@ static void vlv_program_watermarks(struct drm_i915_private *dev_priv) static void vlv_initial_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); mutex_lock(&dev_priv->wm.wm_mutex); crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; @@ -2162,8 +2162,8 @@ static void vlv_initial_watermarks(struct intel_atomic_state *state, static void vlv_optimize_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); if (!crtc_state->wm.need_postvbl_update) return; @@ -2767,7 +2767,7 @@ static u32 hsw_compute_linetime_wm(const struct intel_crtc_state *crtc_state) { const struct intel_atomic_state *intel_state = - to_intel_atomic_state(crtc_state->base.state); + to_intel_atomic_state(crtc_state->uapi.state); const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; u32 linetime, ips_linetime; @@ -3082,8 +3082,8 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv, /* Compute new watermarks for the pipe */ static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_pipe_wm *pipe_wm; struct intel_plane *plane; const struct intel_plane_state *plane_state; @@ -3161,11 +3161,11 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state) */ static int ilk_compute_intermediate_wm(struct intel_crtc_state *newstate) { - struct intel_crtc *intel_crtc = to_intel_crtc(newstate->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(newstate->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; struct intel_atomic_state *intel_state = - to_intel_atomic_state(newstate->base.state); + to_intel_atomic_state(newstate->uapi.state); const struct intel_crtc_state *oldstate = intel_atomic_get_old_crtc_state(intel_state, intel_crtc); const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal; @@ -3177,7 +3177,7 @@ static int ilk_compute_intermediate_wm(struct intel_crtc_state *newstate) * and after the vblank. */ *a = newstate->wm.ilk.optimal; - if (!newstate->hw.active || drm_atomic_crtc_needs_modeset(&newstate->base) || + if (!newstate->hw.active || drm_atomic_crtc_needs_modeset(&newstate->uapi) || intel_state->skip_intermediate_wm) return 0; @@ -3858,9 +3858,9 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, struct skl_ddb_entry *alloc, /* out */ int *num_active /* out */) { - struct drm_atomic_state *state = crtc_state->base.state; + struct drm_atomic_state *state = crtc_state->uapi.state; struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - struct drm_crtc *for_crtc = crtc_state->base.crtc; + struct drm_crtc *for_crtc = crtc_state->uapi.crtc; const struct intel_crtc *crtc; u32 pipe_width = 0, total_width = 0, width_before_pipe = 0; enum pipe for_pipe = to_intel_crtc(for_crtc)->pipe; @@ -3941,7 +3941,7 @@ static unsigned int skl_cursor_allocation(const struct intel_crtc_state *crtc_state, int num_active) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int level, max_level = ilk_wm_max_level(dev_priv); struct skl_wm_level wm = {}; int ret, min_ddb_alloc = 0; @@ -4131,7 +4131,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); - struct drm_atomic_state *state = crtc_state->base.state; + struct drm_atomic_state *state = crtc_state->uapi.state; const struct intel_plane_state *plane_state; struct intel_plane *plane; int crtc_clock, dotclk; @@ -4232,7 +4232,7 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state, u64 *plane_data_rate, u64 *uv_plane_data_rate) { - struct drm_atomic_state *state = crtc_state->base.state; + struct drm_atomic_state *state = crtc_state->uapi.state; struct intel_plane *plane; const struct intel_plane_state *plane_state; u64 total_data_rate = 0; @@ -4267,7 +4267,7 @@ icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state; u64 total_data_rate = 0; - if (WARN_ON(!crtc_state->base.state)) + if (WARN_ON(!crtc_state->uapi.state)) return 0; /* Calculate and cache data rate for each plane */ @@ -4311,8 +4311,8 @@ static int skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, struct skl_ddb_allocation *ddb /* out */) { - struct drm_atomic_state *state = crtc_state->base.state; - struct drm_crtc *crtc = crtc_state->base.crtc; + struct drm_atomic_state *state = crtc_state->uapi.state; + struct drm_crtc *crtc = crtc_state->uapi.crtc; struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct skl_ddb_entry *alloc = &crtc_state->wm.skl.ddb; @@ -4619,7 +4619,7 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state, u32 plane_pixel_rate, struct skl_wm_params *wp, int color_plane) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 interm_pbpl; @@ -4740,7 +4740,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state, const struct skl_wm_level *result_prev, struct skl_wm_level *result /* out */) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); u32 latency = dev_priv->wm.skl_latency[level]; uint_fixed_16_16_t method1, method2; uint_fixed_16_16_t selected_result; @@ -4864,7 +4864,7 @@ skl_compute_wm_levels(const struct intel_crtc_state *crtc_state, const struct skl_wm_params *wm_params, struct skl_wm_level *levels) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); int level, max_level = ilk_wm_max_level(dev_priv); struct skl_wm_level *result_prev = &levels[0]; @@ -4881,7 +4881,7 @@ skl_compute_wm_levels(const struct intel_crtc_state *crtc_state, static u32 skl_compute_linetime_wm(const struct intel_crtc_state *crtc_state) { - struct drm_atomic_state *state = crtc_state->base.state; + struct drm_atomic_state *state = crtc_state->uapi.state; struct drm_i915_private *dev_priv = to_i915(state->dev); uint_fixed_16_16_t linetime_us; u32 linetime_wm; @@ -4900,7 +4900,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *crtc_state, const struct skl_wm_params *wp, struct skl_plane_wm *wm) { - struct drm_device *dev = crtc_state->base.crtc->dev; + struct drm_device *dev = crtc_state->uapi.crtc->dev; const struct drm_i915_private *dev_priv = to_i915(dev); u16 trans_min, trans_y_tile_min; const u16 trans_amount = 10; /* This is configurable amount */ @@ -5060,7 +5060,7 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; struct intel_plane *plane; const struct intel_plane_state *plane_state; @@ -5250,8 +5250,8 @@ static int skl_ddb_add_affected_planes(const struct intel_crtc_state *old_crtc_state, struct intel_crtc_state *new_crtc_state) { - struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->base.state); - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); + struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->uapi.state); + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_plane *plane; @@ -5552,7 +5552,7 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state, * power well the hardware state will go out of sync * with the software state. */ - if (!drm_atomic_crtc_needs_modeset(&new_crtc_state->base) && + if (!drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi) && skl_plane_wm_equals(dev_priv, &old_crtc_state->wm.skl.optimal.planes[plane_id], &new_crtc_state->wm.skl.optimal.planes[plane_id])) @@ -5620,7 +5620,7 @@ skl_compute_wm(struct intel_atomic_state *state) static void skl_atomic_update_crtc_wm(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; enum pipe pipe = crtc->pipe; @@ -5634,7 +5634,7 @@ static void skl_atomic_update_crtc_wm(struct intel_atomic_state *state, static void skl_initial_wm(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_device *dev = intel_crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); struct skl_ddb_values *results = &state->wm_results; @@ -5644,7 +5644,7 @@ static void skl_initial_wm(struct intel_atomic_state *state, mutex_lock(&dev_priv->wm.wm_mutex); - if (crtc_state->base.active_changed) + if (crtc_state->uapi.active_changed) skl_atomic_update_crtc_wm(state, crtc_state); mutex_unlock(&dev_priv->wm.wm_mutex); @@ -5703,8 +5703,8 @@ static void ilk_program_watermarks(struct drm_i915_private *dev_priv) static void ilk_initial_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); mutex_lock(&dev_priv->wm.wm_mutex); crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate; @@ -5715,8 +5715,8 @@ static void ilk_initial_watermarks(struct intel_atomic_state *state, static void ilk_optimize_watermarks(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); if (!crtc_state->wm.need_postvbl_update) return;
Split up crtc_state->base to uapi. This is done using the following patch, ran after the previous commit that splits out any hw references: @@ struct intel_crtc_state *T; @@ -T->base +T->uapi @@ struct intel_crtc_state *T; identifier x =~ "^(active|enable|degamma_lut|gamma_lut|ctm|mode|adjusted_mode)$"; @@ -T->base.x +T->uapi.x Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 6 +- drivers/gpu/drm/i915/display/intel_atomic.c | 8 +- .../gpu/drm/i915/display/intel_atomic_plane.c | 6 +- drivers/gpu/drm/i915/display/intel_audio.c | 8 +- drivers/gpu/drm/i915/display/intel_bw.c | 4 +- drivers/gpu/drm/i915/display/intel_cdclk.c | 10 +- drivers/gpu/drm/i915/display/intel_color.c | 70 ++--- drivers/gpu/drm/i915/display/intel_crt.c | 6 +- drivers/gpu/drm/i915/display/intel_ddi.c | 32 +-- drivers/gpu/drm/i915/display/intel_display.c | 241 +++++++++--------- drivers/gpu/drm/i915/display/intel_dp.c | 20 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 14 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 20 +- drivers/gpu/drm/i915/display/intel_dvo.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 44 ++-- drivers/gpu/drm/i915/display/intel_lvds.c | 4 +- drivers/gpu/drm/i915/display/intel_panel.c | 6 +- drivers/gpu/drm/i915/display/intel_pipe_crc.c | 4 +- drivers/gpu/drm/i915/display/intel_psr.c | 6 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 6 +- drivers/gpu/drm/i915/display/intel_sprite.c | 17 +- drivers/gpu/drm/i915/display/intel_tv.c | 4 +- drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 10 +- drivers/gpu/drm/i915/i915_debugfs.c | 6 +- drivers/gpu/drm/i915/intel_pm.c | 112 ++++---- 27 files changed, 339 insertions(+), 337 deletions(-)