[3/3] spi: dw-pci: Fix Chip Select amount on Intel Elkhart Lake PSE SPI
diff mbox series

Message ID 20191018132131.31608-3-jarkko.nikula@linux.intel.com
State Accepted
Commit c97905cae914ad955b79212a454016a68c7a1a21
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Series
  • [1/3] spi: dw: Move runtime PM enable/disable from common to platform driver part
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Commit Message

Jarkko Nikula Oct. 18, 2019, 1:21 p.m. UTC
Intel(R) Programmable Services Engine (Intel(R) PSE) SPI controllers in
Intel Elkhart Lake have two Chip Select signals instead of one.

Reported-by: Raymond Tan <raymond.tan@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
---
 drivers/spi/spi-dw-pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 1cddecea2715..12c131b5fb4e 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -36,7 +36,7 @@  static struct spi_pci_desc spi_pci_mid_desc_2 = {
 };
 
 static struct spi_pci_desc spi_pci_ehl_desc = {
-	.num_cs = 1,
+	.num_cs = 2,
 	.bus_num = -1,
 	.max_freq = 100000000,
 };