[1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
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Message ID 20191024122138.25065-1-ville.syrjala@linux.intel.com
State New
Headers show
Series
  • [1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
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Commit Message

Ville Syrjälä Oct. 24, 2019, 12:21 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make CHICKEN_TRANS() a bit less special looking by using _PICK().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 14 +++++++-------
 drivers/gpu/drm/i915/display/intel_psr.c | 22 +---------------------
 drivers/gpu/drm/i915/i915_reg.h          | 13 +++++++++----
 3 files changed, 17 insertions(+), 32 deletions(-)

Comments

José Roberto de Souza Oct. 24, 2019, 10:36 p.m. UTC | #1
On Thu, 2019-10-24 at 15:21 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Make CHICKEN_TRANS() a bit less special looking by using _PICK().
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 14 +++++++-------
>  drivers/gpu/drm/i915/display/intel_psr.c | 22 +---------------------
>  drivers/gpu/drm/i915/i915_reg.h          | 13 +++++++++----
>  3 files changed, 17 insertions(+), 32 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 1a49266f4f57..127dd2d736d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3870,12 +3870,12 @@ static i915_reg_t
>  gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
>  			       enum port port)
>  {
> -	static const i915_reg_t regs[] = {
> -		[PORT_A] = CHICKEN_TRANS_EDP,
> -		[PORT_B] = CHICKEN_TRANS_A,
> -		[PORT_C] = CHICKEN_TRANS_B,
> -		[PORT_D] = CHICKEN_TRANS_C,
> -		[PORT_E] = CHICKEN_TRANS_A,
> +	static const enum transcoder trans[] = {
> +		[PORT_A] = TRANSCODER_EDP,
> +		[PORT_B] = TRANSCODER_A,
> +		[PORT_C] = TRANSCODER_B,
> +		[PORT_D] = TRANSCODER_C,
> +		[PORT_E] = TRANSCODER_A,
>  	};
>  
>  	WARN_ON(INTEL_GEN(dev_priv) < 9);
> @@ -3883,7 +3883,7 @@ gen9_chicken_trans_reg_by_port(struct
> drm_i915_private *dev_priv,
>  	if (WARN_ON(port < PORT_A || port > PORT_E))
>  		port = PORT_A;
>  
> -	return regs[port];
> +	return CHICKEN_TRANS(trans[port]);
>  }
>  
>  static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index dfbedff98ea8..1643c35484d8 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -740,25 +740,6 @@ static void intel_psr_activate(struct intel_dp
> *intel_dp)
>  	dev_priv->psr.active = true;
>  }
>  
> -static i915_reg_t gen9_chicken_trans_reg(struct drm_i915_private
> *dev_priv,
> -					 enum transcoder
> cpu_transcoder)
> -{
> -	static const i915_reg_t regs[] = {
> -		[TRANSCODER_A] = CHICKEN_TRANS_A,
> -		[TRANSCODER_B] = CHICKEN_TRANS_B,
> -		[TRANSCODER_C] = CHICKEN_TRANS_C,
> -		[TRANSCODER_EDP] = CHICKEN_TRANS_EDP,
> -	};
> -
> -	WARN_ON(INTEL_GEN(dev_priv) < 9);
> -
> -	if (WARN_ON(cpu_transcoder >= ARRAY_SIZE(regs) ||
> -		    !regs[cpu_transcoder].reg))
> -		cpu_transcoder = TRANSCODER_A;
> -
> -	return regs[cpu_transcoder];
> -}
> -
>  static void intel_psr_enable_source(struct intel_dp *intel_dp,
>  				    const struct intel_crtc_state
> *crtc_state)
>  {
> @@ -774,8 +755,7 @@ static void intel_psr_enable_source(struct
> intel_dp *intel_dp,
>  
>  	if (dev_priv->psr.psr2_enabled && (IS_GEN(dev_priv, 9) &&
>  					   !IS_GEMINILAKE(dev_priv))) {
> -		i915_reg_t reg = gen9_chicken_trans_reg(dev_priv,
> -							cpu_transcoder)
> ;
> +		i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder);
>  		u32 chicken = I915_READ(reg);
>  
>  		chicken |= PSR2_VSC_ENABLE_PROG_HEADER |
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 855db888516c..38071d0c8020 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7616,10 +7616,15 @@ enum {
>  #define  BDW_DPRS_MASK_VBLANK_SRD	(1 << 0)
>  #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A,
> _CHICKEN_PIPESL_1_B)
>  
> -#define CHICKEN_TRANS_A		_MMIO(0x420c0)
> -#define CHICKEN_TRANS_B		_MMIO(0x420c4)
> -#define CHICKEN_TRANS_C		_MMIO(0x420c8)
> -#define CHICKEN_TRANS_EDP	_MMIO(0x420cc)
> +#define _CHICKEN_TRANS_A	0x420c0
> +#define _CHICKEN_TRANS_B	0x420c4
> +#define _CHICKEN_TRANS_C	0x420c8
> +#define _CHICKEN_TRANS_EDP	0x420cc
> +#define CHICKEN_TRANS(trans)	_MMIO(_PICK((trans), \
> +					    [TRANSCODER_EDP] =
> _CHICKEN_TRANS_EDP, \
> +					    [TRANSCODER_A] =
> _CHICKEN_TRANS_A, \
> +					    [TRANSCODER_B] =
> _CHICKEN_TRANS_B, \
> +					    [TRANSCODER_C] =
> _CHICKEN_TRANS_C))
>  #define  VSC_DATA_SEL_SOFTWARE_CONTROL	(1 << 25) /* GLK and
> CNL+ */
>  #define  DDI_TRAINING_OVERRIDE_ENABLE	(1 << 19)
>  #define  DDI_TRAINING_OVERRIDE_VALUE	(1 << 18)
Lucas De Marchi Nov. 15, 2019, 5:10 p.m. UTC | #2
On Thu, Oct 24, 2019 at 03:21:36PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>Make CHICKEN_TRANS() a bit less special looking by using _PICK().
>
>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/i915/display/intel_ddi.c | 14 +++++++-------
> drivers/gpu/drm/i915/display/intel_psr.c | 22 +---------------------
> drivers/gpu/drm/i915/i915_reg.h          | 13 +++++++++----
> 3 files changed, 17 insertions(+), 32 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>index 1a49266f4f57..127dd2d736d4 100644
>--- a/drivers/gpu/drm/i915/display/intel_ddi.c
>+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>@@ -3870,12 +3870,12 @@ static i915_reg_t
> gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
> 			       enum port port)
> {
>-	static const i915_reg_t regs[] = {
>-		[PORT_A] = CHICKEN_TRANS_EDP,
>-		[PORT_B] = CHICKEN_TRANS_A,
>-		[PORT_C] = CHICKEN_TRANS_B,
>-		[PORT_D] = CHICKEN_TRANS_C,
>-		[PORT_E] = CHICKEN_TRANS_A,
>+	static const enum transcoder trans[] = {
>+		[PORT_A] = TRANSCODER_EDP,
>+		[PORT_B] = TRANSCODER_A,
>+		[PORT_C] = TRANSCODER_B,
>+		[PORT_D] = TRANSCODER_C,
>+		[PORT_E] = TRANSCODER_A,
> 	};
>
> 	WARN_ON(INTEL_GEN(dev_priv) < 9);
>@@ -3883,7 +3883,7 @@ gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
> 	if (WARN_ON(port < PORT_A || port > PORT_E))
> 		port = PORT_A;
>
>-	return regs[port];
>+	return CHICKEN_TRANS(trans[port]);
> }
>
> static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
>diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
>index dfbedff98ea8..1643c35484d8 100644
>--- a/drivers/gpu/drm/i915/display/intel_psr.c
>+++ b/drivers/gpu/drm/i915/display/intel_psr.c
>@@ -740,25 +740,6 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
> 	dev_priv->psr.active = true;
> }
>
>-static i915_reg_t gen9_chicken_trans_reg(struct drm_i915_private *dev_priv,
>-					 enum transcoder cpu_transcoder)
>-{
>-	static const i915_reg_t regs[] = {
>-		[TRANSCODER_A] = CHICKEN_TRANS_A,
>-		[TRANSCODER_B] = CHICKEN_TRANS_B,
>-		[TRANSCODER_C] = CHICKEN_TRANS_C,
>-		[TRANSCODER_EDP] = CHICKEN_TRANS_EDP,
>-	};
>-
>-	WARN_ON(INTEL_GEN(dev_priv) < 9);
>-
>-	if (WARN_ON(cpu_transcoder >= ARRAY_SIZE(regs) ||
>-		    !regs[cpu_transcoder].reg))
>-		cpu_transcoder = TRANSCODER_A;
>-
>-	return regs[cpu_transcoder];
>-}
>-
> static void intel_psr_enable_source(struct intel_dp *intel_dp,
> 				    const struct intel_crtc_state *crtc_state)
> {
>@@ -774,8 +755,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
>
> 	if (dev_priv->psr.psr2_enabled && (IS_GEN(dev_priv, 9) &&
> 					   !IS_GEMINILAKE(dev_priv))) {
>-		i915_reg_t reg = gen9_chicken_trans_reg(dev_priv,
>-							cpu_transcoder);
>+		i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder);
> 		u32 chicken = I915_READ(reg);
>
> 		chicken |= PSR2_VSC_ENABLE_PROG_HEADER |
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 855db888516c..38071d0c8020 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7616,10 +7616,15 @@ enum {
> #define  BDW_DPRS_MASK_VBLANK_SRD	(1 << 0)
> #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
>
>-#define CHICKEN_TRANS_A		_MMIO(0x420c0)
>-#define CHICKEN_TRANS_B		_MMIO(0x420c4)
>-#define CHICKEN_TRANS_C		_MMIO(0x420c8)
>-#define CHICKEN_TRANS_EDP	_MMIO(0x420cc)
>+#define _CHICKEN_TRANS_A	0x420c0
>+#define _CHICKEN_TRANS_B	0x420c4
>+#define _CHICKEN_TRANS_C	0x420c8
>+#define _CHICKEN_TRANS_EDP	0x420cc
>+#define CHICKEN_TRANS(trans)	_MMIO(_PICK((trans), \
>+					    [TRANSCODER_EDP] = _CHICKEN_TRANS_EDP, \
>+					    [TRANSCODER_A] = _CHICKEN_TRANS_A, \
>+					    [TRANSCODER_B] = _CHICKEN_TRANS_B, \
>+					    [TRANSCODER_C] = _CHICKEN_TRANS_C))
> #define  VSC_DATA_SEL_SOFTWARE_CONTROL	(1 << 25) /* GLK and CNL+ */
> #define  DDI_TRAINING_OVERRIDE_ENABLE	(1 << 19)
> #define  DDI_TRAINING_OVERRIDE_VALUE	(1 << 18)
>-- 
>2.21.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 1a49266f4f57..127dd2d736d4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3870,12 +3870,12 @@  static i915_reg_t
 gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
 			       enum port port)
 {
-	static const i915_reg_t regs[] = {
-		[PORT_A] = CHICKEN_TRANS_EDP,
-		[PORT_B] = CHICKEN_TRANS_A,
-		[PORT_C] = CHICKEN_TRANS_B,
-		[PORT_D] = CHICKEN_TRANS_C,
-		[PORT_E] = CHICKEN_TRANS_A,
+	static const enum transcoder trans[] = {
+		[PORT_A] = TRANSCODER_EDP,
+		[PORT_B] = TRANSCODER_A,
+		[PORT_C] = TRANSCODER_B,
+		[PORT_D] = TRANSCODER_C,
+		[PORT_E] = TRANSCODER_A,
 	};
 
 	WARN_ON(INTEL_GEN(dev_priv) < 9);
@@ -3883,7 +3883,7 @@  gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
 	if (WARN_ON(port < PORT_A || port > PORT_E))
 		port = PORT_A;
 
-	return regs[port];
+	return CHICKEN_TRANS(trans[port]);
 }
 
 static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index dfbedff98ea8..1643c35484d8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -740,25 +740,6 @@  static void intel_psr_activate(struct intel_dp *intel_dp)
 	dev_priv->psr.active = true;
 }
 
-static i915_reg_t gen9_chicken_trans_reg(struct drm_i915_private *dev_priv,
-					 enum transcoder cpu_transcoder)
-{
-	static const i915_reg_t regs[] = {
-		[TRANSCODER_A] = CHICKEN_TRANS_A,
-		[TRANSCODER_B] = CHICKEN_TRANS_B,
-		[TRANSCODER_C] = CHICKEN_TRANS_C,
-		[TRANSCODER_EDP] = CHICKEN_TRANS_EDP,
-	};
-
-	WARN_ON(INTEL_GEN(dev_priv) < 9);
-
-	if (WARN_ON(cpu_transcoder >= ARRAY_SIZE(regs) ||
-		    !regs[cpu_transcoder].reg))
-		cpu_transcoder = TRANSCODER_A;
-
-	return regs[cpu_transcoder];
-}
-
 static void intel_psr_enable_source(struct intel_dp *intel_dp,
 				    const struct intel_crtc_state *crtc_state)
 {
@@ -774,8 +755,7 @@  static void intel_psr_enable_source(struct intel_dp *intel_dp,
 
 	if (dev_priv->psr.psr2_enabled && (IS_GEN(dev_priv, 9) &&
 					   !IS_GEMINILAKE(dev_priv))) {
-		i915_reg_t reg = gen9_chicken_trans_reg(dev_priv,
-							cpu_transcoder);
+		i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder);
 		u32 chicken = I915_READ(reg);
 
 		chicken |= PSR2_VSC_ENABLE_PROG_HEADER |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..38071d0c8020 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7616,10 +7616,15 @@  enum {
 #define  BDW_DPRS_MASK_VBLANK_SRD	(1 << 0)
 #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
 
-#define CHICKEN_TRANS_A		_MMIO(0x420c0)
-#define CHICKEN_TRANS_B		_MMIO(0x420c4)
-#define CHICKEN_TRANS_C		_MMIO(0x420c8)
-#define CHICKEN_TRANS_EDP	_MMIO(0x420cc)
+#define _CHICKEN_TRANS_A	0x420c0
+#define _CHICKEN_TRANS_B	0x420c4
+#define _CHICKEN_TRANS_C	0x420c8
+#define _CHICKEN_TRANS_EDP	0x420cc
+#define CHICKEN_TRANS(trans)	_MMIO(_PICK((trans), \
+					    [TRANSCODER_EDP] = _CHICKEN_TRANS_EDP, \
+					    [TRANSCODER_A] = _CHICKEN_TRANS_A, \
+					    [TRANSCODER_B] = _CHICKEN_TRANS_B, \
+					    [TRANSCODER_C] = _CHICKEN_TRANS_C))
 #define  VSC_DATA_SEL_SOFTWARE_CONTROL	(1 << 25) /* GLK and CNL+ */
 #define  DDI_TRAINING_OVERRIDE_ENABLE	(1 << 19)
 #define  DDI_TRAINING_OVERRIDE_VALUE	(1 << 18)