[01/14] drm/i915: Rework watermark readout to use plane api

Message ID	20191024124805.26840-1-maarten.lankhorst@linux.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=U0wV=YR=lists.freedesktop.org=intel-gfx-bounces@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 930E321872 From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Oct 2019 14:47:52 +0200 Message-Id: <20191024124805.26840-1-maarten.lankhorst@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/14] drm/i915: Rework watermark readout to use plane api Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	[01/14] drm/i915: Rework watermark readout to use plane api \| expand [01/14] drm/i915: Rework watermark readout to use plane api [02/14] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2. [03/14] drm/i915: Handle a few more cases for crtc hw/uapi split, v3. [04/14] drm/i915: Add aliases for uapi and hw to crtc_state [05/14] drm/i915: Perform manual conversions for crtc uapi/hw split, v2. [06/14] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw. [07/14] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. [08/14] drm/i915: Complete crtc hw/uapi split, v3. [09/14] drm/i915: Add aliases for uapi and hw to plane_state [10/14] drm/i915: Perform manual conversions for plane uapi/hw split [11/14] drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw. [12/14] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi. [13/14] drm/i915: Complete plane hw and uapi split, v2. [14/14] drm/i915: Remove special case slave handling during hw programming, v3.

Message ID

20191024124805.26840-1-maarten.lankhorst@linux.intel.com (mailing list archive)

State

New, archived

Headers

DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 930E321872
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Date: Thu, 24 Oct 2019 14:47:52 +0200
Message-Id: <20191024124805.26840-1-maarten.lankhorst@linux.intel.com>
MIME-Version: 1.0
Subject: [Intel-gfx] [PATCH 01/14] drm/i915: Rework watermark readout to use
 plane api
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Series

[01/14] drm/i915: Rework watermark readout to use plane api | expand

Commit Message

Maarten Lankhorst Oct. 24, 2019, 12:47 p.m. UTC

Instead of unconditionally verifying the cursor plane, handle it in the
same way as any other plane, and use our existing api to verify.

While at it, ensure that on gen9+ we verify active_planes mask as well.
This should give the correct results for planar YUV planes too, as we
update active_planes for them.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++--------------
 1 file changed, 23 insertions(+), 60 deletions(-)

Comments

Ville Syrjala Oct. 24, 2019, 2:33 p.m. UTC | #1

On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
> Instead of unconditionally verifying the cursor plane, handle it in the
> same way as any other plane, and use our existing api to verify.
> 
> While at it, ensure that on gen9+ we verify active_planes mask as well.
> This should give the correct results for planar YUV planes too, as we
> update active_planes for them.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++--------------
>  1 file changed, 23 insertions(+), 60 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 579655675b08..4e4273c4ae57 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13183,7 +13183,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>  	struct skl_pipe_wm *sw_wm;
>  	struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
>  	const enum pipe pipe = crtc->pipe;
> -	int plane, level, max_level = ilk_wm_max_level(dev_priv);
> +	int level, max_level = ilk_wm_max_level(dev_priv);
> +	struct intel_plane *plane;
>  
>  	if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active)
>  		return;
> @@ -13207,63 +13208,25 @@ static void verify_wm_state(struct intel_crtc *crtc,
>  			  hw->ddb.enabled_slices);
>  
>  	/* planes */
> -	for_each_universal_plane(dev_priv, pipe, plane) {
> +	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
>  		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
> +		enum pipe plane_pipe = pipe;
>  
> -		hw_plane_wm = &hw->wm.planes[plane];
> -		sw_plane_wm = &sw_wm->planes[plane];
> -
> -		/* Watermarks */
> -		for (level = 0; level <= max_level; level++) {
> -			if (skl_wm_level_equals(&hw_plane_wm->wm[level],
> -						&sw_plane_wm->wm[level]))
> -				continue;
> -
> -			DRM_ERROR("mismatch in WM pipe %c plane %d level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				  pipe_name(pipe), plane + 1, level,
> -				  sw_plane_wm->wm[level].plane_en,
> -				  sw_plane_wm->wm[level].plane_res_b,
> -				  sw_plane_wm->wm[level].plane_res_l,
> -				  hw_plane_wm->wm[level].plane_en,
> -				  hw_plane_wm->wm[level].plane_res_b,
> -				  hw_plane_wm->wm[level].plane_res_l);
> -		}
> +		hw_plane_wm = &hw->wm.planes[plane->id];
> +		sw_plane_wm = &sw_wm->planes[plane->id];
>  
> -		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
> -					 &sw_plane_wm->trans_wm)) {
> -			DRM_ERROR("mismatch in trans WM pipe %c plane %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				  pipe_name(pipe), plane + 1,
> -				  sw_plane_wm->trans_wm.plane_en,
> -				  sw_plane_wm->trans_wm.plane_res_b,
> -				  sw_plane_wm->trans_wm.plane_res_l,
> -				  hw_plane_wm->trans_wm.plane_en,
> -				  hw_plane_wm->trans_wm.plane_res_b,
> -				  hw_plane_wm->trans_wm.plane_res_l);
> -		}
> -
> -		/* DDB */
> -		hw_ddb_entry = &hw->ddb_y[plane];
> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
> -
> -		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> -			DRM_ERROR("mismatch in DDB state pipe %c plane %d (expected (%u,%u), found (%u,%u))\n",
> -				  pipe_name(pipe), plane + 1,
> -				  sw_ddb_entry->start, sw_ddb_entry->end,
> -				  hw_ddb_entry->start, hw_ddb_entry->end);
> +		if (!plane->get_hw_state(plane, &plane_pipe)) {
> +			WARN(new_crtc_state->active_planes & BIT(plane->id),
> +			     "pipe %c %s should be visible, but isn't\n",
> +			     pipe_name(pipe), plane->base.name);
> +			continue;
>  		}

As mentioned the idea was to make sure we validate this stuff even for
disabled planes. A bit of paranoia is good since ddb overlaps can be
so dangerous. So I don't want such a check in this function.

> -	}
>  
> -	/*
> -	 * cursor
> -	 * If the cursor plane isn't active, we may not have updated it's ddb
> -	 * allocation. In that case since the ddb allocation will be updated
> -	 * once the plane becomes visible, we can skip this check
> -	 */
> -	if (1) {
> -		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
> +		WARN_ON(plane_pipe != pipe);
>  
> -		hw_plane_wm = &hw->wm.planes[PLANE_CURSOR];
> -		sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
> +		WARN(!(new_crtc_state->active_planes & BIT(plane->id)),
> +		     "pipe %c %s should be invisible, but visible.\n",
> +		     pipe_name(pipe), plane->base.name);

Still the wrong place for it.

>  
>  		/* Watermarks */
>  		for (level = 0; level <= max_level; level++) {
> @@ -13271,8 +13234,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>  						&sw_plane_wm->wm[level]))
>  				continue;
>  
> -			DRM_ERROR("mismatch in WM pipe %c cursor level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				  pipe_name(pipe), level,
> +			DRM_ERROR("mismatch in WM pipe %c %s level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				  pipe_name(pipe), plane->base.name, level,
>  				  sw_plane_wm->wm[level].plane_en,
>  				  sw_plane_wm->wm[level].plane_res_b,
>  				  sw_plane_wm->wm[level].plane_res_l,
> @@ -13283,8 +13246,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>  
>  		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
>  					 &sw_plane_wm->trans_wm)) {
> -			DRM_ERROR("mismatch in trans WM pipe %c cursor (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				  pipe_name(pipe),
> +			DRM_ERROR("mismatch in trans WM pipe %c %s (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				  pipe_name(pipe), plane->base.name,
>  				  sw_plane_wm->trans_wm.plane_en,
>  				  sw_plane_wm->trans_wm.plane_res_b,
>  				  sw_plane_wm->trans_wm.plane_res_l,
> @@ -13294,12 +13257,12 @@ static void verify_wm_state(struct intel_crtc *crtc,
>  		}
>  
>  		/* DDB */
> -		hw_ddb_entry = &hw->ddb_y[PLANE_CURSOR];
> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR];
> +		hw_ddb_entry = &hw->ddb_y[plane->id];
> +		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane->id];
>  
>  		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> -			DRM_ERROR("mismatch in DDB state pipe %c cursor (expected (%u,%u), found (%u,%u))\n",
> -				  pipe_name(pipe),
> +			DRM_ERROR("mismatch in DDB state pipe %c %s (expected (%u,%u), found (%u,%u))\n",
> +				  pipe_name(pipe), plane->base.name,
>  				  sw_ddb_entry->start, sw_ddb_entry->end,
>  				  hw_ddb_entry->start, hw_ddb_entry->end);
>  		}
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Maarten Lankhorst Oct. 24, 2019, 3:16 p.m. UTC | #2

Op 24-10-2019 om 16:33 schreef Ville Syrjälä:
> On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
>> Instead of unconditionally verifying the cursor plane, handle it in the
>> same way as any other plane, and use our existing api to verify.
>>
>> While at it, ensure that on gen9+ we verify active_planes mask as well.
>> This should give the correct results for planar YUV planes too, as we
>> update active_planes for them.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display.c | 83 ++++++--------------
>>  1 file changed, 23 insertions(+), 60 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 579655675b08..4e4273c4ae57 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -13183,7 +13183,8 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  	struct skl_pipe_wm *sw_wm;
>>  	struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
>>  	const enum pipe pipe = crtc->pipe;
>> -	int plane, level, max_level = ilk_wm_max_level(dev_priv);
>> +	int level, max_level = ilk_wm_max_level(dev_priv);
>> +	struct intel_plane *plane;
>>  
>>  	if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active)
>>  		return;
>> @@ -13207,63 +13208,25 @@ static void verify_wm_state(struct intel_crtc *crtc,
>>  			  hw->ddb.enabled_slices);
>>  
>>  	/* planes */
>> -	for_each_universal_plane(dev_priv, pipe, plane) {
>> +	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
>>  		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		enum pipe plane_pipe = pipe;
>>  
>> -		hw_plane_wm = &hw->wm.planes[plane];
>> -		sw_plane_wm = &sw_wm->planes[plane];
>> -
>> -		/* Watermarks */
>> -		for (level = 0; level <= max_level; level++) {
>> -			if (skl_wm_level_equals(&hw_plane_wm->wm[level],
>> -						&sw_plane_wm->wm[level]))
>> -				continue;
>> -
>> -			DRM_ERROR("mismatch in WM pipe %c plane %d level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1, level,
>> -				  sw_plane_wm->wm[level].plane_en,
>> -				  sw_plane_wm->wm[level].plane_res_b,
>> -				  sw_plane_wm->wm[level].plane_res_l,
>> -				  hw_plane_wm->wm[level].plane_en,
>> -				  hw_plane_wm->wm[level].plane_res_b,
>> -				  hw_plane_wm->wm[level].plane_res_l);
>> -		}
>> +		hw_plane_wm = &hw->wm.planes[plane->id];
>> +		sw_plane_wm = &sw_wm->planes[plane->id];
>>  
>> -		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
>> -					 &sw_plane_wm->trans_wm)) {
>> -			DRM_ERROR("mismatch in trans WM pipe %c plane %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_plane_wm->trans_wm.plane_en,
>> -				  sw_plane_wm->trans_wm.plane_res_b,
>> -				  sw_plane_wm->trans_wm.plane_res_l,
>> -				  hw_plane_wm->trans_wm.plane_en,
>> -				  hw_plane_wm->trans_wm.plane_res_b,
>> -				  hw_plane_wm->trans_wm.plane_res_l);
>> -		}
>> -
>> -		/* DDB */
>> -		hw_ddb_entry = &hw->ddb_y[plane];
>> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
>> -
>> -		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
>> -			DRM_ERROR("mismatch in DDB state pipe %c plane %d (expected (%u,%u), found (%u,%u))\n",
>> -				  pipe_name(pipe), plane + 1,
>> -				  sw_ddb_entry->start, sw_ddb_entry->end,
>> -				  hw_ddb_entry->start, hw_ddb_entry->end);
>> +		if (!plane->get_hw_state(plane, &plane_pipe)) {
>> +			WARN(new_crtc_state->active_planes & BIT(plane->id),
>> +			     "pipe %c %s should be visible, but isn't\n",
>> +			     pipe_name(pipe), plane->base.name);
>> +			continue;
>>  		}
> As mentioned the idea was to make sure we validate this stuff even for
> disabled planes. A bit of paranoia is good since ddb overlaps can be
> so dangerous. So I don't want such a check in this function.
Yeah should be ok.
>
>> -	}
>>  
>> -	/*
>> -	 * cursor
>> -	 * If the cursor plane isn't active, we may not have updated it's ddb
>> -	 * allocation. In that case since the ddb allocation will be updated
>> -	 * once the plane becomes visible, we can skip this check
>> -	 */
>> -	if (1) {
>> -		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
>> +		WARN_ON(plane_pipe != pipe);
>>  
>> -		hw_plane_wm = &hw->wm.planes[PLANE_CURSOR];
>> -		sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
>> +		WARN(!(new_crtc_state->active_planes & BIT(plane->id)),
>> +		     "pipe %c %s should be invisible, but visible.\n",
>> +		     pipe_name(pipe), plane->base.name);
> Still the wrong place for it.


Derp, blindly resent the patch. :(

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 579655675b08..4e4273c4ae57 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13183,7 +13183,8 @@  static void verify_wm_state(struct intel_crtc *crtc,
 	struct skl_pipe_wm *sw_wm;
 	struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
 	const enum pipe pipe = crtc->pipe;
-	int plane, level, max_level = ilk_wm_max_level(dev_priv);
+	int level, max_level = ilk_wm_max_level(dev_priv);
+	struct intel_plane *plane;
 
 	if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active)
 		return;
@@ -13207,63 +13208,25 @@  static void verify_wm_state(struct intel_crtc *crtc,
 			  hw->ddb.enabled_slices);
 
 	/* planes */
-	for_each_universal_plane(dev_priv, pipe, plane) {
+	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
 		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
+		enum pipe plane_pipe = pipe;
 
-		hw_plane_wm = &hw->wm.planes[plane];
-		sw_plane_wm = &sw_wm->planes[plane];
-
-		/* Watermarks */
-		for (level = 0; level <= max_level; level++) {
-			if (skl_wm_level_equals(&hw_plane_wm->wm[level],
-						&sw_plane_wm->wm[level]))
-				continue;
-
-			DRM_ERROR("mismatch in WM pipe %c plane %d level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				  pipe_name(pipe), plane + 1, level,
-				  sw_plane_wm->wm[level].plane_en,
-				  sw_plane_wm->wm[level].plane_res_b,
-				  sw_plane_wm->wm[level].plane_res_l,
-				  hw_plane_wm->wm[level].plane_en,
-				  hw_plane_wm->wm[level].plane_res_b,
-				  hw_plane_wm->wm[level].plane_res_l);
-		}
+		hw_plane_wm = &hw->wm.planes[plane->id];
+		sw_plane_wm = &sw_wm->planes[plane->id];
 
-		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
-					 &sw_plane_wm->trans_wm)) {
-			DRM_ERROR("mismatch in trans WM pipe %c plane %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				  pipe_name(pipe), plane + 1,
-				  sw_plane_wm->trans_wm.plane_en,
-				  sw_plane_wm->trans_wm.plane_res_b,
-				  sw_plane_wm->trans_wm.plane_res_l,
-				  hw_plane_wm->trans_wm.plane_en,
-				  hw_plane_wm->trans_wm.plane_res_b,
-				  hw_plane_wm->trans_wm.plane_res_l);
-		}
-
-		/* DDB */
-		hw_ddb_entry = &hw->ddb_y[plane];
-		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
-
-		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
-			DRM_ERROR("mismatch in DDB state pipe %c plane %d (expected (%u,%u), found (%u,%u))\n",
-				  pipe_name(pipe), plane + 1,
-				  sw_ddb_entry->start, sw_ddb_entry->end,
-				  hw_ddb_entry->start, hw_ddb_entry->end);
+		if (!plane->get_hw_state(plane, &plane_pipe)) {
+			WARN(new_crtc_state->active_planes & BIT(plane->id),
+			     "pipe %c %s should be visible, but isn't\n",
+			     pipe_name(pipe), plane->base.name);
+			continue;
 		}
-	}
 
-	/*
-	 * cursor
-	 * If the cursor plane isn't active, we may not have updated it's ddb
-	 * allocation. In that case since the ddb allocation will be updated
-	 * once the plane becomes visible, we can skip this check
-	 */
-	if (1) {
-		struct skl_plane_wm *hw_plane_wm, *sw_plane_wm;
+		WARN_ON(plane_pipe != pipe);
 
-		hw_plane_wm = &hw->wm.planes[PLANE_CURSOR];
-		sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
+		WARN(!(new_crtc_state->active_planes & BIT(plane->id)),
+		     "pipe %c %s should be invisible, but visible.\n",
+		     pipe_name(pipe), plane->base.name);
 
 		/* Watermarks */
 		for (level = 0; level <= max_level; level++) {
@@ -13271,8 +13234,8 @@  static void verify_wm_state(struct intel_crtc *crtc,
 						&sw_plane_wm->wm[level]))
 				continue;
 
-			DRM_ERROR("mismatch in WM pipe %c cursor level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				  pipe_name(pipe), level,
+			DRM_ERROR("mismatch in WM pipe %c %s level %d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				  pipe_name(pipe), plane->base.name, level,
 				  sw_plane_wm->wm[level].plane_en,
 				  sw_plane_wm->wm[level].plane_res_b,
 				  sw_plane_wm->wm[level].plane_res_l,
@@ -13283,8 +13246,8 @@  static void verify_wm_state(struct intel_crtc *crtc,
 
 		if (!skl_wm_level_equals(&hw_plane_wm->trans_wm,
 					 &sw_plane_wm->trans_wm)) {
-			DRM_ERROR("mismatch in trans WM pipe %c cursor (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				  pipe_name(pipe),
+			DRM_ERROR("mismatch in trans WM pipe %c %s (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				  pipe_name(pipe), plane->base.name,
 				  sw_plane_wm->trans_wm.plane_en,
 				  sw_plane_wm->trans_wm.plane_res_b,
 				  sw_plane_wm->trans_wm.plane_res_l,
@@ -13294,12 +13257,12 @@  static void verify_wm_state(struct intel_crtc *crtc,
 		}
 
 		/* DDB */
-		hw_ddb_entry = &hw->ddb_y[PLANE_CURSOR];
-		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR];
+		hw_ddb_entry = &hw->ddb_y[plane->id];
+		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane->id];
 
 		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
-			DRM_ERROR("mismatch in DDB state pipe %c cursor (expected (%u,%u), found (%u,%u))\n",
-				  pipe_name(pipe),
+			DRM_ERROR("mismatch in DDB state pipe %c %s (expected (%u,%u), found (%u,%u))\n",
+				  pipe_name(pipe), plane->base.name,
 				  sw_ddb_entry->start, sw_ddb_entry->end,
 				  hw_ddb_entry->start, hw_ddb_entry->end);
 		}

[01/14] drm/i915: Rework watermark readout to use plane api

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