diff mbox series

drm/i915/tgl: add support to one DP-MST stream

Message ID 20191028170457.6982-1-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/tgl: add support to one DP-MST stream | expand

Commit Message

Lucas De Marchi Oct. 28, 2019, 5:04 p.m. UTC 
This is the minimum change to support 1 (and only 1) DP-MST monitor
connected on Tiger Lake. This change was isolated from previous patch
from José. In order to support more streams we will need to create a
master-slave relation on the transcoders and that is currently not
working yet.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++++
 drivers/gpu/drm/i915/i915_reg.h          | 3 +++
 2 files changed, 7 insertions(+)

Comments

Souza, Jose Oct. 28, 2019, 5:28 p.m. UTC | #1 
On Mon, 2019-10-28 at 10:04 -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relation on the transcoders and that is currently not
> working yet.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h          | 3 +++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 281594bcbfae..32d9c74c5838 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1905,6 +1905,10 @@ intel_ddi_transcoder_func_reg_val_get(const
> struct intel_crtc_state *crtc_state)
>  	} else if (intel_crtc_has_type(crtc_state,
> INTEL_OUTPUT_DP_MST)) {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_MST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> +
> +		if (INTEL_GEN(dev_priv) >= 12)
> +			temp |= TRANS_DDI_MST_TRANSPORT_SELECT(
> +				crtc_state->cpu_transcoder);
>  	} else {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index dee3168efd86..e08c4ea3b747 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9550,6 +9550,9 @@ enum skl_power_gate {
>  #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
>  #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
>  #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_SHIFT	10
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK	REG_GENMASK(12, 10)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	((trans) << 10)
>  #define  TRANS_DDI_HDCP_SIGNALLING	(1 << 9)
>  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
>  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)
Ville Syrjälä Oct. 28, 2019, 6:03 p.m. UTC | #2 
On Mon, Oct 28, 2019 at 10:04:57AM -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relation on the transcoders and that is currently not
> working yet.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h          | 3 +++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 281594bcbfae..32d9c74c5838 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1905,6 +1905,10 @@ intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state)
>  	} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_MST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> +
> +		if (INTEL_GEN(dev_priv) >= 12)
> +			temp |= TRANS_DDI_MST_TRANSPORT_SELECT(
> +				crtc_state->cpu_transcoder);
>  	} else {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index dee3168efd86..e08c4ea3b747 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9550,6 +9550,9 @@ enum skl_power_gate {
>  #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
>  #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
>  #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_SHIFT	10

unused.

> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK	REG_GENMASK(12, 10)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	((trans) << 10)

I guess this should be REG_FIELD_PREP() if you want to be modern (as
your REG_GENMASK() usage suggests).

>  #define  TRANS_DDI_HDCP_SIGNALLING	(1 << 9)
>  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
>  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 281594bcbfae..32d9c74c5838 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1905,6 +1905,10 @@  intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state)
 	} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
 		temp |= TRANS_DDI_MODE_SELECT_DP_MST;
 		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
+
+		if (INTEL_GEN(dev_priv) >= 12)
+			temp |= TRANS_DDI_MST_TRANSPORT_SELECT(
+				crtc_state->cpu_transcoder);
 	} else {
 		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
 		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dee3168efd86..e08c4ea3b747 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9550,6 +9550,9 @@  enum skl_power_gate {
 #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
 #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
 #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
+#define  TRANS_DDI_MST_TRANSPORT_SELECT_SHIFT	10
+#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK	REG_GENMASK(12, 10)
+#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	((trans) << 10)
 #define  TRANS_DDI_HDCP_SIGNALLING	(1 << 9)
 #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
 #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)