Message ID | 20191101075727.26683-3-ying.huang@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | autonuma: Optimize memory placement in memory tiering system | expand |
On Fri, Nov 01, 2019 at 03:57:19PM +0800, Huang, Ying wrote: > From: Huang Ying <ying.huang@intel.com> > > In auto NUMA balancing page table scanning, if the pte_protnone() is > true, the PTE needs not to be changed because it's in target state > already. So other checking on corresponding struct page is > unnecessary too. > > So, if we check pte_protnone() firstly for each PTE, we can avoid > unnecessary struct page accessing, so that reduce the cache footprint > of NUMA balancing page table scanning. > > In the performance test of pmbench memory accessing benchmark with > 80:20 read/write ratio and normal access address distribution on a 2 > socket Intel server with Optance DC Persistent Memory, perf profiling > shows that the autonuma page table scanning time reduces from 1.23% to > 0.97% (that is, reduced 21%) with the patch. > > Signed-off-by: "Huang, Ying" <ying.huang@intel.com> Acked-by: Mel Gorman <mgorman@suse.de> This patch is independent of the series and should be resent separately. Alternatively Andrew, please pick this patch up on its own.
diff --git a/mm/mprotect.c b/mm/mprotect.c index bf38dfbbb4b4..d69b9913388e 100644 --- a/mm/mprotect.c +++ b/mm/mprotect.c @@ -80,6 +80,10 @@ static unsigned long change_pte_range(struct vm_area_struct *vma, pmd_t *pmd, if (prot_numa) { struct page *page; + /* Avoid TLB flush if possible */ + if (pte_protnone(oldpte)) + continue; + page = vm_normal_page(vma, addr, oldpte); if (!page || PageKsm(page)) continue; @@ -97,10 +101,6 @@ static unsigned long change_pte_range(struct vm_area_struct *vma, pmd_t *pmd, if (page_is_file_cache(page) && PageDirty(page)) continue; - /* Avoid TLB flush if possible */ - if (pte_protnone(oldpte)) - continue; - /* * Don't mess with PTEs if page is already on the node * a single-threaded process is running on.