From patchwork Thu Nov 7 04:42:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 11231875 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E1B5A1747 for ; Thu, 7 Nov 2019 04:42:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BC35A2187F for ; Thu, 7 Nov 2019 04:42:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="edDyucAt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733217AbfKGEmk (ORCPT ); Wed, 6 Nov 2019 23:42:40 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:49725 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733202AbfKGEmk (ORCPT ); Wed, 6 Nov 2019 23:42:40 -0500 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 03A128365A; Thu, 7 Nov 2019 17:42:38 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1573101758; bh=Cp3+ygrkI2TUFwvD/ZbjEdvVyk+ISy2hrJqm52dAiZY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=edDyucAtvLEYc9JvD0X2b/mHsDWEOQxDtE0BUmvknX3TvmLiQF4WvURmrgOAfZ0ti SVL3znnNOvnz8aW80lYnvrwY7VAhtmIunq/FogoeJmILoFF+ABwvMDr0Bsy/jo3y7h /K0UEGi1p8B326Yecppr0D06qeimkOSfAkFVg/f/k33Ed36DqUeWQr8EIpDXkhB6yf UWvCsjO+2FPQVVL2Fxm7fka8vAFeMpjTGZL4HlWu/AaTPSiXrdKskMsD8NP61SBYg1 t7RTIRZdWSqMoza06ZuKGkDyOZ2HyTUkA+3soHfVjfCliGAjRRwYV+Sg7XukYJfCsL 3hxB56vORrG1A== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Thu, 07 Nov 2019 17:42:38 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.20]) by smtp (Postfix) with ESMTP id 49FFD13EEEB; Thu, 7 Nov 2019 17:42:37 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id C48EE28005F; Thu, 7 Nov 2019 17:42:37 +1300 (NZDT) From: Chris Packham To: broonie@kernel.org, kdasu.kdev@gmail.com, bcm-kernel-feedback-list@broadcom.com Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH 1/2] spi: bcm-qspi: Convert to use CS GPIO descriptors Date: Thu, 7 Nov 2019 17:42:34 +1300 Message-Id: <20191107044235.4864-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191107044235.4864-1-chris.packham@alliedtelesis.co.nz> References: <20191107044235.4864-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Set use_gpio_descriptors to true and avoid asserting the native chip select if the spi core has done it for us. Signed-off-by: Chris Packham --- drivers/spi/spi-bcm-qspi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index 7a3531856491..85bad70f59e3 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -803,7 +803,8 @@ static int bcm_qspi_bspi_exec_mem_op(struct spi_device *spi, return -EIO; from = op->addr.val; - bcm_qspi_chip_select(qspi, spi->chip_select); + if (!spi->cs_gpiod) + bcm_qspi_chip_select(qspi, spi->chip_select); bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0); /* @@ -882,7 +883,8 @@ static int bcm_qspi_transfer_one(struct spi_master *master, int slots; unsigned long timeo = msecs_to_jiffies(100); - bcm_qspi_chip_select(qspi, spi->chip_select); + if (!spi->cs_gpiod) + bcm_qspi_chip_select(qspi, spi->chip_select); qspi->trans_pos.trans = trans; qspi->trans_pos.byte = 0; @@ -1234,6 +1236,7 @@ int bcm_qspi_probe(struct platform_device *pdev, master->cleanup = bcm_qspi_cleanup; master->dev.of_node = dev->of_node; master->num_chipselect = NUM_CHIPSELECT; + master->use_gpio_descriptors = true; qspi->big_endian = of_device_is_big_endian(dev->of_node);