[04/12] drm/i915: Add i9xx_lut_8()
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Message ID 20191107151725.10507-5-ville.syrjala@linux.intel.com
State New
Headers show
Series
  • drm/i915: Gamma cleanups
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Commit Message

Ville Syrjala Nov. 7, 2019, 3:17 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We have a nice little helper to compute a single LUT entry
for everything except the 8bpc legacy gamma mode. Let's
complete the set.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Emil Velikov Feb. 20, 2020, 11:20 a.m. UTC | #1
On Thu, 7 Nov 2019 at 15:17, Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We have a nice little helper to compute a single LUT entry
> for everything except the 8bpc legacy gamma mode. Let's
> complete the set.
>
At a later stage one could rename this & the 10bit one, moving them to
include/drm/.
There are other drivers doing the same thing... not sure if that's
worth it though.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

-Emil
Ville Syrjala Feb. 20, 2020, 1:56 p.m. UTC | #2
On Thu, Feb 20, 2020 at 11:20:05AM +0000, Emil Velikov wrote:
> On Thu, 7 Nov 2019 at 15:17, Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We have a nice little helper to compute a single LUT entry
> > for everything except the 8bpc legacy gamma mode. Let's
> > complete the set.
> >
> At a later stage one could rename this & the 10bit one, moving them to
> include/drm/.
> There are other drivers doing the same thing... not sure if that's
> worth it though.

I'd say no. These are specifically about formatting the LUT entry for
the hw register. I don't really see much benefit from sharing code to
compute hw register values across totally different hardware, even if
the bits happen to match by accident.

The only good exception I can think of are cases where said 
register value comes more or less straight from some cross
vendor spec.

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index f20809d91f85..5443b8ec0a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -367,6 +367,13 @@  static void chv_load_cgm_csc(struct intel_crtc *crtc,
 	I915_WRITE(CGM_PIPE_CSC_COEFF8(pipe), coeffs[8]);
 }
 
+static u32 i9xx_lut_8(const struct drm_color_lut *color)
+{
+	return drm_color_lut_extract(color->red, 8) << 16 |
+		drm_color_lut_extract(color->green, 8) << 8 |
+		drm_color_lut_extract(color->blue, 8);
+}
+
 /* i965+ "10.6" bit interpolated format "even DW" (low 8 bits) */
 static u32 i965_lut_10p6_ldw(const struct drm_color_lut *color)
 {
@@ -410,10 +417,7 @@  static void i9xx_load_luts_internal(const struct intel_crtc_state *crtc_state,
 		const struct drm_color_lut *lut = blob->data;
 
 		for (i = 0; i < 256; i++) {
-			u32 word =
-				(drm_color_lut_extract(lut[i].red, 8) << 16) |
-				(drm_color_lut_extract(lut[i].green, 8) << 8) |
-				drm_color_lut_extract(lut[i].blue, 8);
+			u32 word = i9xx_lut_8(&lut[i]);
 
 			if (HAS_GMCH(dev_priv))
 				I915_WRITE(PALETTE(pipe, i), word);