From patchwork Thu Nov 7 15:32:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lipski, Mikita" X-Patchwork-Id: 11233217 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70DC516B1 for ; Thu, 7 Nov 2019 15:32:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5905E214D8 for ; Thu, 7 Nov 2019 15:32:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5905E214D8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amd.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C6D2C6F716; Thu, 7 Nov 2019 15:32:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from NAM01-SN1-obe.outbound.protection.outlook.com (mail-eopbgr820089.outbound.protection.outlook.com [40.107.82.89]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E48F6F705; Thu, 7 Nov 2019 15:32:33 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZVhYQdtDpiGTLxSQxO9mrfgXFM/9ibyyVXP310gnHHB43ni/NP3YHrgXrszVZLxZ+G3Zq8rlD5F5Steb3+gFG5CVtN0PEOZnt3WPeaGGjBF4MKWd5fi6VWFYSGb4T17asHnbFpC/p+aDjyN3hG4Z4u/1eMp5iwiQhS5Aeu40JG/7jfnxQZagvhWw/RDLD2Pgm6lN8tGPOWmPK9veVHxGHPruB0XVgji9KhybiM8GiknV6wk4CCZtWPvJWqQie/aO/umPpV4vVK1d2yzKvE+wdFOT41f+q3qMPr7rgQxSZZTfaT+tVMHyATmlj9W8cVb4FUAMWiiTbMdWoYTtxjySng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LB+7Yu/a/hqjAX3Pdl9lX4Hkq8VwR17k62KPaquM8zk=; b=mAlc+JuQbzzIEt4JTTmGCUUn8YbSaU+/vla5jy36nw9F3m59lNKXt6gKoYD0UPIv2vVN9BH5GbJI1Ylgqn8U50XdN1FvKPZUuYJEiZikjB8ODpKKSoCW37mxQCw8gnlMs1bmMucxAByTb72uuGR5Egup6djlUxFZb9SxbQfK2KwBvKRWIpIyW5xvmmtyfXcc+RqHKrfHQzHc+6sjqU02una4VwmIpobhiZfBYDXz1I2LQrnm0DikeycyTTLoDtVcXs6qwjAfJsFksY+4GiR1nm+omx0Wb8PrmSsvZRYWC7X2oXEbH3HZf6dsQRYteVtrpDPDWL16xoxyng3bWo0+gQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.freedesktop.org smtp.mailfrom=amd.com; dmarc=permerror action=none header.from=amd.com; dkim=none (message not signed); arc=none Received: from DM5PR12CA0016.namprd12.prod.outlook.com (2603:10b6:4:1::26) by BYAPR12MB3512.namprd12.prod.outlook.com (2603:10b6:a03:134::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2430.24; Thu, 7 Nov 2019 15:32:28 +0000 Received: from DM3NAM03FT049.eop-NAM03.prod.protection.outlook.com (2a01:111:f400:7e49::204) by DM5PR12CA0016.outlook.office365.com (2603:10b6:4:1::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2430.22 via Frontend Transport; Thu, 7 Nov 2019 15:32:28 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXMB02.amd.com (165.204.84.17) by DM3NAM03FT049.mail.protection.outlook.com (10.152.83.125) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.2430.20 via Frontend Transport; Thu, 7 Nov 2019 15:32:28 +0000 Received: from SATLEXMB01.amd.com (10.181.40.142) by SATLEXMB02.amd.com (10.181.40.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 7 Nov 2019 09:32:26 -0600 Received: from mlipski-pc.amd.com (10.180.168.240) by SATLEXMB01.amd.com (10.181.40.142) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Thu, 7 Nov 2019 09:32:26 -0600 From: To: Subject: [PATCH v6 10/13] drm/dp_mst: Add DSC enablement helpers to DRM Date: Thu, 7 Nov 2019 10:32:09 -0500 Message-ID: <20191107153212.1145-11-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191107153212.1145-1-mikita.lipski@amd.com> References: <20191107153212.1145-1-mikita.lipski@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(39860400002)(396003)(346002)(376002)(428003)(189003)(199004)(446003)(2906002)(51416003)(81156014)(1076003)(81166006)(86362001)(478600001)(426003)(16586007)(7696005)(76176011)(50226002)(5660300002)(70586007)(70206006)(53416004)(4326008)(6916009)(26005)(36756003)(47776003)(2876002)(186003)(2351001)(8676002)(336012)(48376002)(50466002)(8936002)(6666004)(356004)(305945005)(54906003)(316002)(2616005)(476003)(126002)(11346002)(14444005)(486006)(16060500001); DIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR12MB3512; H:SATLEXMB02.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; MX:1; A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 425f2adf-0957-44ed-8844-08d76397b2d4 X-MS-TrafficTypeDiagnostic: BYAPR12MB3512: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3826; X-Forefront-PRVS: 0214EB3F68 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jjxnQQhOYeIsv2AfJIP/3AO9IqVj/j7mlDnUnHy7rXr2QW1kts7h238b+WTxr/3lchJShDx496nn1zopa/bYBd8LoTkl/UbZwXLz+8SG8A53Bie90hfBHSAfQtvF2Vd465R9SAsmMz5ZAMmCtrJkaQe6VQ9MFiPlBWwV7KsmyRW3EbmMRmHtUbRcnnQ/p1fnE2+lctshg+z48RSl//K+Clvi7rwtIrJN443+Fdabf+COAxd0k9l/emO0fh1z/TgOO0QYBKLknDP+Ii9FoI4GDndB0EtQb7C0WdQWuMaMgpe8LgeHY0W2lQaV/AGuZ5Tftv4b1DwrsV0ETQozI8JnM1j5uBNf+L7SJemKLkw2VDGyTk5eX6HFpHBqQKX9yy34ziD9cj2vO4Vmxs305CFsWVMRY3DQPUzqNnGsCvLWjp37e56Ljulh48/1QsepndKD X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2019 15:32:28.6758 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 425f2adf-0957-44ed-8844-08d76397b2d4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3512 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LB+7Yu/a/hqjAX3Pdl9lX4Hkq8VwR17k62KPaquM8zk=; b=ybXVBFjzYe6CQ0BZxIL9c/wDEDGHF0TR3i9ZUFRHBoYbA6ezcgDy3V2JsgVOKCS+KrgsrCK9Wfwg+VPA4k7oz87INiXKyAkMmGz6u68CIuEJBTqRRsEK7eqlze78dU7hf7QtWStTLbUhyVImvPz8A9Ku0iUrgu0c6T2Dmpk5vYg= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Mikita Lipski Adding a helper function to be called by drivers outside of DRM to enable DSC on the MST ports. Function is called to recalculate VCPI allocation if DSC is enabled and raise the DSC flag to enable. In case of disabling DSC the flag is set to false and recalculation of VCPI slots is expected to be done in encoder's atomic_check. v2: squash separate functions into one and call it per port Cc: Harry Wentland Cc: Lyude Paul Signed-off-by: Mikita Lipski --- drivers/gpu/drm/drm_dp_mst_topology.c | 76 +++++++++++++++++++++++++++ include/drm/drm_dp_mst_helper.h | 5 ++ 2 files changed, 81 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index d5df02315e14..86e20dbf3cce 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -3871,6 +3871,82 @@ drm_dp_mst_atomic_check_topology_state(struct drm_dp_mst_topology_mgr *mgr, return 0; } +/** + * drm_dp_mst_atomic_enable_dsc - Set DSC Enable Flag to On/Off + * @state: Pointer to the new &struct drm_dp_mst_topology_state + * @pointer: Pointer to the affected MST Port + * @pbn: Newly recalculated bw required for link with DSC enabled + * @enable: Boolean flag enabling or disabling DSC on the port + * + * This function enables DSC on the given Port + * by recalculating its vcpi from pbn provided + * and sets dsc_enable flag to keep track of which + * ports have DSC enabled + * + * See also: + * drm_dp_helper_update_vcpi_slots_for_dsc() + */ +int drm_dp_mst_atomic_enable_dsc(struct drm_atomic_state *state, + struct drm_dp_mst_port *port, + int pbn, + bool enable) +{ + struct drm_dp_mst_topology_state *mst_state; + struct drm_dp_vcpi_allocation *pos; + struct drm_connector_state *conn_state; + struct drm_crtc *crtc; + struct drm_crtc_state *crtc_state; + bool found = false; + int vcpi = 0; + + mst_state = drm_atomic_get_mst_topology_state(state, port->mgr); + + if (IS_ERR(mst_state)) + return PTR_ERR(mst_state); + + list_for_each_entry(pos, &mst_state->vcpis, next) { + if (pos->port == port) { + found = true; + break; + } + } + + if (!found) + return -EINVAL; + + if (pos->dsc_enabled == enable) + return 0; + + if (enable) { + vcpi = drm_dp_atomic_find_vcpi_slots(state, port->mgr, port, pbn); + + if (vcpi < 0) + return -EINVAL; + } + + pos->dsc_enabled = enable; + + conn_state = drm_atomic_get_connector_state(mst_state->base.state, + port->connector); + + if (IS_ERR(conn_state)) + return PTR_ERR(conn_state); + + crtc = conn_state->crtc; + + if (!crtc) + return -EINVAL; + + crtc_state = drm_atomic_get_crtc_state(mst_state->base.state, crtc); + + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + crtc_state->mode_changed = true; + + return vcpi; +} +EXPORT_SYMBOL(drm_dp_mst_atomic_enable_dsc); /** * drm_dp_mst_atomic_check - Check that the new state of an MST topology in an * atomic update is valid diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 4cf738545dfb..0a9aed1c00ff 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -431,6 +431,7 @@ struct drm_dp_payload { struct drm_dp_vcpi_allocation { struct drm_dp_mst_port *port; int vcpi; + bool dsc_enabled; struct list_head next; }; @@ -662,6 +663,10 @@ int __must_check drm_dp_atomic_find_vcpi_slots(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn); +int drm_dp_mst_atomic_enable_dsc(struct drm_atomic_state *state, + struct drm_dp_mst_port *port, + int pbn, + bool enable); int __must_check drm_dp_atomic_release_vcpi_slots(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr,