| Message ID | 20191108144240.204202-6-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm: gic: Test SPIs and interrupt groups | expand |
Hi, On 11/8/19 2:42 PM, Andre Przywara wrote: > So far our IRQ handler routine checks that the received IRQ is actually > the one SGI (IPI) that we are using for our testing. > > To make the IRQ testing routine more versatile, also allow the IRQ to be > one test SPI (shared interrupt). > We use the penultimate IRQ of the first SPI group for that purpose. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arm/gic.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arm/gic.c b/arm/gic.c > index eca9188..c909668 100644 > --- a/arm/gic.c > +++ b/arm/gic.c > @@ -23,6 +23,7 @@ > > #define IPI_SENDER 1 > #define IPI_IRQ 1 > +#define SPI_IRQ (GIC_FIRST_SPI + 30) > > struct gic { > struct { > @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused) > > smp_rmb(); /* pairs with wmb in stats_reset */ > ++acked[smp_processor_id()]; > - check_ipi_sender(irqstat); > - check_irqnr(irqnr, IPI_IRQ); > + if (irqnr < GIC_NR_PRIVATE_IRQS) { > + check_ipi_sender(irqstat); > + check_irqnr(irqnr, IPI_IRQ); > + } else { > + check_irqnr(irqnr, SPI_IRQ); > + } > smp_wmb(); /* pairs with rmb in check_acked */ > } > Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Hi Andre, On 11/8/19 3:42 PM, Andre Przywara wrote: > So far our IRQ handler routine checks that the received IRQ is actually > the one SGI (IPI) that we are using for our testing. > > To make the IRQ testing routine more versatile, also allow the IRQ to be > one test SPI (shared interrupt). > We use the penultimate IRQ of the first SPI group for that purpose. I don't get the above sentence. What do you mean by group here? > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arm/gic.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arm/gic.c b/arm/gic.c > index eca9188..c909668 100644 > --- a/arm/gic.c > +++ b/arm/gic.c > @@ -23,6 +23,7 @@ > > #define IPI_SENDER 1 > #define IPI_IRQ 1 > +#define SPI_IRQ (GIC_FIRST_SPI + 30) > > struct gic { > struct { > @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused) > > smp_rmb(); /* pairs with wmb in stats_reset */ > ++acked[smp_processor_id()]; > - check_ipi_sender(irqstat); > - check_irqnr(irqnr, IPI_IRQ); > + if (irqnr < GIC_NR_PRIVATE_IRQS) { > + check_ipi_sender(irqstat); > + check_irqnr(irqnr, IPI_IRQ); > + } else { > + check_irqnr(irqnr, SPI_IRQ); I think I would rather have different handlers per test. I have rebased the ITS series and I use a different LPI handler there. I think you shouldn't be obliged to hardcode a specific intid in the handler. Can't we have static void setup_irq(handler_t handler)? Thanks Eric > + } > smp_wmb(); /* pairs with rmb in check_acked */ > } > >
diff --git a/arm/gic.c b/arm/gic.c index eca9188..c909668 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -23,6 +23,7 @@ #define IPI_SENDER 1 #define IPI_IRQ 1 +#define SPI_IRQ (GIC_FIRST_SPI + 30) struct gic { struct { @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused) smp_rmb(); /* pairs with wmb in stats_reset */ ++acked[smp_processor_id()]; - check_ipi_sender(irqstat); - check_irqnr(irqnr, IPI_IRQ); + if (irqnr < GIC_NR_PRIVATE_IRQS) { + check_ipi_sender(irqstat); + check_irqnr(irqnr, IPI_IRQ); + } else { + check_irqnr(irqnr, SPI_IRQ); + } smp_wmb(); /* pairs with rmb in check_acked */ }
So far our IRQ handler routine checks that the received IRQ is actually the one SGI (IPI) that we are using for our testing. To make the IRQ testing routine more versatile, also allow the IRQ to be one test SPI (shared interrupt). We use the penultimate IRQ of the first SPI group for that purpose. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arm/gic.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)