diff mbox series

[v1] drm/i915: Support more QGV points

Message ID 20191122111514.22181-1-stanislav.lisovskiy@intel.com (mailing list archive)
State New, archived
Headers show
Series [v1] drm/i915: Support more QGV points | expand

Commit Message

Lisovskiy, Stanislav Nov. 22, 2019, 11:15 a.m. UTC
According to BSpec 53998, there is a mask of
max 8 SAGV/QGV points we need to support.

Bumping this up to keep the CI happy(currently
preventing tests to run), until all SAGV
changes land.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h         | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

Comments

Jani Nikula Nov. 22, 2019, 11:46 a.m. UTC | #1
On Fri, 22 Nov 2019, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote:
> According to BSpec 53998, there is a mask of
> max 8 SAGV/QGV points we need to support.
>
> Bumping this up to keep the CI happy(currently
> preventing tests to run), until all SAGV
> changes land.
>
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h         | 4 ++++
>  2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 86e75e858008..ec4c127a40b6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -15,7 +15,7 @@ struct intel_qgv_point {
>  };
>  
>  struct intel_qgv_info {
> -	struct intel_qgv_point points[3];
> +	struct intel_qgv_point points[I915_NUM_SAGV_POINTS];
>  	u8 num_points;
>  	u8 num_channels;
>  	u8 t_bl;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index fdae5a919bc8..bd8ce341be22 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -621,6 +621,10 @@ struct i915_gem_mm {
>  
>  #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
>  
> +/* BSpec precisely defines this */
> +#define I915_NUM_SAGV_POINTS 8

Please put this in intel_bw.c, and we can move it out when we need it
elsewhere. And at that point, let's put it somewhere other than
i915_drv.h which should be reduced in size, not increased.

BR,
Jani.


> +
> +
>  struct ddi_vbt_port_info {
>  	/* Non-NULL if port present. */
>  	const struct child_device_config *child;
Lisovskiy, Stanislav Nov. 22, 2019, 11:57 a.m. UTC | #2
On Fri, 2019-11-22 at 13:46 +0200, Jani Nikula wrote:
> On Fri, 22 Nov 2019, Stanislav Lisovskiy <
> stanislav.lisovskiy@intel.com> wrote:
> > According to BSpec 53998, there is a mask of
> > max 8 SAGV/QGV points we need to support.
> > 
> > Bumping this up to keep the CI happy(currently
> > preventing tests to run), until all SAGV
> > changes land.
> > 
> > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
> >  drivers/gpu/drm/i915/i915_drv.h         | 4 ++++
> >  2 files changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> > b/drivers/gpu/drm/i915/display/intel_bw.c
> > index 86e75e858008..ec4c127a40b6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -15,7 +15,7 @@ struct intel_qgv_point {
> >  };
> >  
> >  struct intel_qgv_info {
> > -	struct intel_qgv_point points[3];
> > +	struct intel_qgv_point points[I915_NUM_SAGV_POINTS];
> >  	u8 num_points;
> >  	u8 num_channels;
> >  	u8 t_bl;
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index fdae5a919bc8..bd8ce341be22 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -621,6 +621,10 @@ struct i915_gem_mm {
> >  
> >  #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no
> > recovery? */
> >  
> > +/* BSpec precisely defines this */
> > +#define I915_NUM_SAGV_POINTS 8
> 
> Please put this in intel_bw.c, and we can move it out when we need it
> elsewhere. And at that point, let's put it somewhere other than
> i915_drv.h which should be reduced in size, not increased.

Yes sure, looks like it is still doesn't work properly for TGL - 
there seems to be this 3 hardcoded in other places, so I will 
probably still test it locally more a bit.
There seems to be also hardcoded stuff in algorithm - this 
all would be fixed by my SAGV patch, but that one has much more
stuff to change. So need to figure out now some temporary
but still working solution on how just to increase amount 
of QGV points but without pulling in major SAGV changes.

Stan

> 
> BR,
> Jani.
> 
> 
> > +
> > +
> >  struct ddi_vbt_port_info {
> >  	/* Non-NULL if port present. */
> >  	const struct child_device_config *child;
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 86e75e858008..ec4c127a40b6 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -15,7 +15,7 @@  struct intel_qgv_point {
 };
 
 struct intel_qgv_info {
-	struct intel_qgv_point points[3];
+	struct intel_qgv_point points[I915_NUM_SAGV_POINTS];
 	u8 num_points;
 	u8 num_channels;
 	u8 t_bl;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fdae5a919bc8..bd8ce341be22 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -621,6 +621,10 @@  struct i915_gem_mm {
 
 #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
 
+/* BSpec precisely defines this */
+#define I915_NUM_SAGV_POINTS 8
+
+
 struct ddi_vbt_port_info {
 	/* Non-NULL if port present. */
 	const struct child_device_config *child;