| Message ID | 1574684229-26600-2-git-send-email-ankit.p.navik@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Dynamic EU configuration of Slice/Sub-slice/EU | expand |
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 6f1e618..ef33985 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -711,6 +711,7 @@ i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags) } trace_i915_context_create(ctx); + atomic_set(&ctx->req_cnt, 0); return ctx; } diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h index c060bc4..3931c06 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h @@ -168,6 +168,11 @@ struct i915_gem_context { */ struct radix_tree_root handles_vma; + /** req_cnt: tracks the pending commands, based on which we decide to + * go for low/medium/high load configuration of the GPU. + */ + atomic_t req_cnt; + /** jump_whitelist: Bit array for tracking cmds during cmdparsing * Guarded by struct_mutex */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 7a87e82..83f4392 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -2700,6 +2700,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, if (eb.batch->private) intel_engine_pool_mark_active(eb.batch->private, eb.request); + atomic_inc(&eb.gem_context->req_cnt); + trace_i915_request_queue(eb.request, eb.batch_flags); err = eb_submit(&eb); err_request: diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index e533ff7..bf2c7a5 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1947,6 +1947,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine) submit = true; last = rq; + + if (atomic_read(&rq->gem_context->req_cnt) > 0) + atomic_dec(&rq->gem_context->req_cnt); } }
This patch gives us the active pending request count which is yet to be submitted to the GPU. V2: * Change 64-bit to atomic for request count. (Tvrtko Ursulin) V3: * Remove mutex for request count. * Rebase. * Fixes hitting underflow for predictive request. (Tvrtko Ursulin) V4: * Rebase. V5: * Rebase. V6 * Rebase. Cc: Vipin Anand <vipin.anand@intel.com> Signed-off-by: Ankit Navik <ankit.p.navik@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 5 +++++ drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 ++ drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++ 4 files changed, 11 insertions(+)