[4/4] drm/i915: Try hard to bind the context
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Message ID 20191202144702.2536644-4-chris@chris-wilson.co.uk
State New
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Series
  • [1/4] drm/i915: Lift i915_vma_pin() out of intel_renderstate_emit()
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Commit Message

Chris Wilson Dec. 2, 2019, 2:47 p.m. UTC
It is not acceptable for context pinning to fail with -ENOSPC as we
should always be able to make space in the GGTT. The only reason we may
fail is that other "temporary" context pins are reserving their space
and we need to wait for an available slot.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/676
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

Patch
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diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 10b3d6d44045..477086d5e777 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1934,9 +1934,22 @@  int gen6_ppgtt_pin(struct i915_ppgtt *base)
 	 * size. We allocate at the top of the GTT to avoid fragmentation.
 	 */
 	if (!atomic_read(&ppgtt->pin_count)) {
-		err = i915_vma_pin(ppgtt->vma,
-				   0, GEN6_PD_ALIGN,
-				   PIN_GLOBAL | PIN_HIGH);
+		do {
+			struct i915_address_space *vm = ppgtt->vma->vm;
+
+			err = i915_vma_pin(ppgtt->vma,
+					   0, GEN6_PD_ALIGN,
+					   PIN_GLOBAL | PIN_HIGH);
+			if (err != -ENOSPC)
+				break;
+
+			/* We don't take no for an answer! */
+			mutex_lock(&vm->mutex);
+			err = i915_gem_evict_vm(vm);
+			mutex_unlock(&vm->mutex);
+			if (err)
+				break;
+		} while (1);
 	}
 	if (!err)
 		atomic_inc(&ppgtt->pin_count);