| Message ID | 20191202193359.703709-5-adrian.ratiu@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Genericize DW MIPI DSI bridge and add i.MX 6 driver | expand |
On Mon, Dec 02, 2019 at 09:33:59PM +0200, Adrian Ratiu wrote: > This provides an example DT binding for the MIPI DSI host controller > present on the i.MX6 SoC based on Synopsis DesignWare v1.01 IP. > > Cc: Rob Herring <robh@kernel.org> > Cc: Neil Armstrong <narmstrong@baylibre.com> > Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.com> > Signed-off-by: Martyn Welch <martyn.welch@collabora.com> > Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com> > --- > .../display/imx/fsl,mipi-dsi-imx6.yaml | 136 ++++++++++++++++++ > 1 file changed, 136 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml Run 'make dt_binding_check' and fix the errors. See Documentation/devicetree/writing-schema.rst. > > diff --git a/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml > new file mode 100644 > index 000000000000..8c9603c28240 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml > @@ -0,0 +1,136 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/fsl,mipi-dsi-imx6.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX6 DW MIPI DSI Host Controller > + > +description: > + The DSI host controller is a Synopsys DesignWare MIPI DSI v1.01 IP with a companion PHY IP. > + > + These DT bindings follow the Synopsys DW MIPI DSI bindings defined in > + Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt with > + the following device-specific properties. > + > +properties: > + compatible: > + const: [ "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi" ] Not valid json-schema. You want 'items' with 2 'const' entries. > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: Module Clock > + - description: DSI bus clock > + minItems: 2 > + maxItems: 2 Don't need these. The min/max is implied by length of 'items'. > + > + clock-names: > + items: > + - const: pclk > + - const: ref > + minItems: 2 > + maxItems: 2 > + > + fsl,gpr: > + description: Phandle to the iomuxc-gpr region containing the multiplexer control register. > + const: *gpr Not a const. Should be a phandle type. > + > + ports: > + type: object > + description: > + A node containing DSI input & output port nodes with endpoint > + definitions as documented in > + Documentation/devicetree/bindings/media/video-interfaces.txt > + Documentation/devicetree/bindings/graph.txt > + properties: > + port@0: > + type: object > + description: > + DSI input port node, connected to the ltdc rgb output port. > + > + port@1: > + type: object > + description: > + DSI output port node, connected to a panel or a bridge input port" > + > +patternProperties: > + "^(panel|panel-dsi)@[0-9]$": DSI virtual channels are 0-3 only. Do you really need both node names? > + type: object > + description: > + A node containing the panel or bridge description as documented in > + Documentation/devicetree/bindings/display/mipi-dsi-bus.txt > + properties: > + port: > + type: object > + description: > + Panel or bridge port node, connected to the DSI output port (port@1) > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 0 > + > +required: > + - "#address-cells" > + - "#size-cells" > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - ports > + > +additionalProperties: false > + > +examples: > + - | > + dsi: dsi@21e0000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi"; > + reg = <0x021e0000 0x4000>; > + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; > + fsl,gpr = <&gpr>; > + clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>, > + <&clks IMX6QDL_CLK_MIPI_IPG>; > + clock-names = "ref", "pclk"; > + > + ports { > + port@0 { > + reg = <0>; > + dsi_in: endpoint { > + remote-endpoint = <<dc_ep1_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + dsi_out: endpoint { > + remote-endpoint = <&panel_in>; > + }; > + }; > + }; > + > + panel@0 { > + compatible = "sharp,ls032b3sx01"; > + reg = <0>; > + reset-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>; > + > + ports { > + port@0 { > + panel_in: endpoint { > + remote-endpoint = <&dsi_out>; > + }; > + }; > + }; > + }; > + }; > + > +... > -- > 2.24.0 >
diff --git a/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml new file mode 100644 index 000000000000..8c9603c28240 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/fsl,mipi-dsi-imx6.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6 DW MIPI DSI Host Controller + +description: + The DSI host controller is a Synopsys DesignWare MIPI DSI v1.01 IP with a companion PHY IP. + + These DT bindings follow the Synopsys DW MIPI DSI bindings defined in + Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt with + the following device-specific properties. + +properties: + compatible: + const: [ "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi" ] + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Module Clock + - description: DSI bus clock + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: ref + minItems: 2 + maxItems: 2 + + fsl,gpr: + description: Phandle to the iomuxc-gpr region containing the multiplexer control register. + const: *gpr + + ports: + type: object + description: + A node containing DSI input & output port nodes with endpoint + definitions as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + Documentation/devicetree/bindings/graph.txt + properties: + port@0: + type: object + description: + DSI input port node, connected to the ltdc rgb output port. + + port@1: + type: object + description: + DSI output port node, connected to a panel or a bridge input port" + +patternProperties: + "^(panel|panel-dsi)@[0-9]$": + type: object + description: + A node containing the panel or bridge description as documented in + Documentation/devicetree/bindings/display/mipi-dsi-bus.txt + properties: + port: + type: object + description: + Panel or bridge port node, connected to the DSI output port (port@1) + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + - interrupts + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + dsi: dsi@21e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x021e0000 0x4000>; + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + fsl,gpr = <&gpr>; + clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>, + <&clks IMX6QDL_CLK_MIPI_IPG>; + clock-names = "ref", "pclk"; + + ports { + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <<dc_ep1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + panel@0 { + compatible = "sharp,ls032b3sx01"; + reg = <0>; + reset-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>; + + ports { + port@0 { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; + }; + +...