diff mbox series

can: xilinx_can: Fix missing Rx can packets on CANFD2.0

Message ID 1575371522-3030-1-git-send-email-srinivas.neeli@xilinx.com (mailing list archive)
State Mainlined
Commit 9ab79b06ddf3cdf6484d60b3e5fe113e733145c8
Headers show
Series can: xilinx_can: Fix missing Rx can packets on CANFD2.0 | expand

Commit Message

Srinivas Neeli Dec. 3, 2019, 11:12 a.m. UTC 
CANFD2.0 core uses BRAM for storing acceptance filter ID(AFID) and MASK
(AFMASK)registers. So by default AFID and AFMASK registers contain random
data. Due to random data, not able to receive all CAN ids.

Initializing AFID and AFMASK registers with Zero before enabling
acceptance filter to receive all packets irrespective of ID and Mask.

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Reviewed-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 drivers/net/can/xilinx_can.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Marc Kleine-Budde Dec. 3, 2019, 11:16 a.m. UTC | #1 
On 12/3/19 12:12 PM, Srinivas Neeli wrote:
> CANFD2.0 core uses BRAM for storing acceptance filter ID(AFID) and MASK
> (AFMASK)registers. So by default AFID and AFMASK registers contain random
> data. Due to random data, not able to receive all CAN ids.
> 
> Initializing AFID and AFMASK registers with Zero before enabling
> acceptance filter to receive all packets irrespective of ID and Mask.
> 
> Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
> Reviewed-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Please add a "Fixes:" tag.

Some nitpicks: Please add your S-o-B as the last one. Further I'd be
happier, if Naga Sureshkumar Relli adds the Reviewed-by in a seperate mail.

Marc
diff mbox series

Patch

diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 464af939cd8a..c1dbab8c896d 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -60,6 +60,8 @@  enum xcan_reg {
 	XCAN_TXMSG_BASE_OFFSET	= 0x0100, /* TX Message Space */
 	XCAN_RXMSG_BASE_OFFSET	= 0x1100, /* RX Message Space */
 	XCAN_RXMSG_2_BASE_OFFSET	= 0x2100, /* RX Message Space */
+	XCAN_AFR_2_MASK_OFFSET	= 0x0A00, /* Acceptance Filter MASK */
+	XCAN_AFR_2_ID_OFFSET	= 0x0A04, /* Acceptance Filter ID */
 };
 
 #define XCAN_FRAME_ID_OFFSET(frame_base)	((frame_base) + 0x00)
@@ -1809,6 +1811,11 @@  static int xcan_probe(struct platform_device *pdev)
 
 	pm_runtime_put(&pdev->dev);
 
+	if (priv->devtype.flags & XCAN_FLAG_CANFD_2) {
+		priv->write_reg(priv, XCAN_AFR_2_ID_OFFSET, 0x00000000);
+		priv->write_reg(priv, XCAN_AFR_2_MASK_OFFSET, 0x00000000);
+	}
+
 	netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx buffers: actual %d, using %d\n",
 		   priv->reg_base, ndev->irq, priv->can.clock.freq,
 		   hw_tx_max, priv->tx_max);