[v2] x86: support Atom Tremont
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Message ID e57df0af-6802-9441-f8bd-9e9b40355952@suse.com
State New, archived
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  • [v2] x86: support Atom Tremont
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Commit Message

Jan Beulich Dec. 5, 2019, 3:43 p.m. UTC
Add model 0x86 to relevant switch() statements, as per SDM 069 Vol 4.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Drop spec_ctrl.c adjustments.

Comments

Andrew Cooper Dec. 5, 2019, 6:16 p.m. UTC | #1
On 05/12/2019 15:43, Jan Beulich wrote:
> Add model 0x86 to relevant switch() statements, as per SDM 069 Vol 4.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

Patch
diff mbox series

--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -238,6 +238,8 @@  static void do_get_hw_residencies(void *
     case 0x5F:
     /* Goldmont Plus */
     case 0x7A:
+    /* Tremont */
+    case 0x86:
         GET_PC2_RES(hw_res->pc2);
         GET_PC3_RES(hw_res->pc3);
         GET_PC6_RES(hw_res->pc6);
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2778,6 +2778,8 @@  static const struct lbr_info *last_branc
         case 0x66:
         /* Goldmont Plus */
         case 0x7a:
+        /* Tremont */
+        case 0x86:
         /* Kaby Lake */
         case 0x8e: case 0x9e:
             return sk_lbr;