From patchwork Thu Dec 5 23:40:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 11275515 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C5DB3138D for ; Thu, 5 Dec 2019 23:41:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7626A24659 for ; Thu, 5 Dec 2019 23:41:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7626A24659 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=chris-wilson.co.uk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 05D9A6F92D; Thu, 5 Dec 2019 23:41:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 090E96F92D for ; Thu, 5 Dec 2019 23:41:06 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 19477481-1500050 for multiple; Thu, 05 Dec 2019 23:41:00 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 5 Dec 2019 23:40:59 +0000 Message-Id: <20191205234059.1010030-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/gt: Trim gen6 ppgtt updates to PD cachelines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" It appears now that we have the ring TLB invalidation in place, we need only update the page directory cachelines that we have altered. A great reduction from rewriting the whole 2MiB ppgtt on every update. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 4da1dfe11007..6a2183442fed 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1693,15 +1693,18 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; } -static void gen6_flush_pd(struct gen6_ppgtt *ppgtt) +static void gen6_flush_pd(struct gen6_ppgtt *ppgtt, u64 start, u64 end) { struct i915_page_directory * const pd = ppgtt->base.pd; struct i915_page_table *pt; unsigned int pde; + start = round_down(start, SZ_64K); + end = round_up(end, SZ_64K) - start; + mutex_lock(&ppgtt->flush); - gen6_for_all_pdes(pt, pd, pde) + gen6_for_each_pde(pt, pd, start, end, pde) gen6_write_pde(ppgtt, pde, pt); ioread32(ppgtt->pd_addr + pde - 1); @@ -1754,8 +1757,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm, spin_unlock(&pd->lock); if (i915_vma_is_bound(ppgtt->vma, I915_VMA_GLOBAL_BIND)) - /* Rewrite them all! Anything less misses an invalidate. */ - gen6_flush_pd(ppgtt); + gen6_flush_pd(ppgtt, from, start); goto out; @@ -1844,7 +1846,7 @@ static int pd_vma_bind(struct i915_vma *vma, px_base(ppgtt->base.pd)->ggtt_offset = ggtt_offset * sizeof(gen6_pte_t); ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset; - gen6_flush_pd(ppgtt); + gen6_flush_pd(ppgtt, 0, ppgtt->base.vm.total); return 0; }