arm64: dts: rockchip: Change RK809 PMIC interrupt polarity
diff mbox series

Message ID 20191206154247.28057-1-miquel.raynal@bootlin.com
State New
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Series
  • arm64: dts: rockchip: Change RK809 PMIC interrupt polarity
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Commit Message

Miquel Raynal Dec. 6, 2019, 3:42 p.m. UTC
PMIC interrupt can be active high or active low depending on BIT(1) of
the GPIO_INT_CFG pin. The default is 0x1, which means active
high. Change the polarity in the device tree to reflect the default
state.

Without this and with the current code base, the interrupt never stops
triggering while the MFD driver does not see anything to
check/clear/mask so after 100000 spurious IRQs, the kernel simply
desactivates the interrupt:

        irq 36: nobody cared (try booting with the "irqpoll" option)
        [...]
        handlers:
        [<(____ptrval____)>] irq_default_primary_handler threaded
	[<(____ptrval____)>] regmap_irq_thread
        Disabling IRQ #36

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/rockchip/px30-evb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Heiko Stuebner Dec. 6, 2019, 3:48 p.m. UTC | #1
Hi Miquel,

Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:
> PMIC interrupt can be active high or active low depending on BIT(1) of
> the GPIO_INT_CFG pin. The default is 0x1, which means active
> high. Change the polarity in the device tree to reflect the default
> state.
> 
> Without this and with the current code base, the interrupt never stops
> triggering while the MFD driver does not see anything to
> check/clear/mask so after 100000 spurious IRQs, the kernel simply
> desactivates the interrupt:
> 
>         irq 36: nobody cared (try booting with the "irqpoll" option)
>         [...]
>         handlers:
>         [<(____ptrval____)>] irq_default_primary_handler threaded
> 	[<(____ptrval____)>] regmap_irq_thread
>         Disabling IRQ #36
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

*coughs slightly*

mfd: rk808: Set RK817 interrupt polarity to low
https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83

Should be in the current merge window already I guess ;-)

Having this consistent over all rk8xx seemed nicer.


Heiko


> ---
>  arch/arm64/boot/dts/rockchip/px30-evb.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts
> index 869f90cbf0da..a922ea75639d 100644
> --- a/arch/arm64/boot/dts/rockchip/px30-evb.dts
> +++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
> @@ -138,7 +138,7 @@
>  		compatible = "rockchip,rk809";
>  		reg = <0x20>;
>  		interrupt-parent = <&gpio0>;
> -		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +		interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pmic_int>;
>  		rockchip,system-power-controller;
>
Miquel Raynal Dec. 6, 2019, 3:52 p.m. UTC | #2
Hi Heiko,

Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 16:48:00
+0100:

> Hi Miquel,
> 
> Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:
> > PMIC interrupt can be active high or active low depending on BIT(1) of
> > the GPIO_INT_CFG pin. The default is 0x1, which means active
> > high. Change the polarity in the device tree to reflect the default
> > state.
> > 
> > Without this and with the current code base, the interrupt never stops
> > triggering while the MFD driver does not see anything to
> > check/clear/mask so after 100000 spurious IRQs, the kernel simply
> > desactivates the interrupt:
> > 
> >         irq 36: nobody cared (try booting with the "irqpoll" option)
> >         [...]
> >         handlers:
> >         [<(____ptrval____)>] irq_default_primary_handler threaded
> > 	[<(____ptrval____)>] regmap_irq_thread
> >         Disabling IRQ #36
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>  
> 
> *coughs slightly*
> 
> mfd: rk808: Set RK817 interrupt polarity to low
> https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83
> 
> Should be in the current merge window already I guess ;-)

This time I swear I checked your tree. But this time we did not ended
with the same fix so I missed this one *again* :)

> 
> Having this consistent over all rk8xx seemed nicer.

I'm fine with this approach too.

Thanks,
Miquèl
Heiko Stuebner Dec. 6, 2019, 4:01 p.m. UTC | #3
Am Freitag, 6. Dezember 2019, 16:52:50 CET schrieb Miquel Raynal:
> Hi Heiko,
> 
> Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 16:48:00
> +0100:
> 
> > Hi Miquel,
> > 
> > Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:
> > > PMIC interrupt can be active high or active low depending on BIT(1) of
> > > the GPIO_INT_CFG pin. The default is 0x1, which means active
> > > high. Change the polarity in the device tree to reflect the default
> > > state.
> > > 
> > > Without this and with the current code base, the interrupt never stops
> > > triggering while the MFD driver does not see anything to
> > > check/clear/mask so after 100000 spurious IRQs, the kernel simply
> > > desactivates the interrupt:
> > > 
> > >         irq 36: nobody cared (try booting with the "irqpoll" option)
> > >         [...]
> > >         handlers:
> > >         [<(____ptrval____)>] irq_default_primary_handler threaded
> > > 	[<(____ptrval____)>] regmap_irq_thread
> > >         Disabling IRQ #36
> > > 
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>  
> > 
> > *coughs slightly*
> > 
> > mfd: rk808: Set RK817 interrupt polarity to low
> > https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83
> > 
> > Should be in the current merge window already I guess ;-)
> 
> This time I swear I checked your tree. But this time we did not ended
> with the same fix so I missed this one *again* :)

No worries ... I guess I should check where I hid additional patches ;-)

So right now px30 stuff is in the trees:
- mine
- mfd
- phy (first round of dsi phy, refinement pending on the list)
- nvmem (for the otp controller)
- drm (drm/rockchip: vop: add the definition of dclk_pol)
- clk

and pending on lists:
- drm (dsi support + timings)
- phy (refinement as mentioned above)

not submitted yet but planning to get this done this weekend:
- panel driver for px30-evb
- dsi devicetree stuff


Hope this helps a bit to prevent more double work ;-)
Heiko

> 
> > 
> > Having this consistent over all rk8xx seemed nicer.
> 
> I'm fine with this approach too.
> 
> Thanks,
> Miquèl
Miquel Raynal Dec. 6, 2019, 4:34 p.m. UTC | #4
Hi Heiko,

Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 17:01:58
+0100:

> Am Freitag, 6. Dezember 2019, 16:52:50 CET schrieb Miquel Raynal:
> > Hi Heiko,
> > 
> > Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 16:48:00
> > +0100:
> >   
> > > Hi Miquel,
> > > 
> > > Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:  
> > > > PMIC interrupt can be active high or active low depending on BIT(1) of
> > > > the GPIO_INT_CFG pin. The default is 0x1, which means active
> > > > high. Change the polarity in the device tree to reflect the default
> > > > state.
> > > > 
> > > > Without this and with the current code base, the interrupt never stops
> > > > triggering while the MFD driver does not see anything to
> > > > check/clear/mask so after 100000 spurious IRQs, the kernel simply
> > > > desactivates the interrupt:
> > > > 
> > > >         irq 36: nobody cared (try booting with the "irqpoll" option)
> > > >         [...]
> > > >         handlers:
> > > >         [<(____ptrval____)>] irq_default_primary_handler threaded
> > > > 	[<(____ptrval____)>] regmap_irq_thread
> > > >         Disabling IRQ #36
> > > > 
> > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>    
> > > 
> > > *coughs slightly*
> > > 
> > > mfd: rk808: Set RK817 interrupt polarity to low
> > > https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83
> > > 
> > > Should be in the current merge window already I guess ;-)  
> > 
> > This time I swear I checked your tree. But this time we did not ended
> > with the same fix so I missed this one *again* :)  
> 
> No worries ... I guess I should check where I hid additional patches ;-)
> 
> So right now px30 stuff is in the trees:
> - mine
> - mfd
> - phy (first round of dsi phy, refinement pending on the list)
> - nvmem (for the otp controller)
> - drm (drm/rockchip: vop: add the definition of dclk_pol)
> - clk
> 
> and pending on lists:
> - drm (dsi support + timings)
> - phy (refinement as mentioned above)
> 
> not submitted yet but planning to get this done this weekend:
> - panel driver for px30-evb
> - dsi devicetree stuff

Thank you very much for the detailed list! I will soon work on the
PMIC audio support and on secure boot, do not hesitate to ping me if
you see this kind of work coming on the mailing list!

Thanks,
Miquèl
Heiko Stuebner Dec. 6, 2019, 5:09 p.m. UTC | #5
Hi Miquel,

Am Freitag, 6. Dezember 2019, 17:34:53 CET schrieb Miquel Raynal:
> Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 17:01:58
> +0100:
> > Am Freitag, 6. Dezember 2019, 16:52:50 CET schrieb Miquel Raynal:
> > > Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 16:48:00
> > > +0100:
> > > > Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:  
> > > > > PMIC interrupt can be active high or active low depending on BIT(1) of
> > > > > the GPIO_INT_CFG pin. The default is 0x1, which means active
> > > > > high. Change the polarity in the device tree to reflect the default
> > > > > state.
> > > > > 
> > > > > Without this and with the current code base, the interrupt never stops
> > > > > triggering while the MFD driver does not see anything to
> > > > > check/clear/mask so after 100000 spurious IRQs, the kernel simply
> > > > > desactivates the interrupt:
> > > > > 
> > > > >         irq 36: nobody cared (try booting with the "irqpoll" option)
> > > > >         [...]
> > > > >         handlers:
> > > > >         [<(____ptrval____)>] irq_default_primary_handler threaded
> > > > > 	[<(____ptrval____)>] regmap_irq_thread
> > > > >         Disabling IRQ #36
> > > > > 
> > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>    
> > > > 
> > > > *coughs slightly*
> > > > 
> > > > mfd: rk808: Set RK817 interrupt polarity to low
> > > > https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83
> > > > 
> > > > Should be in the current merge window already I guess ;-)  
> > > 
> > > This time I swear I checked your tree. But this time we did not ended
> > > with the same fix so I missed this one *again* :)  
> > 
> > No worries ... I guess I should check where I hid additional patches ;-)
> > 
> > So right now px30 stuff is in the trees:
> > - mine
> > - mfd
> > - phy (first round of dsi phy, refinement pending on the list)
> > - nvmem (for the otp controller)
> > - drm (drm/rockchip: vop: add the definition of dclk_pol)
> > - clk
> > 
> > and pending on lists:
> > - drm (dsi support + timings)
> > - phy (refinement as mentioned above)
> > 
> > not submitted yet but planning to get this done this weekend:
> > - panel driver for px30-evb
> > - dsi devicetree stuff
> 
> Thank you very much for the detailed list! I will soon work on the
> PMIC audio support and on secure boot, do not hesitate to ping me if
> you see this kind of work coming on the mailing list!

I think it's only us (you, Paul and me) working on px30 mainline stuff,
right now so it's only us that should probably coordinate :-)

Secureboot also is of interest to my project, so a Cc would be appreciated ;-)


Heiko
Miquel Raynal Dec. 6, 2019, 5:16 p.m. UTC | #6
Hi Heiko,

Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 18:09:03
+0100:

> Hi Miquel,
> 
> Am Freitag, 6. Dezember 2019, 17:34:53 CET schrieb Miquel Raynal:
> > Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 17:01:58
> > +0100:  
> > > Am Freitag, 6. Dezember 2019, 16:52:50 CET schrieb Miquel Raynal:  
> > > > Heiko Stuebner <heiko@sntech.de> wrote on Fri, 06 Dec 2019 16:48:00
> > > > +0100:  
> > > > > Am Freitag, 6. Dezember 2019, 16:42:47 CET schrieb Miquel Raynal:    
> > > > > > PMIC interrupt can be active high or active low depending on BIT(1) of
> > > > > > the GPIO_INT_CFG pin. The default is 0x1, which means active
> > > > > > high. Change the polarity in the device tree to reflect the default
> > > > > > state.
> > > > > > 
> > > > > > Without this and with the current code base, the interrupt never stops
> > > > > > triggering while the MFD driver does not see anything to
> > > > > > check/clear/mask so after 100000 spurious IRQs, the kernel simply
> > > > > > desactivates the interrupt:
> > > > > > 
> > > > > >         irq 36: nobody cared (try booting with the "irqpoll" option)
> > > > > >         [...]
> > > > > >         handlers:
> > > > > >         [<(____ptrval____)>] irq_default_primary_handler threaded
> > > > > > 	[<(____ptrval____)>] regmap_irq_thread
> > > > > >         Disabling IRQ #36
> > > > > > 
> > > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>      
> > > > > 
> > > > > *coughs slightly*
> > > > > 
> > > > > mfd: rk808: Set RK817 interrupt polarity to low
> > > > > https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/drivers/mfd/rk808.c?h=for-mfd-next&id=dbd16ef53487084816a20f662423ab543a75fc83
> > > > > 
> > > > > Should be in the current merge window already I guess ;-)    
> > > > 
> > > > This time I swear I checked your tree. But this time we did not ended
> > > > with the same fix so I missed this one *again* :)    
> > > 
> > > No worries ... I guess I should check where I hid additional patches ;-)
> > > 
> > > So right now px30 stuff is in the trees:
> > > - mine
> > > - mfd
> > > - phy (first round of dsi phy, refinement pending on the list)
> > > - nvmem (for the otp controller)
> > > - drm (drm/rockchip: vop: add the definition of dclk_pol)
> > > - clk
> > > 
> > > and pending on lists:
> > > - drm (dsi support + timings)
> > > - phy (refinement as mentioned above)
> > > 
> > > not submitted yet but planning to get this done this weekend:
> > > - panel driver for px30-evb
> > > - dsi devicetree stuff  
> > 
> > Thank you very much for the detailed list! I will soon work on the
> > PMIC audio support and on secure boot, do not hesitate to ping me if
> > you see this kind of work coming on the mailing list!  
> 
> I think it's only us (you, Paul and me) working on px30 mainline stuff,
> right now so it's only us that should probably coordinate :-)
> 
> Secureboot also is of interest to my project, so a Cc would be appreciated ;-)
> 

Sure! It's on my December/January task list.

BTW, thanks for all the patches you already contributed!

Cheers,
Miquèl

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts
index 869f90cbf0da..a922ea75639d 100644
--- a/arch/arm64/boot/dts/rockchip/px30-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts
@@ -138,7 +138,7 @@ 
 		compatible = "rockchip,rk809";
 		reg = <0x20>;
 		interrupt-parent = <&gpio0>;
-		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pmic_int>;
 		rockchip,system-power-controller;