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spf=none smtp.mailfrom=linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WwQTphNkaI8MUcOIsymp53jnsSXMTuD5P+0wRp0vh7s=; b=roRJezcNIzHqzX 4pfEBkrX2Jn5c1Qcw9d1WlBL+5ZydafuSSugcxiGWA5htOl1dv7/sKwCEGrLLfh4C6eYvoQeKE8GK 7VtyF38DK7pL4NDeRqPja9GRZ05R4Z1XqrABTLxCiMG0sQMKkIsI61Rbk6fUKKaGbY0SflNEsoRLL +1y2lGtk9OwrGXcNpy6pA6Un3uvtTR+Tu74rbGLzyBeinySq4dAIiDGXpWiJlamHa6ggAiDBA0TbT Ca4W3rQM+l2BHXKi4EbvIPqoieVECB3n6+Qd2JznJFZrAfCLrn8Zd1iJOFQt3bQw3tYMKcnB2T59P OqZcBNo5iuONv3qlQ6bw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1ieK5X-0006mh-Q9; Mon, 09 Dec 2019 14:32:39 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1ieK5S-0006gC-IA for linux-rockchip@lists.infradead.org; Mon, 09 Dec 2019 14:32:36 +0000 Received: from ip5f5a6266.dynamic.kabel-deutschland.de ([95.90.98.102] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1ieK5B-0000zC-83; Mon, 09 Dec 2019 15:32:17 +0100 From: Heiko Stuebner To: a.hajda@samsung.com Subject: [PATCH v5 6/6] drm/rockchip: dsi: add px30 support Date: Mon, 9 Dec 2019 15:31:30 +0100 Message-Id: <20191209143130.4553-7-heiko@sntech.de> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191209143130.4553-1-heiko@sntech.de> References: <20191209143130.4553-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191209_063234_750194_13E213AC X-CRM114-Status: GOOD ( 10.48 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bivvy.bi@rock-chips.com, jernej.skrabec@siol.net, xzy.xu@rock-chips.com, heiko@sntech.de, kuninori.morimoto.gx@renesas.com, jonas@kwiboo.se, sean@poorly.run, narmstrong@baylibre.com, philippe.cornu@st.com, dri-devel@lists.freedesktop.org, hjc@rock-chips.com, yannick.fertre@st.com, linux-rockchip@lists.infradead.org, nickey.yang@rock-chips.com, eddie.cai@rock-chips.com, Laurent.pinchart@ideasonboard.com, Heiko Stuebner , sam@ravnborg.org, christoph.muellner@theobroma-systems.com Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org From: Heiko Stuebner Add the compatible and GRF definitions for the PX30 soc. changes in v5: - rebased on top of 5.5-rc1 - merged with dsi timing change to prevent ordering conflicts Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong --- .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index f16bd1e9b633..f04b5064974d 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -140,6 +140,12 @@ #define DW_MIPI_NEEDS_PHY_CFG_CLK BIT(0) #define DW_MIPI_NEEDS_GRF_CLK BIT(1) +#define PX30_GRF_PD_VO_CON1 0x0438 +#define PX30_DSI_FORCETXSTOPMODE (0xf << 7) +#define PX30_DSI_FORCERXMODE BIT(6) +#define PX30_DSI_TURNDISABLE BIT(5) +#define PX30_DSI_LCDC_SEL BIT(0) + #define RK3288_GRF_SOC_CON6 0x025c #define RK3288_DSI0_LCDC_SEL BIT(6) #define RK3288_DSI1_LCDC_SEL BIT(9) @@ -1127,6 +1133,24 @@ static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev) return 0; } +static const struct rockchip_dw_dsi_chip_data px30_chip_data[] = { + { + .reg = 0xff450000, + .lcdsel_grf_reg = PX30_GRF_PD_VO_CON1, + .lcdsel_big = HIWORD_UPDATE(0, PX30_DSI_LCDC_SEL), + .lcdsel_lit = HIWORD_UPDATE(PX30_DSI_LCDC_SEL, + PX30_DSI_LCDC_SEL), + + .lanecfg1_grf_reg = PX30_GRF_PD_VO_CON1, + .lanecfg1 = HIWORD_UPDATE(0, PX30_DSI_TURNDISABLE | + PX30_DSI_FORCERXMODE | + PX30_DSI_FORCETXSTOPMODE), + + .max_data_lanes = 4, + }, + { /* sentinel */ } +}; + static const struct rockchip_dw_dsi_chip_data rk3288_chip_data[] = { { .reg = 0xff960000, @@ -1195,6 +1219,9 @@ static const struct rockchip_dw_dsi_chip_data rk3399_chip_data[] = { static const struct of_device_id dw_mipi_dsi_rockchip_dt_ids[] = { { + .compatible = "rockchip,px30-mipi-dsi", + .data = &px30_chip_data, + }, { .compatible = "rockchip,rk3288-mipi-dsi", .data = &rk3288_chip_data, }, {