| Message ID | 20191211015446.11477-3-min.guo@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek MUSB Controller Driver | expand |
Hi Matthias, On Wed, Dec 11, 2019 at 09:54:42AM +0800, min.guo@mediatek.com wrote: > From: Min Guo <min.guo@mediatek.com> > > Add musb nodes and usb2 phy nodes for MT2701 > > Signed-off-by: Min Guo <min.guo@mediatek.com> > --- > changes in v9: > 1. Add usb-role-switch > 2. Remove label of usb connector child node > 3. Change usb connector child node compatible as "gpio-usb-b-connector", "usb-b-connector"; > > changes in v8: > 1. no changes > > changes in v7: > 1. Change usb connector child node compatible as "gpio-usb-b-connector" > > changes in v6: > 1. Modify usb connector child node > > changes in v5: > 1. Add usb connector child node > > changes in v4: > 1. no changes > > changes in v3: > 1. no changes > > changes in v2: > 1. Remove phy-names > --- > arch/arm/boot/dts/mt2701-evb.dts | 21 ++++++++++++++++++++ > arch/arm/boot/dts/mt2701.dtsi | 33 ++++++++++++++++++++++++++++++++ > 2 files changed, 54 insertions(+) Can I have your ACK so I can queue this? or please let me know if you want to take it in your tree. Thanks. -Bin.
On 11/12/2019 02:54, min.guo@mediatek.com wrote: > From: Min Guo <min.guo@mediatek.com> > > Add musb nodes and usb2 phy nodes for MT2701 > > Signed-off-by: Min Guo <min.guo@mediatek.com> Applied now to v5.7-next/dts32 Sorry for the long delay! > --- > changes in v9: > 1. Add usb-role-switch > 2. Remove label of usb connector child node > 3. Change usb connector child node compatible as "gpio-usb-b-connector", "usb-b-connector"; > > changes in v8: > 1. no changes > > changes in v7: > 1. Change usb connector child node compatible as "gpio-usb-b-connector" > > changes in v6: > 1. Modify usb connector child node > > changes in v5: > 1. Add usb connector child node > > changes in v4: > 1. no changes > > changes in v3: > 1. no changes > > changes in v2: > 1. Remove phy-names > --- > arch/arm/boot/dts/mt2701-evb.dts | 21 ++++++++++++++++++++ > arch/arm/boot/dts/mt2701.dtsi | 33 ++++++++++++++++++++++++++++++++ > 2 files changed, 54 insertions(+) > > diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts > index be0edb3dae6c..844ed3f971fe 100644 > --- a/arch/arm/boot/dts/mt2701-evb.dts > +++ b/arch/arm/boot/dts/mt2701-evb.dts > @@ -6,6 +6,7 @@ > */ > > /dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > #include "mt2701.dtsi" > > / { > @@ -60,6 +61,15 @@ backlight_lcd: backlight_lcd { > >; > default-brightness-level = <9>; > }; > + > + usb_vbus: regulator@0 { > + compatible = "regulator-fixed"; > + regulator-name = "usb_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&pio 45 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > }; > > &auxadc { > @@ -229,3 +239,14 @@ pins1 { > &uart0 { > status = "okay"; > }; > + > +&usb2 { > + status = "okay"; > + usb-role-switch; > + connector{ > + compatible = "gpio-usb-b-connector", "usb-b-connector"; > + type = "micro"; > + id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; > + vbus-supply = <&usb_vbus>; > + }; > +}; > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi > index 180377e56ef4..a6b1434e83fb 100644 > --- a/arch/arm/boot/dts/mt2701.dtsi > +++ b/arch/arm/boot/dts/mt2701.dtsi > @@ -670,6 +670,39 @@ u3port1: usb-phy@1a244900 { > }; > }; > > + usb2: usb@11200000 { > + compatible = "mediatek,mt2701-musb", > + "mediatek,mtk-musb"; > + reg = <0 0x11200000 0 0x1000>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; > + interrupt-names = "mc"; > + phys = <&u2port2 PHY_TYPE_USB2>; > + dr_mode = "otg"; > + clocks = <&pericfg CLK_PERI_USB0>, > + <&pericfg CLK_PERI_USB0_MCU>, > + <&pericfg CLK_PERI_USB_SLV>; > + clock-names = "main","mcu","univpll"; > + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; > + status = "disabled"; > + }; > + > + u2phy0: usb-phy@11210000 { > + compatible = "mediatek,generic-tphy-v1"; > + reg = <0 0x11210000 0 0x0800>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + status = "okay"; > + > + u2port2: usb-phy@1a1c4800 { > + reg = <0 0x11210800 0 0x0100>; > + clocks = <&topckgen CLK_TOP_USB_PHY48M>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + }; > + > ethsys: syscon@1b000000 { > compatible = "mediatek,mt2701-ethsys", "syscon"; > reg = <0 0x1b000000 0 0x1000>; >
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts index be0edb3dae6c..844ed3f971fe 100644 --- a/arch/arm/boot/dts/mt2701-evb.dts +++ b/arch/arm/boot/dts/mt2701-evb.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include <dt-bindings/gpio/gpio.h> #include "mt2701.dtsi" / { @@ -60,6 +61,15 @@ backlight_lcd: backlight_lcd { >; default-brightness-level = <9>; }; + + usb_vbus: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 45 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &auxadc { @@ -229,3 +239,14 @@ pins1 { &uart0 { status = "okay"; }; + +&usb2 { + status = "okay"; + usb-role-switch; + connector{ + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_vbus>; + }; +}; diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 180377e56ef4..a6b1434e83fb 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -670,6 +670,39 @@ u3port1: usb-phy@1a244900 { }; }; + usb2: usb@11200000 { + compatible = "mediatek,mt2701-musb", + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + status = "disabled"; + }; + + u2phy0: usb-phy@11210000 { + compatible = "mediatek,generic-tphy-v1"; + reg = <0 0x11210000 0 0x0800>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "okay"; + + u2port2: usb-phy@1a1c4800 { + reg = <0 0x11210800 0 0x0100>; + clocks = <&topckgen CLK_TOP_USB_PHY48M>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + ethsys: syscon@1b000000 { compatible = "mediatek,mt2701-ethsys", "syscon"; reg = <0 0x1b000000 0 0x1000>;