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Wed, 11 Dec 2019 14:52:21 +0000 (GMT) From: Marek Szyprowski To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marek Szyprowski , Greg Kroah-Hartman , Krzysztof Kozlowski , Matthias Brugger , Maxime Ripard , Chen-Yu Tsai , Andy Gross , Bjorn Andersson , Stefan Agner , Chunfeng Yun , Linus Walleij , Bartlomiej Zolnierkiewicz Subject: [PATCH v2 3/4] ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity Date: Wed, 11 Dec 2019 15:52:17 +0100 Message-Id: <20191211145217.25025-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211145054.24835-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0gUURjl7szOjIsb4yp5U1HaXlikmYVXKlEIHOhHRYRgiW45qKmr7Khl JJpvJx9ZmYsmiYaWz1W39ZGorY8lNM0USVLxQWCCj1B8pGnujtm/893vfOec7+NSmKxbbEOF KKNYlVIRJickuK5no/90meiX3xn+yXnUP7OJozp1rRj1ti/gKK2tCEdJpbUEGhjQkOjFVrkI 1c+MiNFQyysCDSUNAqQeaBOhkrIUDFV3jZMoMdkVpWaUiVFDTRqJNvQDIk8LpnRtAmM005Vi prlgnGTqKzIIZmyklWDai6pIpuFNPJP8qR1nsrUVgFmut78m8ZVcDGTDQmJYlbNHgCR4wuAW mSN5MLNeJ0oAjRQPzChIn4Pbf/IJHkgoGf0WQN7QD4RiBcCUrjGRUCwD2DiWiPGAMo3kFgYI 7+UA9s1l4PsTlVMpmFGXoF0gP8+bdK3oKgA3s9QmFkb/xqBupJwwsizpq/DxTg4wYpw+BkvX NWIjltKX4LC2BwgJHWClpsOkakZ7QH61xiQE6WkSpi2lYQLpMszTGHMYsSWcM2hJAdvBnebX ImEgCcCp/mpSKDIBHEpU71lcgJ2GQbFxO4x2hLUtzsKiXnCw56AAD8Bv8xZGMrYLn+ny904h hempMkHjOCww1Oy7fvzydS8ZAzcWq/cOnAvgu5Ii7ClwKPjvVQxABbBmo7nwIJY7q2TvO3GK cC5aGeR0NyK8Hux+rt5tw0oTaNm6owc0BeTm0uLGRT+ZWBHDxYbrAaQwuZXUkLrgJ5MGKmIf sqoIf1V0GMvpgS2Fy62lriU//WR0kCKKDWXZSFb1ryuizGwSQL6b46NVaBiFNzoLOyy0ddeH h5YiO+L8lUfi/UmHMNJ9dMnTt3hS+7zge3fmIVn84flOe378qNrRK86/e/WKj/f4WnaozsIn 2b4vYtK28+bLWfPugA9Fs2OuWXY/zO7dykt2J5q26dZCwuU9R3p/vh2yNcumN/ZwVqeidOnt J+Q4F6xwOYmpOMVf+1GqIFgDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKIsWRmVeSWpSXmKPExsVy+t/xu7rLmD7GGuxbLWZx7vFvFouNM9az Wpze/47Fon3fXBaL5sXr2SzOn9/AbjHlz3Imi02Pr7FaXN41h83icvNFRosZ5/cxWSxa1sps sfbIXXaLphZji7bOZawWm9e1s1v8PHSeyUHQY/H3e8weGx6tZvXYOesuu8emVZ1sHneu7WHz 2D93DbvH5iX1Hi0n97N49G1ZxejxeZNcAFeUnk1RfmlJqkJGfnGJrVK0oYWRnqGlhZ6RiaWe obF5rJWRqZK+nU1Kak5mWWqRvl2CXsa94+YF/VwVj39sZGpg3M7RxcjBISFgIjFxdkIXIxeH kMBSRok1X3sYuxg5geIyEienNbBC2MISf651sYHYQgKfGCXWz/UEsdkEDCW63oLEuThEBDYw Spx5/4QFxGEWaGKRmDrrMRNIlbCAr8T+PUvBprIIqEos/rEBbCqvgK3ElS3HoLbJS6zecIAZ xOYUsJPo+raOBWKbrcSn221sExj5FjAyrGIUSS0tzk3PLTbSK07MLS7NS9dLzs/dxAiMom3H fm7Zwdj1LvgQowAHoxIP74Lt72OFWBPLiitzDzFKcDArifAeb3sXK8SbklhZlVqUH19UmpNa fIjRFOioicxSosn5wAjPK4k3NDU0t7A0NDc2NzazUBLn7RA4GCMkkJ5YkpqdmlqQWgTTx8TB KdXA6Lz8/uLv/+7KrHX1D+1eUBe14N2tqA0TtdbKa3zW+8Ar7/GjSOHjbbfnNha81hwmZ8+z nroteCq2OLSeWy1x7fUXGx4U6zPtFm74eNv/7GKbSet55s34ocQrvWvz/0cBByZWHvwnVPzi ZIPM+va9p6YH65xsnGfk8OOVR0CLfYmVjtG2P7dYDimxFGckGmoxFxUnAgCVn2aYuAIAAA== X-CMS-MailID: 20191211145222eucas1p1d761af59e04017ddadbdbd1cceb59b1f X-Msg-Generator: CA X-RootMTR: 20191211145222eucas1p1d761af59e04017ddadbdbd1cceb59b1f X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20191211145222eucas1p1d761af59e04017ddadbdbd1cceb59b1f References: <20191211145054.24835-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Current USB3503 driver ignores GPIO polarity and always operates as if the GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing USB3503 chip applications to match the chip specification and common convention for naming the pins. The only pin, which has to be ACTIVE_LOW is the reset pin. The remaining are ACTIVE_HIGH. This change allows later to fix the USB3503 driver to properly use generic GPIO bindings and read polarity from DT. Signed-off-by: Marek Szyprowski Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts index fb928503ad45..d9be511f054f 100644 --- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts +++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts @@ -101,7 +101,7 @@ initial-mode = <1>; /* initialize in HUB mode */ disabled-ports = <1>; intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ refclk-frequency = <19200000>; };